ELF>/@@qp !"56#$%&'()*+,-./01234<=>?ABCEFGHIJKLMNOPQRSTUVWXYhiHhdH%(HD$X1H|$@Ht$HD$D$D$D$D$ D$$HL$HHt$H|$tHD$XdH3%(uJHhHt$Ht$(T$T$0HL$HL$4DD$$DD$H[]A\H3HHH$A<$HĠ뷿HHʼnAHHHHH5HHHHATUSHHHMDD$ LNH?pL ALtÅu>H[]A\H3HHH$A<$HĠ뷿HHʼnAHHHHH5HHHHUSHHHLLNH?pL ALtÅu-H[]H3HHH}HĠȿHHʼnAHHHHH5HHHHHH=HH5H=HPU%X'@cuda-decoder-kernels.cuELF3\&@8@.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm20_div_rn_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm20_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5289.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4856.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4324.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3674$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3676.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1902$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1904.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1463.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__963$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__965.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__541.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtVPt`t~lt@xtttuu,tJ1t7t@)=tCtp?ItOt U-rW!.7X/ Y 0 Z 1[26"[ "[)3\v45O]ww67^8_9`A!:G"aN#x#;}%<&b'y(=3)>*c+?,dj-z-@.A/ei0{0BB1"e 2Cw3f4Dh5g6E7F7h8G9i:|;H<Iu=j>J?k}@}wAK[Bl@C~CLIEMFmFLGN*HOHnFJPKodLQ5MplNR%Oq#PSPrQTRspRURRR2VWXc YV Z@[\{]L^_@7`!a@&b@ )c/,d:/e3f 5go7hh9i=j-?k@Al EmHn@Jo@Lp@Nq}PrQs@o8 /local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/usr/local/cuda/include/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/../iterator/../local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/../../warp/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/usr/local/cuda/include/thrust/system/detail/sequential/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/../cudadecoder/usr/include/c++/7/usr/include/c++/7/bits/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../thread/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/..cuda-decoder-kernels.cudevice_atomic_functions.hpp@util_device.cuhޛSblock_scan_raking.cuhޛblock_scan.cuhޛ¤warp_scan_shfl.cuhޛblock_reduce_warp_reductions.cuhޛLblock_reduce.cuhޛblock_histogram_sort.cuhޛ@block_histogram.cuhޛblock_radix_sort.cuh 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z{ynf2dji~ v  w v v  puv  w v v v }qmo {  -~({ z, I, O v  oy{w s v w w wtps su susrzw~} 8 ,|  x񀅀} {~ 􃁁~0Usss t u u  g~R/_{ }z~ |y yomm  )|  {}} {s pv b  zu ~gf  ^  !} w  u |2Psss xc􄄆zzzzz ~~~~_􄄄} } y~ v w v v  u zs z~ z %} (ztm xz|  {f ~ i vi svi v e(|(}{omm y~|  v u qtm v  kl v w  v vr ~x  #~(񀃄|  ~} v z z z󃃃{z( !{z w  zqzno yyy  x x w  |~ c |~  uU,)U|tpnkgx 񃁂|섁zz b buzx u qn{}}j}Dx |y vspf#a󃃀턁~z t񀄁y {} zy }z~u  {u z}~uzv z~u v 6 I.Sw   tjaqt}a~qu as!x oixsl teql qy]#]w _xv ozp~{ xzm se#]smy]#]%_ gt qxrq xmxy]#]%c{sk}|k}txiylqtx ep  I6I   kqm+h  ^ sqkurt gv vy yxqpm#a!krkt wo" jtrl ex glp  V{s   jqgqhy)Wlst uyxz gqx y   Zz{ ~z uogu N7z }sr u  z (~ ~~z} v nrs z~  ~~ 6( ~z&X t y쀃rz(} n~ns w {|} t z0 v v 0  {򂁅{~ u 0~0}z w  x w  e{~ qhu ui({􁀃vvvvvvvvvv z z z z vvvvvvvvvvv z z~󃃃󃃃j!c d yyv ~~ v w v v }녁}~ z}x   s5P x x x x x x xsg}0|0n(s x( x (x8|( (x x~􄄄􄄄􄄄-X􄄄ꅀ yꅀ yꅀ yꅀ yꅀ{*vwwwrrrrrmU0rZ9rr Krr K:F]-{*mjm|nyqjrx  d ~;kkt0:~lk] f~ v hi v  s ih-_!k`y`x j kj v v  z s  } U {  z0 } ~(%div q w z~  z|z jnve'x  yt{zz wvvv z {|pv w z  | {}}(}z  z 0Qsso t󀆃~ y~ y~ y~ y~ ~􀃀_􄄄 } p {z~| t  }t$]#e i x k l V"h ]w^vvv"svC0v w lY1sv u ( |}|hqv v  w mhft^)Y􁄁 x x xy{wuzqnwzypinwz ꀄzq{w~ x ozz{c z킄y |z|z||a~~X~xx r}섃}{~x  J k|  } {8 I is} z{( ~y zz vI I  uzy  v eqr1anw  }y z v  v  wmj w ~{s|   r us d _" xZ) LJ Gxy}{{yz  ;0.version 6.2.target sm_30.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<48>;mov.b64 %rd7, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];ld.param.u64 %rd8, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd1, %rd8;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r16, %r1, %r2;mul.wide.s32 %rd9, %r16, 40;add.s64 %rd10, %rd1, %rd9;add.s64 %rd2, %rd10, 4;ld.global.u32 %r3, [%rd10+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r17, %ctaid.x;mov.u32 %r18, %ntid.x;mov.u32 %r19, %tid.x;mad.lo.s32 %r6, %r18, %r17, %r19;mov.u32 %r20, %nctaid.x;mul.lo.s32 %r7, %r20, %r18;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;mov.u64 %rd11, %rd7;ld.param.u64 %rd12, [%rd11+16];cvta.to.global.u64 %rd13, %rd12;ld.param.u32 %r21, [%rd11+24];mul.lo.s32 %r22, %r21, %r36;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd3, %rd13, %rd14;ld.param.u64 %rd4, [%rd11+48];ld.param.u32 %r9, [%rd11+56];ld.param.u64 %rd5, [%rd11+64];ld.param.u32 %r10, [%rd11+72];ld.param.u64 %rd6, [%rd11+80];ld.param.u32 %r11, [%rd11+88];mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r13, [%rd3];mul.lo.s32 %r23, %r9, %r13;cvt.s64.s32 %rd15, %r23;cvt.s64.s32 %rd16, %r37;add.s64 %rd17, %rd15, %rd16;cvta.to.global.u64 %rd18, %rd4;shl.b64 %rd19, %rd17, 3;add.s64 %rd20, %rd18, %rd19;mul.lo.s32 %r24, %r9, %r2;cvt.s64.s32 %rd21, %r24;add.s64 %rd22, %rd21, %rd16;shl.b64 %rd23, %rd22, 3;add.s64 %rd24, %rd18, %rd23;ld.global.u64 %rd25, [%rd24];st.global.u64 [%rd20], %rd25;mul.lo.s32 %r25, %r10, %r2;cvt.s64.s32 %rd26, %r25;add.s64 %rd27, %rd26, %rd16;cvta.to.global.u64 %rd28, %rd5;shl.b64 %rd29, %rd27, 2;add.s64 %rd30, %rd28, %rd29;ld.global.u32 %r26, [%rd30];mul.lo.s32 %r27, %r10, %r13;cvt.s64.s32 %rd31, %r27;add.s64 %rd32, %rd31, %rd16;shl.b64 %rd33, %rd32, 2;add.s64 %rd34, %rd28, %rd33;st.global.u32 [%rd34], %r26;mul.lo.s32 %r28, %r11, %r2;cvt.s64.s32 %rd35, %r28;add.s64 %rd36, %rd35, %rd16;cvta.to.global.u64 %rd37, %rd6;shl.b64 %rd38, %rd36, 2;add.s64 %rd39, %rd37, %rd38;ld.global.u32 %r29, [%rd39];mul.lo.s32 %r30, %r11, %r13;cvt.s64.s32 %rd40, %r30;add.s64 %rd41, %rd40, %rd16;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd37, %rd42;st.global.u32 [%rd43], %r29;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r31, %r1, %r13;mul.wide.s32 %rd44, %r31, 40;add.s64 %rd45, %rd1, %rd44;ld.global.u64 %rd46, [%rd2+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r32, [%rd2+4];mov.u32 %r33, 0;st.global.v2.u32 [%rd45+8], {%r32, %r33};ld.param.u32 %r34, [%rd11+372];st.global.v2.u32 [%rd45+16], {%r33, %r34};BB3_6:add.s32 %r37, %r7, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:mov.u32 %r35, %nctaid.y;add.s32 %r36, %r35, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<424>;.reg .b64 %rd<16>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd1, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r27, %ntid.x;mov.u32 %r28, %ctaid.x;mul.lo.s32 %r417, %r27, %r28;add.s32 %r29, %r2, 1;setp.ge.s32 %p2, %r417, %r29;@%p2 bra BB6_10;mov.u32 %r32, 0;mov.u32 %r48, %laneid;mov.u32 %r418, %r32;mov.u32 %r419, %r32;mov.u32 %r420, %r32;BB6_2:ld.param.u32 %r416, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r36, %tid.x;add.s32 %r7, %r417, %r36;setp.ge.s32 %p3, %r7, %r416;mov.u32 %r421, %r32;mov.u32 %r422, %r32;mov.u32 %r423, %r32;@%p3 bra BB6_4;mov.u64 %rd2, %rd1;ld.param.u64 %rd3, [%rd2+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r37, [%rd2+24];mul.lo.s32 %r38, %r37, %r7;mul.wide.s32 %rd5, %r38, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r423, [%rd6+20];ld.global.v2.u32 {%r421, %r422}, [%rd6+40];BB6_4:setp.lt.u32 %p1, %r36, 32;shr.u32 %r42, %r36, 3;add.s32 %r43, %r42, %r36;shl.b32 %r44, %r43, 4;mov.u32 %r45, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r46, %r45, %r44;st.shared.v4.u32 [%r46+16], {%r423, %r422, %r421, %r32};bar.sync 0;@!%p1 bra BB6_7;bra.uni BB6_5;BB6_5:mul.lo.s32 %r190, %r36, 9;shl.b32 %r191, %r190, 4;add.s32 %r193, %r45, %r191;ld.shared.v4.u32 {%r194, %r195, %r196, %r197}, [%r193+32];ld.shared.v4.u32 {%r202, %r203, %r204, %r205}, [%r193+16];add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;add.s32 %r212, %r196, %r204;add.s32 %r213, %r197, %r205;ld.shared.v4.u32 {%r214, %r215, %r216, %r217}, [%r193+48];add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;add.s32 %r224, %r212, %r216;add.s32 %r225, %r213, %r217;ld.shared.v4.u32 {%r226, %r227, %r228, %r229}, [%r193+64];add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;add.s32 %r236, %r224, %r228;add.s32 %r237, %r225, %r229;ld.shared.v4.u32 {%r238, %r239, %r240, %r241}, [%r193+80];add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;add.s32 %r248, %r236, %r240;add.s32 %r249, %r237, %r241;ld.shared.v4.u32 {%r250, %r251, %r252, %r253}, [%r193+96];add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;add.s32 %r260, %r248, %r252;add.s32 %r261, %r249, %r253;ld.shared.v4.u32 {%r262, %r263, %r264, %r265}, [%r193+112];add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;add.s32 %r272, %r260, %r264;add.s32 %r273, %r261, %r265;ld.shared.v4.u32 {%r274, %r275, %r276, %r277}, [%r193+128];add.s32 %r50, %r270, %r274;add.s32 %r55, %r271, %r275;add.s32 %r60, %r272, %r276;add.s32 %r65, %r273, %r277;mov.u32 %r186, 1;mov.u32 %r187, 0;mov.u32 %r188, -1;shfl.sync.up.b32 %r49, %r50, %r186, %r187, %r188;shfl.sync.up.b32 %r54, %r55, %r186, %r187, %r188;shfl.sync.up.b32 %r59, %r60, %r186, %r187, %r188;shfl.sync.up.b32 %r64, %r65, %r186, %r187, %r188;setp.lt.s32 %p4, %r48, 1;selp.b32 %r282, 0, %r49, %p4;add.s32 %r70, %r282, %r50;selp.b32 %r283, 0, %r54, %p4;add.s32 %r75, %r283, %r55;selp.b32 %r284, 0, %r59, %p4;add.s32 %r80, %r284, %r60;selp.b32 %r285, 0, %r64, %p4;add.s32 %r85, %r285, %r65;mov.u32 %r86, 2;shfl.sync.up.b32 %r69, %r70, %r86, %r187, %r188;shfl.sync.up.b32 %r74, %r75, %r86, %r187, %r188;shfl.sync.up.b32 %r79, %r80, %r86, %r187, %r188;shfl.sync.up.b32 %r84, %r85, %r86, %r187, %r188;setp.lt.s32 %p5, %r48, 2;selp.b32 %r286, 0, %r69, %p5;add.s32 %r90, %r286, %r70;selp.b32 %r287, 0, %r74, %p5;add.s32 %r95, %r287, %r75;selp.b32 %r288, 0, %r79, %p5;add.s32 %r100, %r288, %r80;selp.b32 %r289, 0, %r84, %p5;add.s32 %r105, %r289, %r85;mov.u32 %r106, 4;shfl.sync.up.b32 %r89, %r90, %r106, %r187, %r188;shfl.sync.up.b32 %r94, %r95, %r106, %r187, %r188;shfl.sync.up.b32 %r99, %r100, %r106, %r187, %r188;shfl.sync.up.b32 %r104, %r105, %r106, %r187, %r188;setp.lt.s32 %p6, %r48, 4;selp.b32 %r290, 0, %r89, %p6;add.s32 %r110, %r290, %r90;selp.b32 %r291, 0, %r94, %p6;add.s32 %r115, %r291, %r95;selp.b32 %r292, 0, %r99, %p6;add.s32 %r120, %r292, %r100;selp.b32 %r293, 0, %r104, %p6;add.s32 %r125, %r293, %r105;mov.u32 %r126, 8;shfl.sync.up.b32 %r109, %r110, %r126, %r187, %r188;shfl.sync.up.b32 %r114, %r115, %r126, %r187, %r188;shfl.sync.up.b32 %r119, %r120, %r126, %r187, %r188;shfl.sync.up.b32 %r124, %r125, %r126, %r187, %r188;setp.lt.s32 %p7, %r48, 8;selp.b32 %r294, 0, %r109, %p7;add.s32 %r130, %r294, %r110;selp.b32 %r295, 0, %r114, %p7;add.s32 %r135, %r295, %r115;selp.b32 %r296, 0, %r119, %p7;add.s32 %r140, %r296, %r120;selp.b32 %r297, 0, %r124, %p7;add.s32 %r145, %r297, %r125;mov.u32 %r146, 16;shfl.sync.up.b32 %r129, %r130, %r146, %r187, %r188;shfl.sync.up.b32 %r134, %r135, %r146, %r187, %r188;shfl.sync.up.b32 %r139, %r140, %r146, %r187, %r188;shfl.sync.up.b32 %r144, %r145, %r146, %r187, %r188;setp.lt.s32 %p8, %r48, 16;selp.b32 %r298, 0, %r129, %p8;add.s32 %r170, %r298, %r130;selp.b32 %r299, 0, %r134, %p8;add.s32 %r175, %r299, %r135;selp.b32 %r300, 0, %r139, %p8;add.s32 %r180, %r300, %r140;selp.b32 %r301, 0, %r144, %p8;add.s32 %r185, %r301, %r145;mov.u32 %r167, 31;shfl.sync.idx.b32 %r149, %r170, %r167, %r167, %r188;shfl.sync.idx.b32 %r154, %r175, %r167, %r167, %r188;shfl.sync.idx.b32 %r159, %r180, %r167, %r167, %r188;shfl.sync.idx.b32 %r164, %r185, %r167, %r167, %r188;shfl.sync.up.b32 %r169, %r170, %r186, %r187, %r188;shfl.sync.up.b32 %r174, %r175, %r186, %r187, %r188;shfl.sync.up.b32 %r179, %r180, %r186, %r187, %r188;shfl.sync.up.b32 %r184, %r185, %r186, %r187, %r188;setp.eq.s32 %p9, %r48, 0;ld.shared.v4.u32 {%r302, %r303, %r304, %r305}, [%r193+16];ld.shared.v4.u32 {%r310, %r311, %r312, %r313}, [%r193+32];ld.shared.v4.u32 {%r318, %r319, %r320, %r321}, [%r193+48];ld.shared.v4.u32 {%r326, %r327, %r328, %r329}, [%r193+64];ld.shared.v4.u32 {%r334, %r335, %r336, %r337}, [%r193+80];ld.shared.v4.u32 {%r342, %r343, %r344, %r345}, [%r193+96];ld.shared.v4.u32 {%r350, %r351, %r352, %r353}, [%r193+112];selp.b32 %r358, 0, %r169, %p9;selp.b32 %r359, 0, %r174, %p9;selp.b32 %r360, 0, %r179, %p9;selp.b32 %r361, 0, %r184, %p9;st.shared.v4.u32 [%r193+16], {%r358, %r359, %r360, %r361};add.s32 %r362, %r305, %r361;add.s32 %r363, %r304, %r360;add.s32 %r364, %r303, %r359;add.s32 %r365, %r302, %r358;st.shared.v4.u32 [%r193+32], {%r365, %r364, %r363, %r362};add.s32 %r366, %r313, %r362;add.s32 %r367, %r312, %r363;add.s32 %r368, %r311, %r364;add.s32 %r369, %r310, %r365;st.shared.v4.u32 [%r193+48], {%r369, %r368, %r367, %r366};add.s32 %r370, %r321, %r366;add.s32 %r371, %r320, %r367;add.s32 %r372, %r319, %r368;add.s32 %r373, %r318, %r369;st.shared.v4.u32 [%r193+64], {%r373, %r372, %r371, %r370};add.s32 %r374, %r329, %r370;add.s32 %r375, %r328, %r371;add.s32 %r376, %r327, %r372;add.s32 %r377, %r326, %r373;st.shared.v4.u32 [%r193+80], {%r377, %r376, %r375, %r374};add.s32 %r378, %r337, %r374;add.s32 %r379, %r336, %r375;add.s32 %r380, %r335, %r376;add.s32 %r381, %r334, %r377;st.shared.v4.u32 [%r193+96], {%r381, %r380, %r379, %r378};add.s32 %r382, %r345, %r378;add.s32 %r383, %r344, %r379;add.s32 %r384, %r343, %r380;add.s32 %r385, %r342, %r381;st.shared.v4.u32 [%r193+112], {%r385, %r384, %r383, %r382};add.s32 %r386, %r353, %r382;add.s32 %r387, %r352, %r383;add.s32 %r388, %r351, %r384;add.s32 %r389, %r350, %r385;st.shared.v4.u32 [%r193+128], {%r389, %r388, %r387, %r386};setp.ne.s32 %p10, %r36, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r149, %r154, %r159, %r164};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r390, %r391, %r392, %r393}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r7, %r29;@%p11 bra BB6_9;ld.shared.v4.u32 {%r400, %r401, %r402, %r403}, [%r46+16];add.s32 %r407, %r400, %r418;mov.u64 %rd7, %rd1;ld.param.u64 %rd8, [%rd7+16];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r408, [%rd7+24];mul.lo.s32 %r409, %r408, %r7;ld.param.u64 %rd10, [%rd7+32];cvta.to.global.u64 %rd11, %rd10;ld.param.u32 %r410, [%rd7+40];mul.lo.s32 %r411, %r410, %r7;mul.wide.s32 %rd12, %r409, 136;add.s64 %rd13, %rd9, %rd12;st.global.u32 [%rd13+100], %r407;mul.wide.s32 %rd14, %r411, 136;add.s64 %rd15, %rd11, %rd14;add.s32 %r412, %r402, %r420;add.s32 %r413, %r401, %r419;st.global.v2.u32 [%rd13+104], {%r413, %r412};st.global.u32 [%rd15+100], %r407;st.global.v2.u32 [%rd15+104], {%r413, %r412};BB6_9:bar.sync 0;mov.u32 %r415, %nctaid.x;mad.lo.s32 %r417, %r415, %r27, %r417;setp.lt.s32 %p12, %r417, %r29;add.s32 %r420, %r392, %r420;add.s32 %r419, %r391, %r419;add.s32 %r418, %r390, %r418;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<294>;.reg .b64 %rd<82>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r282, %ctaid.y;setp.ge.s32 %p3, %r282, %r2;@%p3 bra BB7_20;mov.u32 %r61, %laneid;BB7_2:mov.b64 %rd81, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd4, %rd81;ld.param.u64 %rd1, [%rd4+16];cvta.to.global.u64 %rd5, %rd1;ld.param.u32 %r6, [%rd4+24];mul.lo.s32 %r39, %r6, %r282;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd5, %rd6;add.s64 %rd2, %rd7, 36;mov.u32 %r40, %ctaid.x;mov.u32 %r41, %ntid.x;mul.lo.s32 %r287, %r41, %r40;ld.global.u32 %r7, [%rd7+36];setp.ge.s32 %p4, %r287, %r7;@%p4 bra BB7_19;ld.global.u32 %r8, [%rd2+44];BB7_4:mov.u32 %r47, %tid.x;add.s32 %r13, %r287, %r47;ld.global.u32 %r14, [%rd2+-36];mov.u32 %r289, -1;mov.u32 %r288, 0;setp.ge.s32 %p5, %r13, %r7;@%p5 bra BB7_7;mov.u32 %r279, %tid.x;add.s32 %r278, %r287, %r279;ld.param.u64 %rd9, [%rd4+128];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r50, [%rd4+136];mul.lo.s32 %r51, %r50, %r282;cvt.s64.s32 %rd11, %r51;cvt.s64.s32 %rd12, %r278;add.s64 %rd13, %rd11, %rd12;shl.b64 %rd14, %rd13, 3;add.s64 %rd15, %rd10, %rd14;ld.global.v2.u32 {%r290, %r291}, [%rd15];setp.ge.s32 %p6, %r291, %r8;@%p6 bra BB7_7;ld.param.u64 %rd17, [%rd4+352];cvta.to.global.u64 %rd18, %rd17;mul.wide.s32 %rd19, %r290, 4;add.s64 %rd20, %rd18, %rd19;ld.global.u32 %r54, [%rd20+4];ld.global.u32 %r289, [%rd20];sub.s32 %r288, %r54, %r289;BB7_7:mov.u32 %r276, %tid.x;setp.lt.u32 %p1, %r276, 32;setp.ne.s32 %p7, %r289, -1;selp.u32 %r23, 1, 0, %p7;shr.u32 %r56, %r276, 3;add.s32 %r57, %r56, %r276;shl.b32 %r58, %r57, 3;mov.u32 %r59, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r60, %r59, %r58;st.shared.v2.u32 [%r60+16], {%r288, %r23};bar.sync 0;@!%p1 bra BB7_9;bra.uni BB7_8;BB7_8:mov.u32 %r277, %tid.x;mul.lo.s32 %r123, %r277, 9;shl.b32 %r124, %r123, 3;add.s32 %r126, %r59, %r124;ld.shared.v2.u32 {%r127, %r128}, [%r126+24];ld.shared.v2.u32 {%r131, %r132}, [%r126+16];add.s32 %r135, %r127, %r131;add.s32 %r136, %r128, %r132;ld.shared.v2.u32 {%r137, %r138}, [%r126+32];add.s32 %r141, %r135, %r137;add.s32 %r142, %r136, %r138;ld.shared.v2.u32 {%r143, %r144}, [%r126+40];add.s32 %r147, %r141, %r143;add.s32 %r148, %r142, %r144;ld.shared.v2.u32 {%r149, %r150}, [%r126+48];add.s32 %r153, %r147, %r149;add.s32 %r154, %r148, %r150;ld.shared.v2.u32 {%r155, %r156}, [%r126+56];add.s32 %r159, %r153, %r155;add.s32 %r160, %r154, %r156;ld.shared.v2.u32 {%r161, %r162}, [%r126+64];add.s32 %r165, %r159, %r161;add.s32 %r166, %r160, %r162;ld.shared.v2.u32 {%r167, %r168}, [%r126+72];add.s32 %r63, %r165, %r167;add.s32 %r68, %r166, %r168;mov.u32 %r119, 1;mov.u32 %r120, 0;mov.u32 %r121, -1;shfl.sync.up.b32 %r62, %r63, %r119, %r120, %r121;shfl.sync.up.b32 %r67, %r68, %r119, %r120, %r121;setp.lt.s32 %p8, %r61, 1;selp.b32 %r171, 0, %r62, %p8;add.s32 %r73, %r171, %r63;selp.b32 %r172, 0, %r67, %p8;add.s32 %r78, %r172, %r68;mov.u32 %r79, 2;shfl.sync.up.b32 %r72, %r73, %r79, %r120, %r121;shfl.sync.up.b32 %r77, %r78, %r79, %r120, %r121;setp.lt.s32 %p9, %r61, 2;selp.b32 %r173, 0, %r72, %p9;add.s32 %r83, %r173, %r73;selp.b32 %r174, 0, %r77, %p9;add.s32 %r88, %r174, %r78;mov.u32 %r89, 4;shfl.sync.up.b32 %r82, %r83, %r89, %r120, %r121;shfl.sync.up.b32 %r87, %r88, %r89, %r120, %r121;setp.lt.s32 %p10, %r61, 4;selp.b32 %r175, 0, %r82, %p10;add.s32 %r93, %r175, %r83;selp.b32 %r176, 0, %r87, %p10;add.s32 %r98, %r176, %r88;mov.u32 %r99, 8;shfl.sync.up.b32 %r92, %r93, %r99, %r120, %r121;shfl.sync.up.b32 %r97, %r98, %r99, %r120, %r121;setp.lt.s32 %p11, %r61, 8;selp.b32 %r177, 0, %r92, %p11;add.s32 %r103, %r177, %r93;selp.b32 %r178, 0, %r97, %p11;add.s32 %r108, %r178, %r98;mov.u32 %r109, 16;shfl.sync.up.b32 %r102, %r103, %r109, %r120, %r121;shfl.sync.up.b32 %r107, %r108, %r109, %r120, %r121;setp.lt.s32 %p12, %r61, 16;selp.b32 %r179, 0, %r102, %p12;add.s32 %r113, %r179, %r103;selp.b32 %r180, 0, %r107, %p12;add.s32 %r118, %r180, %r108;shfl.sync.up.b32 %r112, %r113, %r119, %r120, %r121;shfl.sync.up.b32 %r117, %r118, %r119, %r120, %r121;setp.eq.s32 %p13, %r61, 0;ld.shared.v2.u32 {%r181, %r182}, [%r126+16];ld.shared.v2.u32 {%r185, %r186}, [%r126+24];ld.shared.v2.u32 {%r189, %r190}, [%r126+32];ld.shared.v2.u32 {%r193, %r194}, [%r126+40];ld.shared.v2.u32 {%r197, %r198}, [%r126+48];ld.shared.v2.u32 {%r201, %r202}, [%r126+56];ld.shared.v2.u32 {%r205, %r206}, [%r126+64];selp.b32 %r209, 0, %r112, %p13;selp.b32 %r210, 0, %r117, %p13;st.shared.v2.u32 [%r126+16], {%r209, %r210};add.s32 %r211, %r182, %r210;add.s32 %r212, %r181, %r209;st.shared.v2.u32 [%r126+24], {%r212, %r211};add.s32 %r213, %r186, %r211;add.s32 %r214, %r185, %r212;st.shared.v2.u32 [%r126+32], {%r214, %r213};add.s32 %r215, %r190, %r213;add.s32 %r216, %r189, %r214;st.shared.v2.u32 [%r126+40], {%r216, %r215};add.s32 %r217, %r194, %r215;add.s32 %r218, %r193, %r216;st.shared.v2.u32 [%r126+48], {%r218, %r217};add.s32 %r219, %r198, %r217;add.s32 %r220, %r197, %r218;st.shared.v2.u32 [%r126+56], {%r220, %r219};add.s32 %r221, %r202, %r219;add.s32 %r222, %r201, %r220;st.shared.v2.u32 [%r126+64], {%r222, %r221};add.s32 %r223, %r206, %r221;add.s32 %r224, %r205, %r222;st.shared.v2.u32 [%r126+72], {%r224, %r223};BB7_9:mov.u32 %r266, %ntid.x;mov.u32 %r265, %tid.x;add.s32 %r226, %r266, -1;setp.eq.s32 %p2, %r265, %r226;bar.sync 0;mov.u32 %r272, %tid.x;shr.u32 %r271, %r272, 3;add.s32 %r270, %r271, %r272;shl.b32 %r269, %r270, 3;mov.u32 %r268, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r267, %r268, %r269;ld.shared.v2.u32 {%r232, %r233}, [%r267+16];@!%p2 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r289, -1;selp.u32 %r281, 1, 0, %p22;add.s64 %rd24, %rd7, 24;add.s32 %r27, %r233, %r281;atom.global.add.u32 %r235, [%rd24], %r27;add.s32 %r236, %r235, %r27;ld.param.u32 %r28, [%rd4+308];setp.lt.s32 %p14, %r236, %r28;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd29, %rd7, 16;add.s32 %r240, %r232, %r288;mov.b64 %rd30, {%r240, %r27};atom.global.add.u64 %rd31, [%rd29], %rd30;mov.b64 {%r241, %r242}, %rd31;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r241, %r242};bra.uni BB7_13;BB7_11:ld.global.u32 %r237, [%rd2+12];or.b32 %r238, %r237, 1;st.global.u32 [%rd2+12], %r238;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r28;BB7_13:bar.sync 0;ld.param.u32 %r243, [%rd4+308];ld.shared.u32 %r29, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r29, %r243;@%p15 bra BB7_19;setp.eq.s32 %p16, %r289, -1;@%p16 bra BB7_18;mov.u32 %r274, %tid.x;add.s32 %r273, %r287, %r274;ld.global.u32 %r244, [%rd2+16];setp.ne.s32 %p17, %r244, 0;ld.param.u64 %rd34, [%rd4+144];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r245, [%rd4+152];mul.lo.s32 %r246, %r245, %r282;cvt.s64.s32 %rd36, %r246;cvt.s64.s32 %rd37, %r273;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd35, %rd39;ld.global.v2.u32 {%r247, %r248}, [%rd40];add.s32 %r32, %r29, %r233;setp.eq.s32 %p18, %r248, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd42, [%rd4+336];cvta.to.global.u64 %rd43, %rd42;mul.wide.s32 %rd44, %r248, 4;add.s64 %rd45, %rd43, %rd44;ld.global.u32 %r249, [%rd45];ld.global.u64 %rd46, [%rd2+-28];mul.wide.s32 %rd47, %r249, 4;add.s64 %rd48, %rd46, %rd47;ld.f32 %f4, [%rd48];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd50, [%rd4+112];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r250, [%rd4+120];mul.lo.s32 %r251, %r250, %r282;cvt.s64.s32 %rd52, %r251;cvt.s64.s32 %rd53, %r32;add.s64 %rd54, %rd52, %rd53;shl.b64 %rd55, %rd54, 3;add.s64 %rd56, %rd51, %rd55;st.global.v2.u32 [%rd56], {%r247, %r248};ld.param.u64 %rd57, [%rd4+48];cvta.to.global.u64 %rd58, %rd57;ld.param.u32 %r252, [%rd4+56];mul.lo.s32 %r253, %r252, %r14;cvt.s64.s32 %rd59, %r253;add.s64 %rd60, %rd59, %rd53;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd58, %rd61;st.global.v2.u32 [%rd62], {%r290, %r291};ld.param.u64 %rd63, [%rd4+96];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r254, [%rd4+104];mul.lo.s32 %r255, %r254, %r282;cvt.s64.s32 %rd65, %r255;add.s64 %rd66, %rd65, %rd53;shl.b64 %rd67, %rd66, 2;add.s64 %rd68, %rd64, %rd67;st.global.f32 [%rd68], %f5;ld.shared.u32 %r256, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r257, %r256, %r232;ld.param.u64 %rd69, [%rd4+64];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r258, [%rd4+72];mul.lo.s32 %r259, %r258, %r14;cvt.s64.s32 %rd71, %r259;add.s64 %rd72, %rd71, %rd53;shl.b64 %rd73, %rd72, 2;add.s64 %rd74, %rd70, %rd73;st.global.u32 [%rd74], %r257;ld.param.u64 %rd75, [%rd4+80];cvta.to.global.u64 %rd76, %rd75;ld.param.u32 %r260, [%rd4+88];mul.lo.s32 %r261, %r260, %r14;cvt.s64.s32 %rd77, %r261;add.s64 %rd78, %rd77, %rd53;shl.b64 %rd79, %rd78, 2;add.s64 %rd80, %rd76, %rd79;st.global.u32 [%rd80], %r289;BB7_18:mov.u32 %r275, %ntid.x;mov.u32 %r262, %nctaid.x;mad.lo.s32 %r287, %r262, %r275, %r287;setp.lt.s32 %p20, %r287, %r7;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r280, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r264, %nctaid.y;add.s32 %r282, %r264, %r282;setp.lt.s32 %p21, %r282, %r280;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<109>;.reg .b64 %rd<42>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd7, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r107, %ctaid.y;setp.ge.s32 %p2, %r107, %r2;@%p2 bra BB8_26;mov.u64 %rd8, %rd7;ld.param.u64 %rd1, [%rd8+16];ld.param.u32 %r3, [%rd8+24];ld.param.u32 %r4, [%rd8+8];ld.param.u64 %rd2, [%rd8+48];ld.param.u32 %r5, [%rd8+56];ld.param.u64 %rd3, [%rd8+344];mov.u32 %r24, %tid.x;shr.s32 %r25, %r24, 31;shr.u32 %r26, %r25, 27;add.s32 %r27, %r24, %r26;shr.s32 %r28, %r27, 5;shl.b32 %r29, %r28, 2;mov.u32 %r30, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r31, %r30, %r29;cvta.to.global.u64 %rd9, %rd1;cvta.to.global.u64 %rd19, %rd2;cvta.to.global.u64 %rd22, %rd3;mov.u32 %r65, %laneid;BB8_2:mul.lo.s32 %r33, %r3, %r107;mul.wide.s32 %rd10, %r33, 136;add.s64 %rd4, %rd9, %rd10;ld.global.u32 %r8, [%rd4];setp.ne.s32 %p3, %r24, 0;@%p3 bra BB8_4;ld.param.u64 %rd12, [%rd8];cvta.to.global.u64 %rd13, %rd12;ld.global.u32 %r34, [%rd4+68];setp.gt.s32 %p4, %r34, -1;xor.b32 %r35, %r34, 2147483647;selp.b32 %r36, %r34, %r35, %p4;mov.b32 %f15, %r36;mov.u32 %r37, 2147483647;st.global.u32 [%rd4+44], %r37;st.global.u32 [%rd4+80], %r37;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd8+372];min.f32 %f18, %f17, %f16;mov.b32 %r38, %f18;setp.gt.s32 %p5, %r38, -1;xor.b32 %r39, %r38, 2147483647;selp.b32 %r40, %r38, %r39, %p5;mov.u32 %r41, 0;st.global.v2.u32 [%rd4+24], {%r41, %r41};st.global.v2.u32 [%rd4+48], {%r41, %r41};st.global.v2.u32 [%rd4+64], {%r37, %r40};mov.u16 %rs1, 0;st.global.u8 [%rd4+96], %rs1;mul.lo.s32 %r42, %r4, %r8;mul.wide.s32 %rd14, %r42, 40;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15+24], %r37;BB8_4:mul.lo.s32 %r43, %r5, %r8;cvt.s64.s32 %rd16, %r43;ld.global.s32 %rd17, [%rd4+128];add.s64 %rd18, %rd16, %rd17;shl.b64 %rd20, %rd18, 3;add.s64 %rd21, %rd19, %rd20;ld.global.v2.u32 {%r44, %r45}, [%rd21];mul.wide.s32 %rd23, %r44, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r46, [%rd24+4];ld.global.u32 %r11, [%rd24];sub.s32 %r12, %r46, %r11;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r24, %r12;@%p6 bra BB8_6;xor.b32 %r48, %r45, 2147483647;setp.gt.s32 %p7, %r45, -1;selp.b32 %r49, %r45, %r48, %p7;mov.b32 %f20, %r49;add.s32 %r51, %r11, %r24;ld.param.u64 %rd26, [%rd8+320];cvta.to.global.u64 %rd27, %rd26;mul.wide.s32 %rd28, %r51, 4;add.s64 %rd29, %rd27, %rd28;ld.param.u64 %rd30, [%rd8+336];cvta.to.global.u64 %rd31, %rd30;add.s64 %rd32, %rd31, %rd28;ld.global.u32 %r52, [%rd32];ld.global.u64 %rd33, [%rd4+8];mul.wide.s32 %rd34, %r52, 4;add.s64 %rd35, %rd33, %rd34;ld.global.f32 %f21, [%rd29];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd35];sub.f32 %f45, %f22, %f23;BB8_6:mov.u32 %r53, %ctaid.x;mov.u32 %r54, %ntid.x;mad.lo.s32 %r108, %r54, %r53, %r24;setp.gt.s32 %p8, %r108, 254;@%p8 bra BB8_9;ld.param.u64 %rd37, [%rd8+208];cvta.to.global.u64 %rd5, %rd37;ld.param.u32 %r57, [%rd8+216];mul.lo.s32 %r58, %r57, %r107;cvt.s64.s32 %rd6, %r58;BB8_8:cvt.s64.s32 %rd38, %r108;add.s64 %rd39, %rd6, %rd38;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd5, %rd40;mov.u32 %r62, 0;st.global.u32 [%rd41], %r62;mov.u32 %r64, %nctaid.x;mad.lo.s32 %r108, %r64, %r54, %r108;setp.lt.s32 %p9, %r108, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r67, %f45;mov.u32 %r68, 1;mov.u32 %r69, 31;mov.u32 %r70, -1;shfl.sync.down.b32 %r66, %r67, %r68, %r69, %r70;add.s32 %r71, %r65, 1;setp.gt.u32 %p10, %r71, 31;@%p10 bra BB8_11;mov.b32 %f24, %r66;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r73, %f45;mov.u32 %r74, 2;shfl.sync.down.b32 %r72, %r73, %r74, %r69, %r70;add.s32 %r77, %r65, 2;setp.gt.u32 %p12, %r77, 31;@%p12 bra BB8_13;mov.b32 %f25, %r72;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r79, %f45;mov.u32 %r80, 4;shfl.sync.down.b32 %r78, %r79, %r80, %r69, %r70;add.s32 %r83, %r65, 4;setp.gt.u32 %p14, %r83, 31;@%p14 bra BB8_15;mov.b32 %f26, %r78;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r85, %f45;mov.u32 %r86, 8;shfl.sync.down.b32 %r84, %r85, %r86, %r69, %r70;add.s32 %r89, %r65, 8;setp.gt.u32 %p16, %r89, 31;@%p16 bra BB8_17;mov.b32 %f27, %r84;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r91, %f45;mov.u32 %r92, 16;shfl.sync.down.b32 %r90, %r91, %r92, %r69, %r70;add.s32 %r95, %r65, 16;setp.gt.u32 %p18, %r95, 31;@%p18 bra BB8_19;mov.b32 %f28, %r90;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r65, 0;@%p20 bra BB8_21;add.s32 %r106, %r31, 8;st.shared.f32 [%r106], %f45;BB8_21:setp.eq.s32 %p1, %r24, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r12, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r96, [%rd4+68];setp.gt.s32 %p31, %r96, -1;xor.b32 %r97, %r96, 2147483647;selp.b32 %r98, %r96, %r97, %p31;mov.b32 %f42, %r98;add.f32 %f43, %f45, %f42;mov.b32 %r99, %f43;setp.gt.s32 %p32, %r99, -1;xor.b32 %r100, %r99, 2147483647;selp.b32 %r101, %r99, %r100, %p32;st.global.u32 [%rd4+80], %r101;mov.b32 %r102, %f45;setp.gt.s32 %p33, %r102, -1;xor.b32 %r103, %r102, 2147483647;selp.b32 %r104, %r102, %r103, %p33;st.global.u32 [%rd4+64], %r104;BB8_25:mov.u32 %r105, %nctaid.y;add.s32 %r107, %r105, %r107;setp.lt.s32 %p34, %r107, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<871>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r827, %ctaid.y;setp.ge.s32 %p2, %r827, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r91, %tid.x;shr.u32 %r92, %r91, 5;add.s32 %r93, %r92, %r91;mov.u32 %r94, %nctaid.x;mov.u32 %r95, %ntid.x;mul.lo.s32 %r3, %r94, %r95;shl.b32 %r96, %r93, 2;mov.u32 %r97, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r4, %r97, %r96;shl.b32 %r98, %r93, 3;mov.u32 %r99, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r5, %r99, %r98;mov.u32 %r328, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r12, [%rd1+24];mul.lo.s32 %r100, %r12, %r827;mul.wide.s32 %rd8, %r100, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r13, [%rd3];ld.global.v2.u32 {%r21, %r860}, [%rd3+16];setp.lt.s32 %p3, %r21, 1;@%p3 bra BB10_34;ld.global.u32 %r16, [%rd3+56];ld.global.u32 %r17, [%rd3+80];ld.global.u32 %r23, [%rd3+52];BB10_4:mov.u32 %r22, %r860;mov.u32 %r104, %ctaid.x;mul.lo.s32 %r858, %r95, %r104;mov.u32 %r853, 0;setp.ge.s32 %p4, %r858, %r21;@%p4 bra BB10_22;add.s32 %r27, %r22, -1;mul.lo.s32 %r843, %r95, %r104;mov.u32 %r841, 0;BB10_6:add.s32 %r35, %r843, %r91;mov.u32 %r848, 2147483647;setp.ge.s32 %p5, %r35, %r21;@%p5 bra BB10_14;setp.eq.s32 %p6, %r27, %r23;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r111, [%rd1+72];mul.lo.s32 %r112, %r111, %r13;cvt.s64.s32 %rd5, %r112;mov.u32 %r845, %r27;mov.u32 %r847, %r23;@%p6 bra BB10_11;BB10_8:add.s32 %r113, %r847, 1;setp.eq.s32 %p7, %r113, %r845;@%p7 bra BB10_10;sub.s32 %r114, %r845, %r847;shr.u32 %r115, %r114, 31;add.s32 %r116, %r114, %r115;shr.s32 %r117, %r116, 1;add.s32 %r118, %r117, %r847;cvt.s64.s32 %rd10, %r118;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r119, [%rd13];setp.gt.s32 %p8, %r119, %r35;add.s32 %r120, %r118, -1;selp.b32 %r847, %r847, %r118, %p8;selp.b32 %r845, %r120, %r845, %p8;setp.eq.s32 %p9, %r845, %r847;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r845;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r121, [%rd17];setp.gt.s32 %p10, %r121, %r35;selp.b32 %r847, %r847, %r845, %p10;BB10_11:cvt.s64.s32 %rd18, %r847;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r122, [%rd1+88];mul.lo.s32 %r123, %r122, %r13;cvt.s64.s32 %rd24, %r123;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r124, [%rd21];sub.s32 %r125, %r35, %r124;ld.global.u32 %r126, [%rd27];add.s32 %r849, %r126, %r125;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r849, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r850, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r127, [%rd1+56];mul.lo.s32 %r128, %r127, %r13;cvt.s64.s32 %rd37, %r128;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r129, [%rd40+4];setp.gt.s32 %p11, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r131, %r129, %r130, %p11;mov.b32 %f1, %r131;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r132, %f3;setp.gt.s32 %p12, %r132, -1;xor.b32 %r133, %r132, 2147483647;selp.b32 %r44, %r132, %r133, %p12;ld.global.u32 %r134, [%rd3+64];setp.ge.s32 %p13, %r44, %r134;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r136, [%rd44], %r44;BB10_13:setp.lt.s32 %p14, %r44, %r17;selp.b32 %r848, %r44, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r848, 2147483647;selp.u32 %r137, 1, 0, %p15;st.shared.u32 [%r4+16], %r137;bar.sync 0;setp.gt.u32 %p16, %r91, 31;@%p16 bra BB10_17;mov.u32 %r824, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r174, %r91, 33;shl.b32 %r175, %r174, 2;add.s32 %r177, %r824, %r175;ld.shared.u32 %r178, [%r177+20];ld.shared.u32 %r179, [%r177+16];add.s32 %r180, %r178, %r179;ld.shared.u32 %r181, [%r177+24];add.s32 %r182, %r180, %r181;ld.shared.u32 %r183, [%r177+28];add.s32 %r184, %r182, %r183;ld.shared.u32 %r185, [%r177+32];add.s32 %r186, %r184, %r185;ld.shared.u32 %r187, [%r177+36];add.s32 %r188, %r186, %r187;ld.shared.u32 %r189, [%r177+40];add.s32 %r190, %r188, %r189;ld.shared.u32 %r191, [%r177+44];add.s32 %r192, %r190, %r191;ld.shared.u32 %r193, [%r177+48];add.s32 %r194, %r192, %r193;ld.shared.u32 %r195, [%r177+52];add.s32 %r196, %r194, %r195;ld.shared.u32 %r197, [%r177+56];add.s32 %r198, %r196, %r197;ld.shared.u32 %r199, [%r177+60];add.s32 %r200, %r198, %r199;ld.shared.u32 %r201, [%r177+64];add.s32 %r202, %r200, %r201;ld.shared.u32 %r203, [%r177+68];add.s32 %r204, %r202, %r203;ld.shared.u32 %r205, [%r177+72];add.s32 %r206, %r204, %r205;ld.shared.u32 %r207, [%r177+76];add.s32 %r208, %r206, %r207;ld.shared.u32 %r209, [%r177+80];add.s32 %r210, %r208, %r209;ld.shared.u32 %r211, [%r177+84];add.s32 %r212, %r210, %r211;ld.shared.u32 %r213, [%r177+88];add.s32 %r214, %r212, %r213;ld.shared.u32 %r215, [%r177+92];add.s32 %r216, %r214, %r215;ld.shared.u32 %r217, [%r177+96];add.s32 %r218, %r216, %r217;ld.shared.u32 %r219, [%r177+100];add.s32 %r220, %r218, %r219;ld.shared.u32 %r221, [%r177+104];add.s32 %r222, %r220, %r221;ld.shared.u32 %r223, [%r177+108];add.s32 %r224, %r222, %r223;ld.shared.u32 %r225, [%r177+112];add.s32 %r226, %r224, %r225;ld.shared.u32 %r227, [%r177+116];add.s32 %r228, %r226, %r227;ld.shared.u32 %r229, [%r177+120];add.s32 %r230, %r228, %r229;ld.shared.u32 %r231, [%r177+124];add.s32 %r232, %r230, %r231;ld.shared.u32 %r233, [%r177+128];add.s32 %r234, %r232, %r233;ld.shared.u32 %r235, [%r177+132];add.s32 %r236, %r234, %r235;ld.shared.u32 %r237, [%r177+136];add.s32 %r238, %r236, %r237;ld.shared.u32 %r239, [%r177+140];add.s32 %r142, %r238, %r239;mov.u32 %r140, 1;mov.u32 %r165, 0;mov.u32 %r172, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r142, %r140, %r165, %r172; @p add.s32 r0, r0, %r142; mov.s32 %r138, r0;}mov.u32 %r146, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r138, %r146, %r165, %r172; @p add.s32 r0, r0, %r138; mov.s32 %r144, r0;}mov.u32 %r152, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r144, %r152, %r165, %r172; @p add.s32 r0, r0, %r144; mov.s32 %r150, r0;}mov.u32 %r158, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r150, %r158, %r165, %r172; @p add.s32 r0, r0, %r150; mov.s32 %r156, r0;}mov.u32 %r164, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r156, %r164, %r165, %r172; @p add.s32 r0, r0, %r156; mov.s32 %r162, r0;}mov.u32 %r171, 31;shfl.sync.idx.b32 %r168, %r162, %r171, %r171, %r172;sub.s32 %r240, %r162, %r142;ld.shared.u32 %r241, [%r177+16];add.s32 %r242, %r241, %r240;ld.shared.u32 %r243, [%r177+20];add.s32 %r244, %r243, %r242;ld.shared.u32 %r245, [%r177+24];add.s32 %r246, %r245, %r244;ld.shared.u32 %r247, [%r177+28];add.s32 %r248, %r247, %r246;ld.shared.u32 %r249, [%r177+32];add.s32 %r250, %r249, %r248;ld.shared.u32 %r251, [%r177+36];add.s32 %r252, %r251, %r250;ld.shared.u32 %r253, [%r177+40];add.s32 %r254, %r253, %r252;ld.shared.u32 %r255, [%r177+44];add.s32 %r256, %r255, %r254;ld.shared.u32 %r257, [%r177+48];add.s32 %r258, %r257, %r256;ld.shared.u32 %r259, [%r177+52];add.s32 %r260, %r259, %r258;ld.shared.u32 %r261, [%r177+56];add.s32 %r262, %r261, %r260;ld.shared.u32 %r263, [%r177+60];add.s32 %r264, %r263, %r262;ld.shared.u32 %r265, [%r177+64];add.s32 %r266, %r265, %r264;ld.shared.u32 %r267, [%r177+68];add.s32 %r268, %r267, %r266;ld.shared.u32 %r269, [%r177+72];add.s32 %r270, %r269, %r268;ld.shared.u32 %r271, [%r177+76];add.s32 %r272, %r271, %r270;ld.shared.u32 %r273, [%r177+80];add.s32 %r274, %r273, %r272;ld.shared.u32 %r275, [%r177+84];add.s32 %r276, %r275, %r274;ld.shared.u32 %r277, [%r177+88];add.s32 %r278, %r277, %r276;ld.shared.u32 %r279, [%r177+92];add.s32 %r280, %r279, %r278;ld.shared.u32 %r281, [%r177+96];add.s32 %r282, %r281, %r280;ld.shared.u32 %r283, [%r177+100];add.s32 %r284, %r283, %r282;ld.shared.u32 %r285, [%r177+104];add.s32 %r286, %r285, %r284;ld.shared.u32 %r287, [%r177+108];add.s32 %r288, %r287, %r286;ld.shared.u32 %r289, [%r177+112];add.s32 %r290, %r289, %r288;ld.shared.u32 %r291, [%r177+116];add.s32 %r292, %r291, %r290;ld.shared.u32 %r293, [%r177+120];add.s32 %r294, %r293, %r292;ld.shared.u32 %r295, [%r177+124];add.s32 %r296, %r295, %r294;ld.shared.u32 %r297, [%r177+128];add.s32 %r298, %r297, %r296;ld.shared.u32 %r299, [%r177+132];add.s32 %r300, %r299, %r298;ld.shared.u32 %r301, [%r177+136];add.s32 %r302, %r301, %r300;st.shared.u32 [%r177+16], %r240;st.shared.u32 [%r177+20], %r242;st.shared.u32 [%r177+24], %r244;st.shared.u32 [%r177+28], %r246;st.shared.u32 [%r177+32], %r248;st.shared.u32 [%r177+36], %r250;st.shared.u32 [%r177+40], %r252;st.shared.u32 [%r177+44], %r254;st.shared.u32 [%r177+48], %r256;st.shared.u32 [%r177+52], %r258;st.shared.u32 [%r177+56], %r260;st.shared.u32 [%r177+60], %r262;st.shared.u32 [%r177+64], %r264;st.shared.u32 [%r177+68], %r266;st.shared.u32 [%r177+72], %r268;st.shared.u32 [%r177+76], %r270;st.shared.u32 [%r177+80], %r272;st.shared.u32 [%r177+84], %r274;st.shared.u32 [%r177+88], %r276;st.shared.u32 [%r177+92], %r278;st.shared.u32 [%r177+96], %r280;st.shared.u32 [%r177+100], %r282;st.shared.u32 [%r177+104], %r284;st.shared.u32 [%r177+108], %r286;st.shared.u32 [%r177+112], %r288;st.shared.u32 [%r177+116], %r290;st.shared.u32 [%r177+120], %r292;st.shared.u32 [%r177+124], %r294;st.shared.u32 [%r177+128], %r296;st.shared.u32 [%r177+132], %r298;st.shared.u32 [%r177+136], %r300;st.shared.u32 [%r177+140], %r302;setp.ne.s32 %p17, %r91, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r168;BB10_17:bar.sync 0;ld.shared.u32 %r303, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r853, %r303, %r841;ld.param.u32 %r304, [%rd1+312];setp.lt.s32 %p18, %r853, %r304;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r848, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r307, [%r4+16];add.s32 %r308, %r307, %r841;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r309, [%rd1+136];mul.lo.s32 %r310, %r309, %r827;cvt.s64.s32 %rd47, %r310;cvt.s64.s32 %rd48, %r308;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r850, %r848};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r311, [%rd1+152];mul.lo.s32 %r312, %r311, %r827;cvt.s64.s32 %rd54, %r312;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r313, %r847, %r16;st.global.v2.u32 [%rd57], {%r313, %r849};BB10_21:bar.sync 0;add.s32 %r843, %r3, %r843;setp.lt.s32 %p20, %r843, %r21;mov.u32 %r841, %r853;@%p20 bra BB10_6;BB10_22:mov.u32 %r21, 0;setp.ge.s32 %p21, %r858, %r853;mov.u32 %r860, %r22;@%p21 bra BB10_33;BB10_23:mov.u32 %r861, 0;add.s32 %r63, %r858, %r91;mov.u32 %r862, -1;setp.ge.s32 %p22, %r63, %r853;@%p22 bra BB10_25;add.s32 %r823, %r858, %r91;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r321, [%rd1+136];mul.lo.s32 %r322, %r321, %r827;cvt.s64.s32 %rd60, %r322;cvt.s64.s32 %rd61, %r823;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r857, %r856}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r857, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r325, [%rd68+4];ld.global.u32 %r862, [%rd68];sub.s32 %r861, %r325, %r862;BB10_25:setp.lt.u32 %p1, %r91, 32;setp.ne.s32 %p23, %r862, -1;selp.u32 %r327, 1, 0, %p23;st.shared.v2.u32 [%r5+16], {%r861, %r327};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r822, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r400, %r91, 33;shl.b32 %r401, %r400, 3;add.s32 %r403, %r822, %r401;ld.shared.v2.u32 {%r404, %r405}, [%r403+24];ld.shared.v2.u32 {%r408, %r409}, [%r403+16];add.s32 %r412, %r404, %r408;add.s32 %r413, %r405, %r409;ld.shared.v2.u32 {%r414, %r415}, [%r403+32];add.s32 %r418, %r412, %r414;add.s32 %r419, %r413, %r415;ld.shared.v2.u32 {%r420, %r421}, [%r403+40];add.s32 %r424, %r418, %r420;add.s32 %r425, %r419, %r421;ld.shared.v2.u32 {%r426, %r427}, [%r403+48];add.s32 %r430, %r424, %r426;add.s32 %r431, %r425, %r427;ld.shared.v2.u32 {%r432, %r433}, [%r403+56];add.s32 %r436, %r430, %r432;add.s32 %r437, %r431, %r433;ld.shared.v2.u32 {%r438, %r439}, [%r403+64];add.s32 %r442, %r436, %r438;add.s32 %r443, %r437, %r439;ld.shared.v2.u32 {%r444, %r445}, [%r403+72];add.s32 %r448, %r442, %r444;add.s32 %r449, %r443, %r445;ld.shared.v2.u32 {%r450, %r451}, [%r403+80];add.s32 %r454, %r448, %r450;add.s32 %r455, %r449, %r451;ld.shared.v2.u32 {%r456, %r457}, [%r403+88];add.s32 %r460, %r454, %r456;add.s32 %r461, %r455, %r457;ld.shared.v2.u32 {%r462, %r463}, [%r403+96];add.s32 %r466, %r460, %r462;add.s32 %r467, %r461, %r463;ld.shared.v2.u32 {%r468, %r469}, [%r403+104];add.s32 %r472, %r466, %r468;add.s32 %r473, %r467, %r469;ld.shared.v2.u32 {%r474, %r475}, [%r403+112];add.s32 %r478, %r472, %r474;add.s32 %r479, %r473, %r475;ld.shared.v2.u32 {%r480, %r481}, [%r403+120];add.s32 %r484, %r478, %r480;add.s32 %r485, %r479, %r481;ld.shared.v2.u32 {%r486, %r487}, [%r403+128];add.s32 %r490, %r484, %r486;add.s32 %r491, %r485, %r487;ld.shared.v2.u32 {%r492, %r493}, [%r403+136];add.s32 %r496, %r490, %r492;add.s32 %r497, %r491, %r493;ld.shared.v2.u32 {%r498, %r499}, [%r403+144];add.s32 %r502, %r496, %r498;add.s32 %r503, %r497, %r499;ld.shared.v2.u32 {%r504, %r505}, [%r403+152];add.s32 %r508, %r502, %r504;add.s32 %r509, %r503, %r505;ld.shared.v2.u32 {%r510, %r511}, [%r403+160];add.s32 %r514, %r508, %r510;add.s32 %r515, %r509, %r511;ld.shared.v2.u32 {%r516, %r517}, [%r403+168];add.s32 %r520, %r514, %r516;add.s32 %r521, %r515, %r517;ld.shared.v2.u32 {%r522, %r523}, [%r403+176];add.s32 %r526, %r520, %r522;add.s32 %r527, %r521, %r523;ld.shared.v2.u32 {%r528, %r529}, [%r403+184];add.s32 %r532, %r526, %r528;add.s32 %r533, %r527, %r529;ld.shared.v2.u32 {%r534, %r535}, [%r403+192];add.s32 %r538, %r532, %r534;add.s32 %r539, %r533, %r535;ld.shared.v2.u32 {%r540, %r541}, [%r403+200];add.s32 %r544, %r538, %r540;add.s32 %r545, %r539, %r541;ld.shared.v2.u32 {%r546, %r547}, [%r403+208];add.s32 %r550, %r544, %r546;add.s32 %r551, %r545, %r547;ld.shared.v2.u32 {%r552, %r553}, [%r403+216];add.s32 %r556, %r550, %r552;add.s32 %r557, %r551, %r553;ld.shared.v2.u32 {%r558, %r559}, [%r403+224];add.s32 %r562, %r556, %r558;add.s32 %r563, %r557, %r559;ld.shared.v2.u32 {%r564, %r565}, [%r403+232];add.s32 %r568, %r562, %r564;add.s32 %r569, %r563, %r565;ld.shared.v2.u32 {%r570, %r571}, [%r403+240];add.s32 %r574, %r568, %r570;add.s32 %r575, %r569, %r571;ld.shared.v2.u32 {%r576, %r577}, [%r403+248];add.s32 %r580, %r574, %r576;add.s32 %r581, %r575, %r577;ld.shared.v2.u32 {%r582, %r583}, [%r403+256];add.s32 %r586, %r580, %r582;add.s32 %r587, %r581, %r583;ld.shared.v2.u32 {%r588, %r589}, [%r403+264];add.s32 %r330, %r586, %r588;add.s32 %r335, %r587, %r589;mov.u32 %r396, 1;mov.u32 %r397, 0;mov.u32 %r398, -1;shfl.sync.up.b32 %r329, %r330, %r396, %r397, %r398;shfl.sync.up.b32 %r334, %r335, %r396, %r397, %r398;setp.lt.s32 %p24, %r328, 1;selp.b32 %r592, 0, %r329, %p24;add.s32 %r340, %r592, %r330;selp.b32 %r593, 0, %r334, %p24;add.s32 %r345, %r593, %r335;mov.u32 %r346, 2;shfl.sync.up.b32 %r339, %r340, %r346, %r397, %r398;shfl.sync.up.b32 %r344, %r345, %r346, %r397, %r398;setp.lt.s32 %p25, %r328, 2;selp.b32 %r594, 0, %r339, %p25;add.s32 %r350, %r594, %r340;selp.b32 %r595, 0, %r344, %p25;add.s32 %r355, %r595, %r345;mov.u32 %r356, 4;shfl.sync.up.b32 %r349, %r350, %r356, %r397, %r398;shfl.sync.up.b32 %r354, %r355, %r356, %r397, %r398;setp.lt.s32 %p26, %r328, 4;selp.b32 %r596, 0, %r349, %p26;add.s32 %r360, %r596, %r350;selp.b32 %r597, 0, %r354, %p26;add.s32 %r365, %r597, %r355;mov.u32 %r366, 8;shfl.sync.up.b32 %r359, %r360, %r366, %r397, %r398;shfl.sync.up.b32 %r364, %r365, %r366, %r397, %r398;setp.lt.s32 %p27, %r328, 8;selp.b32 %r598, 0, %r359, %p27;add.s32 %r370, %r598, %r360;selp.b32 %r599, 0, %r364, %p27;add.s32 %r375, %r599, %r365;mov.u32 %r376, 16;shfl.sync.up.b32 %r369, %r370, %r376, %r397, %r398;shfl.sync.up.b32 %r374, %r375, %r376, %r397, %r398;setp.lt.s32 %p28, %r328, 16;selp.b32 %r600, 0, %r369, %p28;add.s32 %r390, %r600, %r370;selp.b32 %r601, 0, %r374, %p28;add.s32 %r395, %r601, %r375;mov.u32 %r387, 31;shfl.sync.idx.b32 %r379, %r390, %r387, %r387, %r398;shfl.sync.idx.b32 %r384, %r395, %r387, %r387, %r398;shfl.sync.up.b32 %r389, %r390, %r396, %r397, %r398;shfl.sync.up.b32 %r394, %r395, %r396, %r397, %r398;setp.eq.s32 %p29, %r328, 0;ld.shared.v2.u32 {%r602, %r603}, [%r403+16];ld.shared.v2.u32 {%r606, %r607}, [%r403+24];ld.shared.v2.u32 {%r610, %r611}, [%r403+32];ld.shared.v2.u32 {%r614, %r615}, [%r403+40];ld.shared.v2.u32 {%r618, %r619}, [%r403+48];ld.shared.v2.u32 {%r622, %r623}, [%r403+56];ld.shared.v2.u32 {%r626, %r627}, [%r403+64];ld.shared.v2.u32 {%r630, %r631}, [%r403+72];ld.shared.v2.u32 {%r634, %r635}, [%r403+80];ld.shared.v2.u32 {%r638, %r639}, [%r403+88];ld.shared.v2.u32 {%r642, %r643}, [%r403+96];ld.shared.v2.u32 {%r646, %r647}, [%r403+104];ld.shared.v2.u32 {%r650, %r651}, [%r403+112];ld.shared.v2.u32 {%r654, %r655}, [%r403+120];ld.shared.v2.u32 {%r658, %r659}, [%r403+128];ld.shared.v2.u32 {%r662, %r663}, [%r403+136];ld.shared.v2.u32 {%r666, %r667}, [%r403+144];ld.shared.v2.u32 {%r670, %r671}, [%r403+152];ld.shared.v2.u32 {%r674, %r675}, [%r403+160];ld.shared.v2.u32 {%r678, %r679}, [%r403+168];ld.shared.v2.u32 {%r682, %r683}, [%r403+176];ld.shared.v2.u32 {%r686, %r687}, [%r403+184];ld.shared.v2.u32 {%r690, %r691}, [%r403+192];ld.shared.v2.u32 {%r694, %r695}, [%r403+200];ld.shared.v2.u32 {%r698, %r699}, [%r403+208];ld.shared.v2.u32 {%r702, %r703}, [%r403+216];ld.shared.v2.u32 {%r706, %r707}, [%r403+224];ld.shared.v2.u32 {%r710, %r711}, [%r403+232];ld.shared.v2.u32 {%r714, %r715}, [%r403+240];ld.shared.v2.u32 {%r718, %r719}, [%r403+248];ld.shared.v2.u32 {%r722, %r723}, [%r403+256];selp.b32 %r726, 0, %r389, %p29;selp.b32 %r727, 0, %r394, %p29;st.shared.v2.u32 [%r403+16], {%r726, %r727};add.s32 %r728, %r603, %r727;add.s32 %r729, %r602, %r726;st.shared.v2.u32 [%r403+24], {%r729, %r728};add.s32 %r730, %r607, %r728;add.s32 %r731, %r606, %r729;st.shared.v2.u32 [%r403+32], {%r731, %r730};add.s32 %r732, %r611, %r730;add.s32 %r733, %r610, %r731;st.shared.v2.u32 [%r403+40], {%r733, %r732};add.s32 %r734, %r615, %r732;add.s32 %r735, %r614, %r733;st.shared.v2.u32 [%r403+48], {%r735, %r734};add.s32 %r736, %r619, %r734;add.s32 %r737, %r618, %r735;st.shared.v2.u32 [%r403+56], {%r737, %r736};add.s32 %r738, %r623, %r736;add.s32 %r739, %r622, %r737;st.shared.v2.u32 [%r403+64], {%r739, %r738};add.s32 %r740, %r627, %r738;add.s32 %r741, %r626, %r739;st.shared.v2.u32 [%r403+72], {%r741, %r740};add.s32 %r742, %r631, %r740;add.s32 %r743, %r630, %r741;st.shared.v2.u32 [%r403+80], {%r743, %r742};add.s32 %r744, %r635, %r742;add.s32 %r745, %r634, %r743;st.shared.v2.u32 [%r403+88], {%r745, %r744};add.s32 %r746, %r639, %r744;add.s32 %r747, %r638, %r745;st.shared.v2.u32 [%r403+96], {%r747, %r746};add.s32 %r748, %r643, %r746;add.s32 %r749, %r642, %r747;st.shared.v2.u32 [%r403+104], {%r749, %r748};add.s32 %r750, %r647, %r748;add.s32 %r751, %r646, %r749;st.shared.v2.u32 [%r403+112], {%r751, %r750};add.s32 %r752, %r651, %r750;add.s32 %r753, %r650, %r751;st.shared.v2.u32 [%r403+120], {%r753, %r752};add.s32 %r754, %r655, %r752;add.s32 %r755, %r654, %r753;st.shared.v2.u32 [%r403+128], {%r755, %r754};add.s32 %r756, %r659, %r754;add.s32 %r757, %r658, %r755;st.shared.v2.u32 [%r403+136], {%r757, %r756};add.s32 %r758, %r663, %r756;add.s32 %r759, %r662, %r757;st.shared.v2.u32 [%r403+144], {%r759, %r758};add.s32 %r760, %r667, %r758;add.s32 %r761, %r666, %r759;st.shared.v2.u32 [%r403+152], {%r761, %r760};add.s32 %r762, %r671, %r760;add.s32 %r763, %r670, %r761;st.shared.v2.u32 [%r403+160], {%r763, %r762};add.s32 %r764, %r675, %r762;add.s32 %r765, %r674, %r763;st.shared.v2.u32 [%r403+168], {%r765, %r764};add.s32 %r766, %r679, %r764;add.s32 %r767, %r678, %r765;st.shared.v2.u32 [%r403+176], {%r767, %r766};add.s32 %r768, %r683, %r766;add.s32 %r769, %r682, %r767;st.shared.v2.u32 [%r403+184], {%r769, %r768};add.s32 %r770, %r687, %r768;add.s32 %r771, %r686, %r769;st.shared.v2.u32 [%r403+192], {%r771, %r770};add.s32 %r772, %r691, %r770;add.s32 %r773, %r690, %r771;st.shared.v2.u32 [%r403+200], {%r773, %r772};add.s32 %r774, %r695, %r772;add.s32 %r775, %r694, %r773;st.shared.v2.u32 [%r403+208], {%r775, %r774};add.s32 %r776, %r699, %r774;add.s32 %r777, %r698, %r775;st.shared.v2.u32 [%r403+216], {%r777, %r776};add.s32 %r778, %r703, %r776;add.s32 %r779, %r702, %r777;st.shared.v2.u32 [%r403+224], {%r779, %r778};add.s32 %r780, %r707, %r778;add.s32 %r781, %r706, %r779;st.shared.v2.u32 [%r403+232], {%r781, %r780};add.s32 %r782, %r711, %r780;add.s32 %r783, %r710, %r781;st.shared.v2.u32 [%r403+240], {%r783, %r782};add.s32 %r784, %r715, %r782;add.s32 %r785, %r714, %r783;st.shared.v2.u32 [%r403+248], {%r785, %r784};add.s32 %r786, %r719, %r784;add.s32 %r787, %r718, %r785;st.shared.v2.u32 [%r403+256], {%r787, %r786};add.s32 %r788, %r723, %r786;add.s32 %r789, %r722, %r787;st.shared.v2.u32 [%r403+264], {%r789, %r788};setp.ne.s32 %p30, %r91, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r379, %r384};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r790, %r791}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r76, %r791, %r860;ld.param.u32 %r792, [%rd1+308];setp.lt.s32 %p31, %r76, %r792;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r77, %r790, %r21;setp.eq.s32 %p32, %r862, -1;@%p32 bra BB10_32;add.s32 %r825, %r858, %r91;ld.shared.v2.u32 {%r795, %r796}, [%r5+16];add.s32 %r799, %r796, %r860;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r800, [%rd1+88];mul.lo.s32 %r801, %r800, %r13;cvt.s64.s32 %rd71, %r801;cvt.s64.s32 %rd72, %r799;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r862;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r802, [%rd1+72];mul.lo.s32 %r803, %r802, %r13;cvt.s64.s32 %rd78, %r803;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r804, %r795, %r21;st.global.u32 [%rd81], %r804;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r805, [%rd1+56];mul.lo.s32 %r806, %r805, %r13;cvt.s64.s32 %rd84, %r806;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r857, %r856};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r807, [%rd1+120];mul.lo.s32 %r808, %r807, %r827;cvt.s64.s32 %rd90, %r808;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r809, [%rd1+152];mul.lo.s32 %r810, %r809, %r827;cvt.s64.s32 %rd96, %r810;cvt.s64.s32 %rd97, %r825;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r811, [%rd1+104];mul.lo.s32 %r812, %r811, %r827;cvt.s64.s32 %rd104, %r812;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r813, 0;st.global.u32 [%rd107], %r813;BB10_32:bar.sync 0;add.s32 %r858, %r3, %r858;setp.lt.s32 %p33, %r858, %r853;mov.u32 %r21, %r77;mov.u32 %r860, %r76;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r21, 0;mov.u32 %r23, %r22;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r305, [%rd3+48];or.b32 %r306, %r305, 2;st.global.u32 [%rd3+48], %r306;mov.u32 %r860, %r22;bra.uni BB10_34;BB10_29:ld.global.u32 %r793, [%rd3+48];or.b32 %r794, %r793, 1;st.global.u32 [%rd3+48], %r794;BB10_34:setp.ne.s32 %p35, %r91, 0;@%p35 bra BB10_36;mov.u32 %r815, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r816, [%rd1+40];mul.lo.s32 %r817, %r816, %r827;mul.wide.s32 %rd110, %r817, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r815, %r860};st.global.v2.u32 [%rd111+16], {%r815, %r860};BB10_36:ld.param.u32 %r819, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r818, %nctaid.y;add.s32 %r827, %r818, %r827;setp.lt.s32 %p36, %r827, %r819;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<58>;.reg .b64 %rd<31>;mov.b64 %rd7, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r53, %ctaid.y;setp.ge.s32 %p1, %r53, %r2;@%p1 bra BB11_15;and.b16 %rs2, %rs1, 255;BB11_2:mov.u64 %rd8, %rd7;ld.param.u64 %rd9, [%rd8+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd8+24];mul.lo.s32 %r23, %r22, %r53;mul.wide.s32 %rd11, %r23, 136;add.s64 %rd1, %rd10, %rd11;ld.param.u64 %rd12, [%rd8];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r24, [%rd8+8];ld.global.u32 %r4, [%rd1];mul.lo.s32 %r25, %r24, %r4;cvt.s64.s32 %rd3, %r25;mul.wide.s32 %rd13, %r25, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd4, %rd14, 4;mov.u32 %r26, %ctaid.x;mov.u32 %r27, %ntid.x;mov.u32 %r28, %tid.x;mad.lo.s32 %r57, %r27, %r26, %r28;ld.global.u32 %r5, [%rd14+4];setp.ge.s32 %p2, %r57, %r5;@%p2 bra BB11_14;ld.global.u32 %r6, [%rd4+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd3, 40;add.s64 %rd16, %rd2, %rd15;add.s64 %rd5, %rd16, 24;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r57, 0;@%p13 bra BB11_13;mov.u32 %r49, 0;st.global.u32 [%rd1+120], %r49;BB11_13:mov.u32 %r50, %nctaid.x;mad.lo.s32 %r57, %r50, %r27, %r57;setp.lt.s32 %p14, %r57, %r5;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r57, 0;@%p4 bra BB11_6;mov.u32 %r33, 0;st.global.u32 [%rd1+120], %r33;BB11_6:ld.param.u64 %rd18, [%rd8+48];cvta.to.global.u64 %rd19, %rd18;ld.param.u32 %r34, [%rd8+56];mul.lo.s32 %r35, %r34, %r4;cvt.s64.s32 %rd20, %r35;cvt.s64.s32 %rd21, %r57;add.s64 %rd22, %rd20, %rd21;shl.b64 %rd23, %rd22, 3;add.s64 %rd24, %rd19, %rd23;ld.global.v2.u32 {%r36, %r37}, [%rd24];setp.gt.s32 %p5, %r37, -1;xor.b32 %r40, %r37, 2147483647;selp.b32 %r41, %r37, %r40, %p5;mov.b32 %f2, %r41;ld.param.u64 %rd25, [%rd8+360];cvta.to.global.u64 %rd26, %rd25;mul.wide.s32 %rd27, %r36, 4;add.s64 %rd28, %rd26, %rd27;ld.global.f32 %f3, [%rd28];add.f32 %f4, %f2, %f3;mov.b32 %r42, %f4;setp.gt.s32 %p6, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r9, %r42, %r43, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r55, %r56}, [%rd4+20];setp.le.s32 %p8, %r55, %r9;@%p8 bra BB11_10;add.s32 %r46, %r57, %r6;mov.b64 %rd6, {%r9, %r46};BB11_9:mov.b64 %rd29, {%r55, %r56};atom.global.cas.b64 %rd30, [%rd5], %rd29, %rd6;mov.b64 {%r55, %r56}, %rd30;setp.gt.s32 %p9, %r55, %r9;setp.ne.s64 %p10, %rd30, %rd29;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:mov.u32 %r47, %nctaid.x;mad.lo.s32 %r57, %r47, %r27, %r57;setp.lt.s32 %p12, %r57, %r5;@%p12 bra BB11_4;BB11_14:mov.u32 %r52, %nctaid.y;add.s32 %r53, %r52, %r53;setp.lt.s32 %p15, %r53, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<74>;.reg .b64 %rd<51>;mov.b64 %rd5, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r70, %ctaid.y;setp.ge.s32 %p2, %r70, %r2;@%p2 bra BB12_17;and.b16 %rs2, %rs1, 255;BB12_2:mov.u64 %rd6, %rd5;ld.param.u64 %rd7, [%rd6+16];cvta.to.global.u64 %rd1, %rd7;ld.param.u32 %r27, [%rd6+24];mul.lo.s32 %r28, %r27, %r70;cvt.s64.s32 %rd2, %r28;mul.wide.s32 %rd8, %r28, 136;add.s64 %rd3, %rd1, %rd8;ld.param.u64 %rd9, [%rd6];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r29, [%rd6+8];ld.global.u32 %r4, [%rd3];mul.lo.s32 %r30, %r29, %r4;mul.wide.s32 %rd11, %r30, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r5, [%rd12+12];ld.global.v2.u32 {%r31, %r32}, [%rd12+24];setp.ne.s32 %p3, %r31, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r33, %r34}, [%rd12+32];selp.b32 %r11, %r31, %r33, %p1;setp.gt.s32 %p5, %r11, -1;xor.b32 %r35, %r11, 2147483647;selp.b32 %r36, %r11, %r35, %p5;mov.b32 %f3, %r36;ld.param.f32 %f4, [%rd6+376];add.f32 %f5, %f4, %f3;mov.b32 %r37, %f5;setp.gt.s32 %p6, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r12, %r37, %r38, %p6;mov.u32 %r39, %ctaid.x;mov.u32 %r40, %ntid.x;mov.u32 %r41, %tid.x;mad.lo.s32 %r72, %r40, %r39, %r41;ld.global.u32 %r13, [%rd12+4];setp.ge.s32 %p7, %r72, %r13;@%p7 bra BB12_16;selp.b32 %r14, %r32, %r34, %p1;selp.u32 %r15, 1, 0, %p3;mul.lo.s64 %rd13, %rd2, 136;add.s64 %rd14, %rd1, %rd13;add.s64 %rd4, %rd14, 120;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r72, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd3+112], {%r11, %r14};st.global.u32 [%rd3+124], %r15;BB12_11:ld.param.u64 %rd32, [%rd6+48];cvta.to.global.u64 %rd33, %rd32;ld.param.u32 %r55, [%rd6+56];mul.lo.s32 %r56, %r55, %r4;cvt.s64.s32 %rd34, %r56;cvt.s64.s32 %rd35, %r72;add.s64 %rd36, %rd34, %rd35;shl.b64 %rd37, %rd36, 3;add.s64 %rd38, %rd33, %rd37;ld.param.u64 %rd39, [%rd6+360];cvta.to.global.u64 %rd40, %rd39;ld.global.v2.u32 {%r57, %r58}, [%rd38];mul.wide.s32 %rd41, %r57, 4;add.s64 %rd42, %rd40, %rd41;ld.global.f32 %f1, [%rd42];mov.u32 %r73, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r59, %r58, 2147483647;setp.gt.s32 %p14, %r58, -1;selp.b32 %r60, %r58, %r59, %p14;mov.b32 %f6, %r60;add.f32 %f7, %f6, %f1;mov.b32 %r61, %f7;setp.gt.s32 %p15, %r61, -1;xor.b32 %r62, %r61, 2147483647;selp.b32 %r73, %r61, %r62, %p15;BB12_13:setp.ge.s32 %p16, %r73, %r12;@%p16 bra BB12_15;atom.global.add.u32 %r63, [%rd4], 1;ld.param.u64 %rd44, [%rd6+176];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r64, [%rd6+184];mul.lo.s32 %r65, %r64, %r70;cvt.s64.s32 %rd46, %r65;cvt.s64.s32 %rd47, %r63;add.s64 %rd48, %rd46, %rd47;shl.b64 %rd49, %rd48, 3;add.s64 %rd50, %rd45, %rd49;add.s32 %r66, %r72, %r5;st.global.v2.u32 [%rd50], {%r66, %r73};BB12_15:mov.u32 %r67, %nctaid.x;mad.lo.s32 %r72, %r67, %r40, %r72;setp.lt.s32 %p17, %r72, %r13;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r72, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd3+112], {%r11, %r14};st.global.u32 [%rd3+124], %r15;BB12_6:ld.param.u64 %rd16, [%rd6+48];cvta.to.global.u64 %rd17, %rd16;ld.param.u32 %r46, [%rd6+56];mul.lo.s32 %r47, %r46, %r4;cvt.s64.s32 %rd18, %r47;cvt.s64.s32 %rd19, %r72;add.s64 %rd20, %rd18, %rd19;shl.b64 %rd21, %rd20, 3;add.s64 %rd22, %rd17, %rd21;ld.global.u32 %r18, [%rd22+4];setp.ge.s32 %p10, %r18, %r12;@%p10 bra BB12_8;atom.global.add.u32 %r48, [%rd4], 1;ld.param.u64 %rd24, [%rd6+176];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r49, [%rd6+184];mul.lo.s32 %r50, %r49, %r70;cvt.s64.s32 %rd26, %r50;cvt.s64.s32 %rd27, %r48;add.s64 %rd28, %rd26, %rd27;shl.b64 %rd29, %rd28, 3;add.s64 %rd30, %rd25, %rd29;add.s32 %r51, %r72, %r5;st.global.v2.u32 [%rd30], {%r51, %r18};BB12_8:mov.u32 %r52, %nctaid.x;mad.lo.s32 %r72, %r52, %r40, %r72;setp.lt.s32 %p11, %r72, %r13;@%p11 bra BB12_4;BB12_16:mov.u32 %r69, %nctaid.y;add.s32 %r70, %r69, %r70;setp.lt.s32 %p18, %r70, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<34>;.reg .b16 %rs<16>;.reg .f32 %f<9>;.reg .b32 %r<290>;.reg .b64 %rd<80>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd12, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];ld.param.s8 %rs5, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];mov.u32 %r281, %ctaid.y;setp.ge.s32 %p10, %r281, %r2;@%p10 bra BB14_43;mov.u32 %r88, %laneid;BB14_2:mov.u64 %rd13, %rd12;ld.param.u64 %rd14, [%rd13+16];cvta.to.global.u64 %rd1, %rd14;ld.param.u32 %r45, [%rd13+24];mul.lo.s32 %r46, %r45, %r281;cvt.s64.s32 %rd2, %r46;mul.wide.s32 %rd15, %r46, 136;add.s64 %rd3, %rd1, %rd15;ld.global.u32 %r4, [%rd3];and.b16 %rs6, %rs5, 255;setp.eq.s16 %p11, %rs6, 0;@%p11 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd18, %rd2, 136;add.s64 %rd19, %rd1, %rd18;add.s64 %rd78, %rd19, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd16, %rd2, 136;add.s64 %rd17, %rd1, %rd16;add.s64 %rd78, %rd17, 36;BB14_5:ld.global.u32 %r5, [%rd78];ld.global.u8 %rs7, [%rd3+96];setp.ne.s16 %p12, %rs7, 0;@%p12 bra BB14_8;ld.param.u32 %r47, [%rd13+396];setp.le.s32 %p13, %r5, %r47;@%p13 bra BB14_42;mov.u16 %rs8, 1;st.global.u8 [%rd3+96], %rs8;BB14_8:mov.u32 %r289, %tid.x;shl.b32 %r49, %r289, 2;mov.u32 %r50, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r51, %r50, %r49;mov.u32 %r52, 0;st.shared.u32 [%r51], %r52;ld.global.f32 %f1, [%rd3+84];ld.global.v2.f32 {%f5, %f6}, [%rd3+88];mov.u32 %r53, %ctaid.x;mov.u32 %r54, %ntid.x;mul.lo.s32 %r282, %r54, %r53;setp.ge.s32 %p14, %r282, %r5;@%p14 bra BB14_32;BB14_9:mov.u32 %r56, %tid.x;add.s32 %r8, %r282, %r56;mov.u16 %rs9, 255;setp.ge.s32 %p15, %r8, %r5;@%p15 bra BB14_10;cvt.s64.s32 %rd7, %r8;@%p11 bra BB14_13;bra.uni BB14_12;BB14_13:ld.param.u64 %rd29, [%rd13+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r59, [%rd13+56];mul.lo.s32 %r60, %r59, %r4;cvt.s64.s32 %rd31, %r60;add.s64 %rd32, %rd31, %rd7;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd30, %rd33;add.s64 %rd79, %rd34, 4;bra.uni BB14_14;BB14_10:mov.u16 %rs15, %rs9;bra.uni BB14_17;BB14_12:ld.param.u64 %rd22, [%rd13+128];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r57, [%rd13+136];mul.lo.s32 %r58, %r57, %r281;cvt.s64.s32 %rd24, %r58;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 3;add.s64 %rd27, %rd23, %rd26;add.s64 %rd79, %rd27, 4;BB14_14:ld.global.u32 %r62, [%rd79];setp.gt.s32 %p17, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p17;mov.b32 %f7, %r64;sub.f32 %f4, %f7, %f1;mov.u16 %rs15, 0;setp.le.f32 %p18, %f4, 0f00000000;mov.u32 %r283, %r52;@%p18 bra BB14_18;setp.geu.f32 %p19, %f4, %f5;mov.u16 %rs15, %rs9;mov.u32 %r283, %r52;@%p19 bra BB14_18;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r67, %f8;add.s32 %r68, %r67, 1;cvt.u16.u32 %rs15, %r68;BB14_17:mov.u32 %r283, %r52;bra.uni BB14_18;BB14_44:bar.sync 0;BB14_18:shl.b32 %r73, %r56, 2;mov.u32 %r74, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r75, %r74, %r73;st.shared.u32 [%r75], %r52;st.shared.u32 [%r75+1024], %r52;st.shared.u32 [%r75+2048], %r52;st.shared.u32 [%r75+3072], %r52;st.shared.u32 [%r75+4096], %r52;st.shared.u32 [%r75+5120], %r52;st.shared.u32 [%r75+6144], %r52;st.shared.u32 [%r75+7168], %r52;st.shared.u32 [%r75+8192], %r52;mov.u32 %r77, 8;sub.s32 %r78, %r77, %r283;mov.u32 %r79, 4;min.s32 %r72, %r78, %r79;cvt.u32.u16 %r80, %rs15;and.b32 %r70, %r80, 255;bfe.u32 %r69, %r70, %r283, %r72;and.b32 %r81, %r69, 7;shl.b32 %r82, %r81, 10;add.s32 %r83, %r74, %r82;add.s32 %r84, %r83, %r73;shr.u32 %r85, %r69, 2;and.b32 %r86, %r85, 1073741822;add.s32 %r11, %r84, %r86;ld.shared.u16 %r12, [%r11];add.s32 %r87, %r12, 1;st.shared.u16 [%r11], %r87;bar.sync 0;mad.lo.s32 %r120, %r56, 36, %r74;ld.shared.u32 %r121, [%r120+4];ld.shared.u32 %r122, [%r120];add.s32 %r123, %r121, %r122;ld.shared.u32 %r124, [%r120+8];add.s32 %r125, %r124, %r123;ld.shared.u32 %r126, [%r120+12];add.s32 %r127, %r126, %r125;ld.shared.u32 %r128, [%r120+16];add.s32 %r129, %r128, %r127;ld.shared.u32 %r130, [%r120+20];add.s32 %r131, %r130, %r129;ld.shared.u32 %r132, [%r120+24];add.s32 %r133, %r132, %r131;ld.shared.u32 %r134, [%r120+28];add.s32 %r135, %r134, %r133;ld.shared.u32 %r136, [%r120+32];add.s32 %r93, %r136, %r135;mov.u32 %r91, 1;mov.u32 %r116, 0;mov.u32 %r118, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r93, %r91, %r116, %r118; @p add.u32 r0, r0, %r93; mov.u32 %r89, r0;}mov.u32 %r97, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r89, %r97, %r116, %r118; @p add.u32 r0, r0, %r89; mov.u32 %r95, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r95, %r79, %r116, %r118; @p add.u32 r0, r0, %r95; mov.u32 %r101, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r101, %r77, %r116, %r118; @p add.u32 r0, r0, %r101; mov.u32 %r107, r0;}mov.u32 %r115, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r107, %r115, %r116, %r118; @p add.u32 r0, r0, %r107; mov.u32 %r113, r0;}setp.ne.s32 %p20, %r88, 31;@%p20 bra BB14_20;shr.u32 %r138, %r56, 3;and.b32 %r139, %r138, 536870908;add.s32 %r141, %r74, %r139;st.shared.u32 [%r141+9216], %r113;BB14_20:sub.s32 %r16, %r113, %r93;shr.u32 %r143, %r56, 5;setp.eq.s32 %p1, %r143, 0;setp.eq.s32 %p2, %r143, 7;setp.eq.s32 %p3, %r143, 6;setp.eq.s32 %p4, %r143, 5;setp.eq.s32 %p5, %r143, 4;setp.eq.s32 %p6, %r143, 3;setp.eq.s32 %p7, %r143, 2;bar.sync 0;ld.shared.v4.u32 {%r144, %r145, %r146, %r147}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r150, %r145, %r144;selp.b32 %r151, %r150, %r144, %p7;add.s32 %r153, %r150, %r146;selp.b32 %r154, %r153, %r151, %p6;add.s32 %r156, %r153, %r147;selp.b32 %r157, %r156, %r154, %p5;ld.shared.v4.u32 {%r158, %r159, %r160, %r161}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r163, %r156, %r158;selp.b32 %r164, %r163, %r157, %p4;add.s32 %r166, %r163, %r159;selp.b32 %r167, %r166, %r164, %p3;add.s32 %r17, %r166, %r160;selp.b32 %r169, %r17, %r167, %p2;setp.eq.s32 %p21, %r88, 0;selp.b32 %r170, 0, %r16, %p21;add.s32 %r171, %r169, %r170;selp.b32 %r284, %r16, %r171, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r172, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r173, %r17, %r172;shl.b32 %r19, %r173, 16;setp.ne.s32 %p22, %r88, 0;@%p22 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r19;mov.u32 %r284, %r19;BB14_23:setp.eq.s32 %p8, %r56, 0;bar.sync 0;@%p8 bra BB14_25;ld.shared.u32 %r174, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r284, %r174, %r284;BB14_25:ld.shared.u32 %r177, [%r120];add.s32 %r178, %r177, %r284;ld.shared.u32 %r179, [%r120+4];ld.shared.u32 %r180, [%r120+8];ld.shared.u32 %r181, [%r120+12];ld.shared.u32 %r182, [%r120+16];ld.shared.u32 %r183, [%r120+20];ld.shared.u32 %r184, [%r120+24];ld.shared.u32 %r185, [%r120+28];st.shared.u32 [%r120], %r284;add.s32 %r186, %r179, %r178;st.shared.u32 [%r120+4], %r178;add.s32 %r187, %r180, %r186;st.shared.u32 [%r120+8], %r186;add.s32 %r188, %r181, %r187;st.shared.u32 [%r120+12], %r187;add.s32 %r189, %r182, %r188;st.shared.u32 [%r120+16], %r188;add.s32 %r190, %r183, %r189;st.shared.u32 [%r120+20], %r189;add.s32 %r191, %r184, %r190;st.shared.u32 [%r120+24], %r190;add.s32 %r192, %r185, %r191;st.shared.u32 [%r120+28], %r191;st.shared.u32 [%r120+32], %r192;bar.sync 0;ld.shared.u16 %r193, [%r11];add.s32 %r24, %r193, %r12;bar.sync 0;add.s32 %r195, %r74, %r24;st.shared.u8 [%r195], %rs15;bar.sync 0;add.s32 %r25, %r74, %r56;ld.shared.u8 %rs15, [%r25];add.s32 %r283, %r283, 4;setp.lt.s32 %p23, %r283, 8;@%p23 bra BB14_44;bar.sync 0;mov.u32 %r199, 256;st.shared.u32 [%r75+512], %r199;st.shared.u32 [%r75+1536], %r199;bar.sync 0;st.shared.u8 [%r25+256], %rs15;bar.sync 0;mul.wide.u16 %r200, %rs15, 4;add.s32 %r202, %r74, %r200;@%p8 bra BB14_29;ld.shared.u8 %rs4, [%r25+255];setp.eq.s16 %p24, %rs4, %rs15;@%p24 bra BB14_29;add.s32 %r279, %r202, 512;st.shared.u32 [%r279], %r56;mul.wide.u16 %r207, %rs4, 4;add.s32 %r209, %r74, %r207;st.shared.u32 [%r209+1536], %r56;BB14_29:setp.ne.s32 %p25, %r56, 0;@%p25 bra BB14_31;add.s32 %r280, %r202, 512;st.shared.u32 [%r280], %r116;BB14_31:add.s32 %r31, %r50, %r73;bar.sync 0;ld.shared.u32 %r213, [%r75+512];ld.shared.u32 %r214, [%r75+1536];sub.s32 %r215, %r214, %r213;ld.shared.u32 %r216, [%r31];add.s32 %r217, %r215, %r216;st.shared.u32 [%r31], %r217;bar.sync 0;mov.u32 %r218, %nctaid.x;mad.lo.s32 %r282, %r218, %r54, %r282;setp.lt.s32 %p26, %r282, %r5;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r289, 254;@%p27 bra BB14_41;mov.u32 %r220, 254;sub.s32 %r221, %r220, %r289;shr.u32 %r222, %r221, 8;add.s32 %r223, %r222, 1;and.b32 %r224, %r223, 3;setp.eq.s32 %p28, %r224, 0;@%p28 bra BB14_39;mov.u32 %r287, %tid.x;sub.s32 %r226, %r220, %r287;shr.u32 %r227, %r226, 8;add.s32 %r228, %r227, 1;and.b32 %r229, %r228, 3;setp.eq.s32 %p29, %r229, 1;@%p29 bra BB14_38;mov.u32 %r286, %tid.x;sub.s32 %r231, %r220, %r286;shr.u32 %r232, %r231, 8;add.s32 %r233, %r232, 1;and.b32 %r234, %r233, 3;setp.eq.s32 %p30, %r234, 2;@%p30 bra BB14_37;mov.u32 %r235, %tid.x;shl.b32 %r236, %r235, 2;add.s32 %r238, %r50, %r236;ld.shared.u32 %r239, [%r238];ld.param.u64 %rd36, [%rd13+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r240, [%rd13+216];mul.lo.s32 %r241, %r240, %r281;cvt.s64.s32 %rd38, %r241;cvt.s64.s32 %rd39, %r235;add.s64 %rd40, %rd38, %rd39;shl.b64 %rd41, %rd40, 2;add.s64 %rd42, %rd37, %rd41;atom.global.add.u32 %r242, [%rd42], %r239;add.s32 %r286, %r235, 256;BB14_37:shl.b32 %r243, %r286, 2;add.s32 %r245, %r50, %r243;ld.shared.u32 %r246, [%r245];ld.param.u64 %rd44, [%rd13+208];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r247, [%rd13+216];mul.lo.s32 %r248, %r247, %r281;cvt.s64.s32 %rd46, %r248;cvt.s64.s32 %rd47, %r286;add.s64 %rd48, %rd46, %rd47;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd45, %rd49;atom.global.add.u32 %r249, [%rd50], %r246;add.s32 %r287, %r286, 256;BB14_38:shl.b32 %r250, %r287, 2;add.s32 %r252, %r50, %r250;ld.shared.u32 %r253, [%r252];ld.param.u64 %rd52, [%rd13+208];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r254, [%rd13+216];mul.lo.s32 %r255, %r254, %r281;cvt.s64.s32 %rd54, %r255;cvt.s64.s32 %rd55, %r287;add.s64 %rd56, %rd54, %rd55;shl.b64 %rd57, %rd56, 2;add.s64 %rd58, %rd53, %rd57;atom.global.add.u32 %r256, [%rd58], %r253;add.s32 %r289, %r287, 256;BB14_39:setp.lt.u32 %p31, %r223, 4;@%p31 bra BB14_41;BB14_40:shl.b32 %r262, %r289, 2;add.s32 %r264, %r50, %r262;ld.shared.u32 %r265, [%r264];ld.param.u64 %rd59, [%rd13+208];ld.param.u32 %r266, [%rd13+216];mul.lo.s32 %r267, %r266, %r281;cvt.s64.s32 %rd60, %r267;cvt.s64.s32 %rd61, %r289;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 2;cvta.to.global.u64 %rd64, %rd59;add.s64 %rd65, %rd64, %rd63;ld.shared.u32 %r268, [%r264+1024];ld.shared.u32 %r269, [%r264+2048];ld.shared.u32 %r270, [%r264+3072];atom.global.add.u32 %r271, [%rd65], %r265;add.s32 %r272, %r289, 256;cvt.s64.s32 %rd66, %r272;add.s64 %rd67, %rd60, %rd66;shl.b64 %rd68, %rd67, 2;add.s64 %rd69, %rd64, %rd68;atom.global.add.u32 %r273, [%rd69], %r268;add.s32 %r274, %r289, 512;cvt.s64.s32 %rd70, %r274;add.s64 %rd71, %rd60, %rd70;shl.b64 %rd72, %rd71, 2;add.s64 %rd73, %rd64, %rd72;atom.global.add.u32 %r275, [%rd73], %r269;add.s32 %r276, %r289, 768;cvt.s64.s32 %rd74, %r276;add.s64 %rd75, %rd60, %rd74;shl.b64 %rd76, %rd75, 2;add.s64 %rd77, %rd64, %rd76;atom.global.add.u32 %r277, [%rd77], %r270;add.s32 %r289, %r289, 1024;setp.lt.s32 %p32, %r289, 255;@%p32 bra BB14_40;BB14_41:bar.sync 0;BB14_42:mov.u32 %r278, %nctaid.y;add.s32 %r281, %r278, %r281;setp.lt.s32 %p33, %r281, %r2;@%p33 bra BB14_2;BB14_43:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<99>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r97, %ctaid.y;setp.ge.s32 %p2, %r97, %r2;@%p2 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r4, [%rd1+24];mov.u32 %r10, %tid.x;cvt.s64.s32 %rd3, %r10;shr.u32 %r11, %r10, 3;add.s32 %r12, %r11, %r10;cvt.rn.f32.s32 %f1, %r10;shl.b32 %r13, %r12, 2;mov.u32 %r14, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r5, %r14, %r13;cvta.to.global.u64 %rd6, %rd2;BB15_2:mul.lo.s32 %r15, %r4, %r97;mul.wide.s32 %rd7, %r15, 136;add.s64 %rd8, %rd6, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p3, %rs1, 0;@%p3 bra BB15_9;cvt.u32.u64 %r17, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r98, 0;setp.gt.s32 %p4, %r17, 254;@%p4 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r18, [%rd1+216];mul.lo.s32 %r19, %r18, %r97;cvt.s64.s32 %rd11, %r19;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r98, [%rd14];BB15_5:setp.lt.u32 %p1, %r10, 32;st.shared.u32 [%r5+16], %r98;bar.sync 0;@!%p1 bra BB15_7;bra.uni BB15_6;BB15_6:mul.lo.s32 %r52, %r10, 9;shl.b32 %r53, %r52, 2;add.s32 %r55, %r14, %r53;ld.shared.u32 %r56, [%r55+20];ld.shared.u32 %r57, [%r55+16];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r55+24];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r55+28];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r55+32];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r55+36];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r55+40];add.s32 %r68, %r66, %r67;ld.shared.u32 %r69, [%r55+44];add.s32 %r25, %r68, %r69;mov.u32 %r23, 1;mov.u32 %r48, 0;mov.u32 %r50, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r25, %r23, %r48, %r50; @p add.s32 r0, r0, %r25; mov.s32 %r21, r0;}mov.u32 %r29, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r21, %r29, %r48, %r50; @p add.s32 r0, r0, %r21; mov.s32 %r27, r0;}mov.u32 %r35, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r27, %r35, %r48, %r50; @p add.s32 r0, r0, %r27; mov.s32 %r33, r0;}mov.u32 %r41, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r33, %r41, %r48, %r50; @p add.s32 r0, r0, %r33; mov.s32 %r39, r0;}mov.u32 %r47, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r39, %r47, %r48, %r50; @p add.s32 r0, r0, %r39; mov.s32 %r45, r0;}sub.s32 %r70, %r45, %r25;ld.shared.u32 %r71, [%r55+16];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r55+20];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r55+24];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r55+28];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r55+32];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r55+36];add.s32 %r82, %r81, %r80;ld.shared.u32 %r83, [%r55+40];add.s32 %r84, %r83, %r82;st.shared.u32 [%r55+16], %r70;st.shared.u32 [%r55+20], %r72;st.shared.u32 [%r55+24], %r74;st.shared.u32 [%r55+28], %r76;st.shared.u32 [%r55+32], %r78;st.shared.u32 [%r55+36], %r80;st.shared.u32 [%r55+40], %r82;st.shared.u32 [%r55+44], %r84;BB15_7:bar.sync 0;ld.shared.u32 %r85, [%r5+16];setp.lt.s32 %p5, %r85, %r3;add.s32 %r86, %r85, %r98;setp.ge.s32 %p6, %r86, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r87, [%rd4+-32];setp.gt.s32 %p8, %r87, -1;xor.b32 %r88, %r87, 2147483647;selp.b32 %r89, %r87, %r88, %p8;mov.b32 %f4, %r89;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r90, %f6;setp.gt.s32 %p9, %r90, -1;xor.b32 %r91, %r90, 2147483647;selp.b32 %r92, %r90, %r91, %p9;st.global.u32 [%rd4+-28], %r92;st.global.u32 [%rd4+-24], %r92;add.f32 %f7, %f4, %f6;mov.b32 %r93, %f7;setp.gt.s32 %p10, %r93, -1;xor.b32 %r94, %r93, 2147483647;selp.b32 %r95, %r93, %r94, %p10;st.global.u32 [%rd4+-16], %r95;BB15_9:mov.u32 %r96, %nctaid.y;add.s32 %r97, %r96, %r97;setp.lt.s32 %p11, %r97, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<21>;.reg .f32 %f<7>;.reg .b32 %r<81>;.reg .b64 %rd<71>;mov.b64 %rd17, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r74, %ctaid.y;setp.ge.s32 %p1, %r74, %r2;@%p1 bra BB16_18;mov.u64 %rd1, %rd17;BB16_2:ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd19, %rd18;ld.param.u32 %r29, [%rd1+24];mul.lo.s32 %r30, %r29, %r74;mul.wide.s32 %rd20, %r30, 136;add.s64 %rd3, %rd19, %rd20;ld.global.u32 %r4, [%rd3];ld.global.u32 %r5, [%rd3+64];mov.u32 %r31, %ctaid.x;mov.u32 %r32, %ntid.x;mov.u32 %r33, %tid.x;mad.lo.s32 %r76, %r32, %r31, %r33;ld.global.u32 %r6, [%rd3+20];setp.ge.s32 %p2, %r76, %r6;@%p2 bra BB16_17;ld.param.u64 %rd21, [%rd1];ld.param.u32 %r35, [%rd1+8];mul.lo.s32 %r36, %r35, %r4;cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r36, 40;add.s64 %rd24, %rd22, %rd23;add.s64 %rd4, %rd24, 12;ld.global.u32 %r7, [%rd24+12];ld.param.u64 %rd69, [%rd1+48];ld.param.u32 %r75, [%rd1+56];BB16_4:mul.lo.s32 %r40, %r75, %r4;cvt.s64.s32 %rd26, %r40;cvt.s64.s32 %rd7, %r76;add.s64 %rd27, %rd26, %rd7;cvta.to.global.u64 %rd28, %rd69;shl.b64 %rd29, %rd27, 3;add.s64 %rd30, %rd28, %rd29;ld.global.v2.u32 {%r41, %r42}, [%rd30];setp.eq.s32 %p3, %r5, %r42;@%p3 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r50, %r76, %r7;mov.u32 %r77, 0;st.global.v2.u32 [%rd4+20], {%r77, %r50};st.global.u32 [%rd3+128], %r76;bra.uni BB16_7;BB16_5:setp.gt.s32 %p4, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p4;mov.b32 %f1, %r44;xor.b32 %r45, %r5, 2147483647;setp.gt.s32 %p5, %r5, -1;selp.b32 %r46, %r5, %r45, %p5;mov.b32 %f2, %r46;sub.f32 %f3, %f1, %f2;mov.b32 %r47, %f3;setp.gt.s32 %p6, %r47, -1;xor.b32 %r48, %r47, 2147483647;selp.b32 %r77, %r47, %r48, %p6;BB16_7:ld.param.u64 %rd8, [%rd1+160];ld.param.u32 %r52, [%rd1+168];mul.lo.s32 %r53, %r52, %r74;cvt.s64.s32 %rd9, %r53;ld.param.u32 %r18, [%rd1+392];rem.s32 %r78, %r41, %r18;mov.u32 %r79, 0;BB16_8:cvt.s64.s32 %rd32, %r78;add.s64 %rd10, %rd32, %rd9;cvta.to.global.u64 %rd33, %rd8;shl.b64 %rd34, %rd10, 4;add.s64 %rd35, %rd33, %rd34;mov.u32 %r54, -1;atom.global.cas.b32 %r55, [%rd35], %r54, %r41;setp.eq.s32 %p7, %r55, -1;setp.eq.s32 %p8, %r55, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r56, %r78, 1;rem.s32 %r78, %r56, %r18;add.s32 %r79, %r79, 1;setp.lt.s32 %p10, %r79, %r18;@%p10 bra BB16_8;BB16_10:add.s64 %rd37, %rd8, %rd34;setp.ne.s64 %p11, %rd37, 0;@%p11 bra BB16_12;mov.u64 %rd38, $str5;cvta.global.u64 %rd39, %rd38;mov.u64 %rd40, $str6;cvta.global.u64 %rd41, %rd40;mov.u64 %rd42, __unnamed_1;cvta.global.u64 %rd43, %rd42;mov.u32 %r57, 231;mov.u64 %rd44, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd39;.param .b64 param1;st.param.b64 [param1+0], %rd41;.param .b32 param2;st.param.b32 [param2+0], %r57;.param .b64 param3;st.param.b64 [param3+0], %rd43;.param .b64 param4;st.param.b64 [param4+0], %rd44;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd48, %rd35, 4;atom.global.add.u32 %r25, [%rd48], 1;cvt.u64.u32 %rd49, %r77;shl.b64 %rd50, %rd49, 32;cvt.u64.u32 %rd51, %r76;or.b64 %rd11, %rd50, %rd51;add.s64 %rd12, %rd35, 8;ld.global.u64 %rd70, [%rd35+8];BB16_13:atom.global.cas.b64 %rd15, [%rd12], %rd70, %rd11;setp.gt.u64 %p12, %rd15, %rd11;setp.ne.s64 %p13, %rd70, %rd15;and.pred %p14, %p12, %p13;mov.u64 %rd70, %rd15;@%p14 bra BB16_13;ld.param.u64 %rd52, [%rd1+272];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r58, [%rd1+280];mul.lo.s32 %r59, %r58, %r74;cvt.s64.s32 %rd54, %r59;add.s64 %rd55, %rd54, %rd7;shl.b64 %rd56, %rd55, 2;add.s64 %rd57, %rd53, %rd56;st.global.u32 [%rd57], %r25;ld.param.u64 %rd69, [%rd1+48];cvta.to.global.u64 %rd58, %rd69;ld.param.u32 %r75, [%rd1+56];mul.lo.s32 %r60, %r75, %r4;cvt.s64.s32 %rd59, %r60;add.s64 %rd60, %rd59, %rd7;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd58, %rd61;st.global.u32 [%rd62+4], %r77;ld.param.u64 %rd63, [%rd1+240];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r61, [%rd1+248];mul.lo.s32 %r62, %r61, %r74;cvt.s64.s32 %rd65, %r62;add.s64 %rd66, %rd65, %rd7;shl.b64 %rd67, %rd66, 2;add.s64 %rd68, %rd64, %rd67;st.global.u32 [%rd68], %r78;setp.ne.s32 %p15, %r76, 0;@%p15 bra BB16_16;ld.global.u32 %r63, [%rd3+80];setp.gt.s32 %p16, %r63, -1;xor.b32 %r64, %r63, 2147483647;selp.b32 %r65, %r63, %r64, %p16;mov.b32 %f4, %r65;xor.b32 %r66, %r5, 2147483647;setp.gt.s32 %p17, %r5, -1;selp.b32 %r67, %r5, %r66, %p17;mov.b32 %f5, %r67;sub.f32 %f6, %f4, %f5;mov.b32 %r68, %f6;setp.gt.s32 %p18, %r68, -1;xor.b32 %r69, %r68, 2147483647;selp.b32 %r70, %r68, %r69, %p18;st.global.u32 [%rd3+80], %r70;BB16_16:mov.u32 %r72, %nctaid.x;mad.lo.s32 %r76, %r72, %r32, %r76;setp.lt.s32 %p19, %r76, %r6;@%p19 bra BB16_4;BB16_17:mov.u32 %r73, %nctaid.y;add.s32 %r74, %r73, %r74;setp.lt.s32 %p20, %r74, %r2;@%p20 bra BB16_2;BB16_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<257>;.reg .b64 %rd<63>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd5, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r252, %ctaid.y;setp.ge.s32 %p3, %r252, %r2;@%p3 bra BB17_18;mov.u64 %rd6, %rd5;ld.param.u64 %rd1, [%rd6+16];ld.param.u32 %r3, [%rd6+24];cvta.to.global.u64 %rd7, %rd1;mov.u32 %r62, %laneid;BB17_2:mul.lo.s32 %r24, %r3, %r252;mul.wide.s32 %rd8, %r24, 136;add.s64 %rd9, %rd7, %rd8;add.s64 %rd2, %rd9, 20;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %ntid.x;mul.lo.s32 %r253, %r26, %r25;ld.global.u32 %r5, [%rd9+20];setp.ge.s32 %p4, %r253, %r5;@%p4 bra BB17_17;ld.global.u32 %r6, [%rd2+60];BB17_4:mov.u32 %r32, %tid.x;add.s32 %r9, %r253, %r32;ld.global.u32 %r10, [%rd2+-20];mov.u32 %r255, 0;setp.ge.s32 %p5, %r9, %r5;@%p5 bra BB17_5;ld.param.u64 %rd11, [%rd6+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r35, [%rd6+56];mul.lo.s32 %r36, %r35, %r10;cvt.s64.s32 %rd13, %r36;cvt.s64.s32 %rd3, %r9;add.s64 %rd14, %rd13, %rd3;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r37, %r38}, [%rd16];ld.param.u64 %rd17, [%rd6+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r39, [%rd6+248];mul.lo.s32 %r40, %r39, %r252;cvt.s64.s32 %rd19, %r40;add.s64 %rd20, %rd19, %rd3;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r41, [%rd22];shr.s32 %r42, %r41, 31;xor.b32 %r43, %r42, %r41;ld.param.u64 %rd23, [%rd6+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r44, [%rd6+168];mul.lo.s32 %r45, %r44, %r252;cvt.s64.s32 %rd25, %r45;cvt.s64.s32 %rd26, %r43;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r46, %r47}, [%rd29];ld.global.u64 %rd4, [%rd29+8];cvt.u32.u64 %r48, %rd4;setp.eq.s32 %p6, %r9, %r48;selp.b32 %r49, -1, 0, %p6;xor.b32 %r50, %r49, %r43;st.global.u32 [%rd22], %r50;setp.ne.s32 %p7, %r9, %r48;mov.u32 %r256, %r255;@%p7 bra BB17_10;mov.u32 %r255, 0;setp.ge.s32 %p8, %r38, %r6;@%p8 bra BB17_9;ld.param.u64 %rd31, [%rd6+344];cvta.to.global.u64 %rd32, %rd31;mul.wide.s32 %rd33, %r37, 4;add.s64 %rd34, %rd32, %rd33;ld.global.u32 %r52, [%rd34+4];ld.global.u32 %r53, [%rd34];sub.s32 %r255, %r52, %r53;ld.param.u64 %rd35, [%rd6+80];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r54, [%rd6+88];mul.lo.s32 %r55, %r54, %r10;cvt.s64.s32 %rd37, %r55;add.s64 %rd38, %rd37, %rd3;shl.b64 %rd39, %rd38, 2;add.s64 %rd40, %rd36, %rd39;st.global.u32 [%rd40], %r53;BB17_9:setp.gt.s32 %p9, %r47, 1;selp.b32 %r256, %r47, 0, %p9;bra.uni BB17_10;BB17_5:mov.u32 %r256, %r255;BB17_10:setp.lt.u32 %p1, %r32, 32;shr.u32 %r57, %r32, 3;add.s32 %r58, %r57, %r32;shl.b32 %r59, %r58, 3;mov.u32 %r60, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r61, %r60, %r59;st.shared.v2.u32 [%r61+16], {%r255, %r256};bar.sync 0;@!%p1 bra BB17_12;bra.uni BB17_11;BB17_11:mul.lo.s32 %r124, %r32, 9;shl.b32 %r125, %r124, 3;add.s32 %r127, %r60, %r125;ld.shared.v2.u32 {%r128, %r129}, [%r127+24];ld.shared.v2.u32 {%r132, %r133}, [%r127+16];add.s32 %r136, %r128, %r132;add.s32 %r137, %r129, %r133;ld.shared.v2.u32 {%r138, %r139}, [%r127+32];add.s32 %r142, %r136, %r138;add.s32 %r143, %r137, %r139;ld.shared.v2.u32 {%r144, %r145}, [%r127+40];add.s32 %r148, %r142, %r144;add.s32 %r149, %r143, %r145;ld.shared.v2.u32 {%r150, %r151}, [%r127+48];add.s32 %r154, %r148, %r150;add.s32 %r155, %r149, %r151;ld.shared.v2.u32 {%r156, %r157}, [%r127+56];add.s32 %r160, %r154, %r156;add.s32 %r161, %r155, %r157;ld.shared.v2.u32 {%r162, %r163}, [%r127+64];add.s32 %r166, %r160, %r162;add.s32 %r167, %r161, %r163;ld.shared.v2.u32 {%r168, %r169}, [%r127+72];add.s32 %r64, %r166, %r168;add.s32 %r69, %r167, %r169;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r63, %r64, %r120, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r120, %r121, %r122;setp.lt.s32 %p10, %r62, 1;selp.b32 %r172, 0, %r63, %p10;add.s32 %r74, %r172, %r64;selp.b32 %r173, 0, %r68, %p10;add.s32 %r79, %r173, %r69;mov.u32 %r80, 2;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p11, %r62, 2;selp.b32 %r174, 0, %r73, %p11;add.s32 %r84, %r174, %r74;selp.b32 %r175, 0, %r78, %p11;add.s32 %r89, %r175, %r79;mov.u32 %r90, 4;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p12, %r62, 4;selp.b32 %r176, 0, %r83, %p12;add.s32 %r94, %r176, %r84;selp.b32 %r177, 0, %r88, %p12;add.s32 %r99, %r177, %r89;mov.u32 %r100, 8;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p13, %r62, 8;selp.b32 %r178, 0, %r93, %p13;add.s32 %r104, %r178, %r94;selp.b32 %r179, 0, %r98, %p13;add.s32 %r109, %r179, %r99;mov.u32 %r110, 16;shfl.sync.up.b32 %r103, %r104, %r110, %r121, %r122;shfl.sync.up.b32 %r108, %r109, %r110, %r121, %r122;setp.lt.s32 %p14, %r62, 16;selp.b32 %r180, 0, %r103, %p14;add.s32 %r114, %r180, %r104;selp.b32 %r181, 0, %r108, %p14;add.s32 %r119, %r181, %r109;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p15, %r62, 0;ld.shared.v2.u32 {%r182, %r183}, [%r127+16];ld.shared.v2.u32 {%r186, %r187}, [%r127+24];ld.shared.v2.u32 {%r190, %r191}, [%r127+32];ld.shared.v2.u32 {%r194, %r195}, [%r127+40];ld.shared.v2.u32 {%r198, %r199}, [%r127+48];ld.shared.v2.u32 {%r202, %r203}, [%r127+56];ld.shared.v2.u32 {%r206, %r207}, [%r127+64];selp.b32 %r210, 0, %r113, %p15;selp.b32 %r211, 0, %r118, %p15;st.shared.v2.u32 [%r127+16], {%r210, %r211};add.s32 %r212, %r183, %r211;add.s32 %r213, %r182, %r210;st.shared.v2.u32 [%r127+24], {%r213, %r212};add.s32 %r214, %r187, %r212;add.s32 %r215, %r186, %r213;st.shared.v2.u32 [%r127+32], {%r215, %r214};add.s32 %r216, %r191, %r214;add.s32 %r217, %r190, %r215;st.shared.v2.u32 [%r127+40], {%r217, %r216};add.s32 %r218, %r195, %r216;add.s32 %r219, %r194, %r217;st.shared.v2.u32 [%r127+48], {%r219, %r218};add.s32 %r220, %r199, %r218;add.s32 %r221, %r198, %r219;st.shared.v2.u32 [%r127+56], {%r221, %r220};add.s32 %r222, %r203, %r220;add.s32 %r223, %r202, %r221;st.shared.v2.u32 [%r127+64], {%r223, %r222};add.s32 %r224, %r207, %r222;add.s32 %r225, %r206, %r223;st.shared.v2.u32 [%r127+72], {%r225, %r224};BB17_12:setp.lt.s32 %p2, %r9, %r5;bar.sync 0;ld.shared.v2.u32 {%r232, %r233}, [%r61+16];@!%p2 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd42, [%rd6+64];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r234, [%rd6+72];mul.lo.s32 %r235, %r234, %r10;cvt.s64.s32 %rd44, %r235;cvt.s64.s32 %rd45, %r9;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;st.global.u32 [%rd48], %r232;ld.param.u64 %rd49, [%rd6+256];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r236, [%rd6+264];mul.lo.s32 %r237, %r236, %r252;cvt.s64.s32 %rd51, %r237;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 2;add.s64 %rd54, %rd50, %rd53;st.global.u32 [%rd54], %r233;BB17_14:add.s32 %r240, %r26, -1;setp.ne.s32 %p16, %r32, %r240;@%p16 bra BB17_16;shr.s32 %r241, %r253, 31;shr.u32 %r242, %r241, 24;add.s32 %r243, %r253, %r242;shr.s32 %r244, %r243, 8;ld.param.u64 %rd56, [%rd6+224];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r245, [%rd6+232];mul.lo.s32 %r246, %r245, %r252;cvt.s64.s32 %rd58, %r246;cvt.s64.s32 %rd59, %r244;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;add.s32 %r247, %r233, %r256;add.s32 %r248, %r232, %r255;st.global.v2.u32 [%rd62], {%r248, %r247};BB17_16:bar.sync 0;mov.u32 %r250, %nctaid.x;mad.lo.s32 %r253, %r250, %r26, %r253;setp.lt.s32 %p17, %r253, %r5;@%p17 bra BB17_4;BB17_17:mov.u32 %r251, %nctaid.y;add.s32 %r252, %r251, %r252;setp.lt.s32 %p18, %r252, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<256>;.reg .b64 %rd<36>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd3, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r250, %ctaid.y;setp.ge.s32 %p3, %r250, %r2;@%p3 bra BB18_16;mov.u64 %rd4, %rd3;ld.param.u64 %rd1, [%rd4+16];ld.param.u32 %r3, [%rd4+24];cvta.to.global.u64 %rd5, %rd1;mov.u32 %r49, %laneid;BB18_2:mul.lo.s32 %r24, %r3, %r250;mul.wide.s32 %rd6, %r24, 136;add.s64 %rd7, %rd5, %rd6;ld.global.u32 %r5, [%rd7+20];add.s32 %r25, %r5, 255;shr.s32 %r26, %r25, 31;shr.u32 %r27, %r26, 24;add.s32 %r28, %r25, %r27;shr.s32 %r6, %r28, 8;mov.u32 %r29, %ctaid.x;mov.u32 %r30, %ntid.x;mul.lo.s32 %r251, %r30, %r29;setp.ge.s32 %p4, %r251, %r6;@%p4 bra BB18_15;mov.u32 %r252, 0;mov.u32 %r253, %r252;BB18_4:mov.u32 %r254, 0;mov.u32 %r38, %tid.x;add.s32 %r11, %r251, %r38;setp.ge.s32 %p5, %r11, %r6;mov.u32 %r255, %r254;@%p5 bra BB18_6;ld.param.u64 %rd9, [%rd4+224];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r39, [%rd4+232];mul.lo.s32 %r40, %r39, %r250;cvt.s64.s32 %rd11, %r40;cvt.s64.s32 %rd12, %r11;add.s64 %rd13, %rd11, %rd12;shl.b64 %rd14, %rd13, 3;add.s64 %rd15, %rd10, %rd14;ld.global.v2.u32 {%r255, %r254}, [%rd15];BB18_6:setp.lt.u32 %p1, %r38, 32;shr.u32 %r44, %r38, 3;add.s32 %r45, %r44, %r38;shl.b32 %r46, %r45, 3;mov.u32 %r47, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r48, %r47, %r46;st.shared.v2.u32 [%r48+16], {%r255, %r254};bar.sync 0;@!%p1 bra BB18_9;bra.uni BB18_7;BB18_7:mul.lo.s32 %r121, %r38, 9;shl.b32 %r122, %r121, 3;add.s32 %r124, %r47, %r122;ld.shared.v2.u32 {%r125, %r126}, [%r124+24];ld.shared.v2.u32 {%r129, %r130}, [%r124+16];add.s32 %r133, %r125, %r129;add.s32 %r134, %r126, %r130;ld.shared.v2.u32 {%r135, %r136}, [%r124+32];add.s32 %r139, %r133, %r135;add.s32 %r140, %r134, %r136;ld.shared.v2.u32 {%r141, %r142}, [%r124+40];add.s32 %r145, %r139, %r141;add.s32 %r146, %r140, %r142;ld.shared.v2.u32 {%r147, %r148}, [%r124+48];add.s32 %r151, %r145, %r147;add.s32 %r152, %r146, %r148;ld.shared.v2.u32 {%r153, %r154}, [%r124+56];add.s32 %r157, %r151, %r153;add.s32 %r158, %r152, %r154;ld.shared.v2.u32 {%r159, %r160}, [%r124+64];add.s32 %r163, %r157, %r159;add.s32 %r164, %r158, %r160;ld.shared.v2.u32 {%r165, %r166}, [%r124+72];add.s32 %r51, %r163, %r165;add.s32 %r56, %r164, %r166;mov.u32 %r117, 1;mov.u32 %r118, 0;mov.u32 %r119, -1;shfl.sync.up.b32 %r50, %r51, %r117, %r118, %r119;shfl.sync.up.b32 %r55, %r56, %r117, %r118, %r119;setp.lt.s32 %p6, %r49, 1;selp.b32 %r169, 0, %r50, %p6;add.s32 %r61, %r169, %r51;selp.b32 %r170, 0, %r55, %p6;add.s32 %r66, %r170, %r56;mov.u32 %r67, 2;shfl.sync.up.b32 %r60, %r61, %r67, %r118, %r119;shfl.sync.up.b32 %r65, %r66, %r67, %r118, %r119;setp.lt.s32 %p7, %r49, 2;selp.b32 %r171, 0, %r60, %p7;add.s32 %r71, %r171, %r61;selp.b32 %r172, 0, %r65, %p7;add.s32 %r76, %r172, %r66;mov.u32 %r77, 4;shfl.sync.up.b32 %r70, %r71, %r77, %r118, %r119;shfl.sync.up.b32 %r75, %r76, %r77, %r118, %r119;setp.lt.s32 %p8, %r49, 4;selp.b32 %r173, 0, %r70, %p8;add.s32 %r81, %r173, %r71;selp.b32 %r174, 0, %r75, %p8;add.s32 %r86, %r174, %r76;mov.u32 %r87, 8;shfl.sync.up.b32 %r80, %r81, %r87, %r118, %r119;shfl.sync.up.b32 %r85, %r86, %r87, %r118, %r119;setp.lt.s32 %p9, %r49, 8;selp.b32 %r175, 0, %r80, %p9;add.s32 %r91, %r175, %r81;selp.b32 %r176, 0, %r85, %p9;add.s32 %r96, %r176, %r86;mov.u32 %r97, 16;shfl.sync.up.b32 %r90, %r91, %r97, %r118, %r119;shfl.sync.up.b32 %r95, %r96, %r97, %r118, %r119;setp.lt.s32 %p10, %r49, 16;selp.b32 %r177, 0, %r90, %p10;add.s32 %r111, %r177, %r91;selp.b32 %r178, 0, %r95, %p10;add.s32 %r116, %r178, %r96;mov.u32 %r108, 31;shfl.sync.idx.b32 %r100, %r111, %r108, %r108, %r119;shfl.sync.idx.b32 %r105, %r116, %r108, %r108, %r119;shfl.sync.up.b32 %r110, %r111, %r117, %r118, %r119;shfl.sync.up.b32 %r115, %r116, %r117, %r118, %r119;setp.eq.s32 %p11, %r49, 0;ld.shared.v2.u32 {%r179, %r180}, [%r124+16];ld.shared.v2.u32 {%r183, %r184}, [%r124+24];ld.shared.v2.u32 {%r187, %r188}, [%r124+32];ld.shared.v2.u32 {%r191, %r192}, [%r124+40];ld.shared.v2.u32 {%r195, %r196}, [%r124+48];ld.shared.v2.u32 {%r199, %r200}, [%r124+56];ld.shared.v2.u32 {%r203, %r204}, [%r124+64];selp.b32 %r207, 0, %r110, %p11;selp.b32 %r208, 0, %r115, %p11;st.shared.v2.u32 [%r124+16], {%r207, %r208};add.s32 %r209, %r180, %r208;add.s32 %r210, %r179, %r207;st.shared.v2.u32 [%r124+24], {%r210, %r209};add.s32 %r211, %r184, %r209;add.s32 %r212, %r183, %r210;st.shared.v2.u32 [%r124+32], {%r212, %r211};add.s32 %r213, %r188, %r211;add.s32 %r214, %r187, %r212;st.shared.v2.u32 [%r124+40], {%r214, %r213};add.s32 %r215, %r192, %r213;add.s32 %r216, %r191, %r214;st.shared.v2.u32 [%r124+48], {%r216, %r215};add.s32 %r217, %r196, %r215;add.s32 %r218, %r195, %r216;st.shared.v2.u32 [%r124+56], {%r218, %r217};add.s32 %r219, %r200, %r217;add.s32 %r220, %r199, %r218;st.shared.v2.u32 [%r124+64], {%r220, %r219};add.s32 %r221, %r204, %r219;add.s32 %r222, %r203, %r220;st.shared.v2.u32 [%r124+72], {%r222, %r221};setp.ne.s32 %p12, %r38, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r100, %r105};BB18_9:setp.lt.s32 %p2, %r11, %r6;bar.sync 0;ld.shared.v2.u32 {%r229, %r230}, [%r48+16];add.s32 %r18, %r229, %r252;add.s32 %r19, %r230, %r253;ld.shared.v2.u32 {%r233, %r234}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r252, %r233, %r252;add.s32 %r253, %r234, %r253;@!%p2 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd17, [%rd4+224];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r237, [%rd4+232];mul.lo.s32 %r238, %r237, %r250;cvt.s64.s32 %rd19, %r238;cvt.s64.s32 %rd20, %r11;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;st.global.v2.u32 [%rd23], {%r18, %r19};BB18_11:add.s32 %r239, %r6, -1;setp.ne.s32 %p13, %r11, %r239;@%p13 bra BB18_14;ld.param.u64 %rd35, [%rd4+16];ld.param.u32 %r249, [%rd4+24];mul.lo.s32 %r248, %r249, %r250;mul.wide.s32 %rd34, %r248, 136;cvta.to.global.u64 %rd33, %rd35;add.s64 %rd32, %rd33, %rd34;add.s64 %rd31, %rd32, 20;add.s32 %r240, %r18, %r255;st.global.u32 [%rd31+-4], %r240;add.s32 %r241, %r19, %r254;st.global.u32 [%rd31+20], %r241;setp.gt.s32 %p14, %r241, -1;setp.le.s32 %p15, %r241, %r5;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd24, $str;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, $str1;cvta.global.u64 %rd27, %rd26;mov.u64 %rd28, __unnamed_2;cvta.global.u64 %rd29, %rd28;mov.u32 %r242, 1659;mov.u64 %rd30, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd25;.param .b64 param1;st.param.b64 [param1+0], %rd27;.param .b32 param2;st.param.b32 [param2+0], %r242;.param .b64 param3;st.param.b64 [param3+0], %rd29;.param .b64 param4;st.param.b64 [param4+0], %rd30;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:mov.u32 %r246, %ntid.x;mov.u32 %r243, %nctaid.x;mad.lo.s32 %r251, %r243, %r246, %r251;setp.lt.s32 %p17, %r251, %r6;@%p17 bra BB18_4;BB18_15:mov.u32 %r245, %nctaid.y;add.s32 %r250, %r245, %r250;setp.lt.s32 %p18, %r250, %r2;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<50>;.reg .b64 %rd<41>;mov.b64 %rd10, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r48, %ctaid.y;setp.ge.s32 %p1, %r48, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd10;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r15, %ntid.x;mov.u32 %r16, %nctaid.x;mul.lo.s32 %r4, %r16, %r15;cvta.to.global.u64 %rd11, %rd2;BB19_2:mul.lo.s32 %r17, %r3, %r48;mul.wide.s32 %rd12, %r17, 136;add.s64 %rd13, %rd11, %rd12;add.s64 %rd3, %rd13, 20;mov.u32 %r18, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r49, %r15, %r18, %r20;ld.global.u32 %r6, [%rd13+20];setp.ge.s32 %p2, %r49, %r6;@%p2 bra BB19_7;ld.param.u64 %rd4, [%rd1+224];ld.param.u32 %r22, [%rd1+232];mul.lo.s32 %r23, %r22, %r48;cvt.s64.s32 %rd5, %r23;ld.param.u64 %rd6, [%rd1+64];ld.param.u32 %r24, [%rd1+72];ld.global.u32 %r25, [%rd3+-20];mul.lo.s32 %r26, %r24, %r25;cvt.s64.s32 %rd7, %r26;ld.param.u64 %rd8, [%rd1+256];ld.param.u32 %r7, [%rd1+264];ld.param.u64 %rd9, [%rd1+240];ld.param.u32 %r8, [%rd1+248];BB19_4:shr.s32 %r30, %r49, 31;shr.u32 %r31, %r30, 24;add.s32 %r32, %r49, %r31;shr.s32 %r33, %r32, 8;cvt.s64.s32 %rd14, %r33;add.s64 %rd15, %rd5, %rd14;cvta.to.global.u64 %rd16, %rd4;shl.b64 %rd17, %rd15, 3;add.s64 %rd18, %rd16, %rd17;ld.global.v2.u32 {%r34, %r35}, [%rd18];cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd7, %rd19;cvta.to.global.u64 %rd21, %rd6;shl.b64 %rd22, %rd20, 2;add.s64 %rd23, %rd21, %rd22;ld.global.u32 %r38, [%rd23];add.s32 %r39, %r38, %r34;st.global.u32 [%rd23], %r39;mul.lo.s32 %r40, %r7, %r48;cvt.s64.s32 %rd24, %r40;add.s64 %rd25, %rd24, %rd19;cvta.to.global.u64 %rd26, %rd8;shl.b64 %rd27, %rd25, 2;add.s64 %rd28, %rd26, %rd27;ld.global.u32 %r41, [%rd28];add.s32 %r11, %r41, %r35;mul.lo.s32 %r42, %r8, %r48;cvt.s64.s32 %rd29, %r42;add.s64 %rd30, %rd29, %rd19;cvta.to.global.u64 %rd31, %rd9;shl.b64 %rd32, %rd30, 2;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r12, [%rd33];setp.gt.s32 %p3, %r12, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r43, [%rd1+168];mul.lo.s32 %r44, %r43, %r48;cvt.s64.s32 %rd36, %r44;shr.s32 %r45, %r12, 31;xor.b32 %r46, %r45, %r12;cvt.s64.s32 %rd37, %r46;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r11;BB19_6:add.s32 %r49, %r4, %r49;setp.lt.s32 %p4, %r49, %r6;@%p4 bra BB19_4;BB19_7:mov.u32 %r47, %nctaid.y;add.s32 %r48, %r47, %r48;setp.lt.s32 %p5, %r48, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<71>;.reg .b64 %rd<78>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r69, %ctaid.y;setp.ge.s32 %p1, %r69, %r2;@%p1 bra BB20_11;mov.u64 %rd9, %rd8;ld.param.u64 %rd1, [%rd9+16];ld.param.u32 %r3, [%rd9+24];cvta.to.global.u64 %rd10, %rd1;BB20_2:mul.lo.s32 %r18, %r3, %r69;mul.wide.s32 %rd11, %r18, 136;add.s64 %rd2, %rd10, %rd11;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %ntid.x;mov.u32 %r21, %tid.x;mad.lo.s32 %r70, %r20, %r19, %r21;ld.global.u32 %r5, [%rd2+20];setp.ge.s32 %p2, %r70, %r5;@%p2 bra BB20_10;ld.global.u32 %r6, [%rd2];ld.global.u32 %r7, [%rd2+60];ld.param.u64 %rd3, [%rd9+240];ld.param.u64 %rd4, [%rd9+160];ld.param.u32 %r8, [%rd9+248];ld.param.u32 %r9, [%rd9+168];BB20_4:mul.lo.s32 %r26, %r8, %r69;cvt.s64.s32 %rd13, %r26;cvt.s64.s32 %rd5, %r70;add.s64 %rd14, %rd13, %rd5;cvta.to.global.u64 %rd15, %rd3;shl.b64 %rd16, %rd14, 2;add.s64 %rd17, %rd15, %rd16;ld.global.u32 %r12, [%rd17];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd18, %r28;mul.lo.s32 %r29, %r9, %r69;cvt.s64.s32 %rd19, %r29;add.s64 %rd20, %rd19, %rd18;cvta.to.global.u64 %rd21, %rd4;shl.b64 %rd22, %rd20, 4;add.s64 %rd23, %rd21, %rd22;ld.global.u64 %rd6, [%rd23+8];ld.global.v2.u32 {%r30, %r31}, [%rd23];setp.lt.s32 %p3, %r31, 2;@%p3 bra BB20_9;ld.param.u64 %rd25, [%rd9+48];cvta.to.global.u64 %rd26, %rd25;ld.param.u32 %r32, [%rd9+56];mul.lo.s32 %r33, %r32, %r6;cvt.s64.s32 %rd27, %r33;add.s64 %rd28, %rd27, %rd5;shl.b64 %rd29, %rd28, 3;add.s64 %rd30, %rd26, %rd29;ld.global.u32 %r34, [%rd30+4];setp.gt.s32 %p4, %r34, -1;xor.b32 %r35, %r34, 2147483647;selp.b32 %r36, %r34, %r35, %p4;mov.b32 %f2, %r36;shr.u64 %rd31, %rd6, 32;cvt.u32.u64 %r37, %rd31;setp.gt.s32 %p5, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p5;mov.b32 %f3, %r39;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd32, $str2;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, $str1;cvta.global.u64 %rd35, %rd34;mov.u64 %rd36, __unnamed_3;cvta.global.u64 %rd37, %rd36;mov.u32 %r40, 1771;mov.u64 %rd38, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd33;.param .b64 param1;st.param.b64 [param1+0], %rd35;.param .b32 param2;st.param.b32 [param2+0], %r40;.param .b64 param3;st.param.b64 [param3+0], %rd37;.param .b64 param4;st.param.b64 [param4+0], %rd38;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r41, %rd6;ld.param.u64 %rd40, [%rd9+112];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r42, [%rd9+120];mul.lo.s32 %r43, %r42, %r69;cvt.s64.s32 %rd42, %r43;add.s64 %rd43, %rd42, %rd5;shl.b64 %rd44, %rd43, 3;add.s64 %rd45, %rd41, %rd44;ld.global.v2.u32 {%r44, %r45}, [%rd45];ld.param.u64 %rd46, [%rd9+96];cvta.to.global.u64 %rd47, %rd46;ld.param.u32 %r46, [%rd9+104];mul.lo.s32 %r47, %r46, %r69;cvt.s64.s32 %rd48, %r47;add.s64 %rd49, %rd48, %rd5;shl.b64 %rd50, %rd49, 2;add.s64 %rd51, %rd47, %rd50;ld.param.u64 %rd52, [%rd9+272];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r48, [%rd9+280];mul.lo.s32 %r49, %r48, %r69;cvt.s64.s32 %rd54, %r49;add.s64 %rd55, %rd54, %rd5;shl.b64 %rd56, %rd55, 2;add.s64 %rd57, %rd53, %rd56;ld.global.u32 %r50, [%rd57];add.s32 %r51, %r41, %r7;neg.s32 %r52, %r31;ld.global.f32 %f4, [%rd51];st.global.v2.u32 [%rd45], {%r51, %r52};add.s32 %r53, %r50, %r41;ld.param.u64 %rd58, [%rd9+288];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r54, [%rd9+296];mul.lo.s32 %r55, %r54, %r69;cvt.s64.s32 %rd60, %r55;cvt.s64.s32 %rd61, %r53;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;st.global.v2.u32 [%rd64], {%r44, %r45};ld.param.u64 %rd65, [%rd9+192];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r58, [%rd9+200];mul.lo.s32 %r59, %r58, %r69;cvt.s64.s32 %rd67, %r59;add.s64 %rd68, %rd67, %rd61;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;st.global.v2.f32 [%rd70], {%f1, %f4};ld.param.u32 %r60, [%rd9+308];ld.global.u32 %r61, [%rd2+56];sub.s32 %r62, %r61, %r60;setp.ge.s32 %p9, %r44, %r62;add.s32 %r63, %r61, %r5;setp.le.s32 %p10, %r44, %r63;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd71, $str3;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, $str1;cvta.global.u64 %rd74, %rd73;mov.u64 %rd75, __unnamed_3;cvta.global.u64 %rd76, %rd75;mov.u32 %r64, 1797;mov.u64 %rd77, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd72;.param .b64 param1;st.param.b64 [param1+0], %rd74;.param .b32 param2;st.param.b32 [param2+0], %r64;.param .b64 param3;st.param.b64 [param3+0], %rd76;.param .b64 param4;st.param.b64 [param4+0], %rd77;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r65, %rd5;mov.u32 %r67, %nctaid.x;mad.lo.s32 %r70, %r67, %r20, %r65;setp.lt.s32 %p12, %r70, %r5;@%p12 bra BB20_4;BB20_10:mov.u32 %r68, %nctaid.y;add.s32 %r69, %r68, %r69;setp.lt.s32 %p13, %r69, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<28>;.reg .b64 %rd<22>;mov.b64 %rd5, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd5;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r12, %ntid.x;mov.u32 %r13, %ctaid.x;mov.u32 %r14, %tid.x;mad.lo.s32 %r4, %r12, %r13, %r14;mov.u32 %r15, %nctaid.x;mul.lo.s32 %r5, %r15, %r12;cvta.to.global.u64 %rd6, %rd2;BB21_2:mul.lo.s32 %r16, %r3, %r26;mul.wide.s32 %rd7, %r16, 136;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r7, [%rd8+20];setp.ge.s32 %p2, %r4, %r7;@%p2 bra BB21_7;ld.param.u64 %rd9, [%rd1+240];cvta.to.global.u64 %rd3, %rd9;ld.param.u32 %r17, [%rd1+248];mul.lo.s32 %r18, %r17, %r26;cvt.s64.s32 %rd4, %r18;mov.u32 %r27, %r4;BB21_4:cvt.s64.s32 %rd10, %r27;add.s64 %rd11, %rd4, %rd10;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd3, %rd12;ld.global.u32 %r9, [%rd13];setp.gt.s32 %p3, %r9, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r19, [%rd1+168];mul.lo.s32 %r20, %r19, %r26;cvt.s64.s32 %rd16, %r20;shr.s32 %r21, %r9, 31;xor.b32 %r22, %r21, %r9;cvt.s64.s32 %rd17, %r22;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r23, 0;mov.u32 %r24, -1;st.global.v2.u32 [%rd20], {%r24, %r23};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r27, %r5, %r27;setp.lt.s32 %p4, %r27, %r7;@%p4 bra BB21_4;BB21_7:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<367>;.reg .b64 %rd<96>;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r344, %ctaid.y;setp.ge.s32 %p3, %r344, %r2;@%p3 bra BB22_33;mov.u32 %r124, %laneid;BB22_2:mov.b64 %rd95, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd7, %rd95;ld.param.u64 %rd1, [%rd7+16];cvta.to.global.u64 %rd8, %rd1;ld.param.u32 %r7, [%rd7+24];mul.lo.s32 %r80, %r7, %r344;mul.wide.s32 %rd9, %r80, 136;add.s64 %rd10, %rd8, %rd9;add.s64 %rd2, %rd10, 52;ld.global.u32 %r8, [%rd10+52];mov.u32 %r81, %ctaid.x;mov.u32 %r82, %ntid.x;mul.lo.s32 %r351, %r82, %r81;ld.global.u32 %r9, [%rd10+16];setp.ge.s32 %p4, %r351, %r9;@%p4 bra BB22_32;ld.global.u32 %r84, [%rd2+-32];BB22_4:ld.global.v2.u32 {%r88, %r362}, [%rd2+20];ld.global.u32 %r19, [%rd2+-52];mov.u32 %r90, %tid.x;add.s32 %r20, %r351, %r90;mov.u32 %r358, 2147483647;setp.ge.s32 %p5, %r20, %r9;@%p5 bra BB22_10;add.s32 %r352, %r84, -1;setp.eq.s32 %p6, %r352, %r8;ld.param.u64 %rd12, [%rd7+64];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r91, [%rd7+72];mul.lo.s32 %r92, %r91, %r19;cvt.s64.s32 %rd4, %r92;mov.u32 %r354, %r8;@%p6 bra BB22_9;BB22_6:add.s32 %r93, %r354, 1;setp.eq.s32 %p7, %r93, %r352;@%p7 bra BB22_8;sub.s32 %r94, %r352, %r354;shr.u32 %r95, %r94, 31;add.s32 %r96, %r94, %r95;shr.s32 %r97, %r96, 1;add.s32 %r98, %r97, %r354;cvt.s64.s32 %rd13, %r98;add.s64 %rd14, %rd13, %rd4;shl.b64 %rd15, %rd14, 2;add.s64 %rd16, %rd3, %rd15;ld.global.u32 %r99, [%rd16];setp.gt.s32 %p8, %r99, %r20;add.s32 %r100, %r98, -1;selp.b32 %r354, %r354, %r98, %p8;selp.b32 %r352, %r100, %r352, %p8;setp.eq.s32 %p9, %r352, %r354;@%p9 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd17, %r352;add.s64 %rd18, %rd17, %rd4;shl.b64 %rd19, %rd18, 2;add.s64 %rd20, %rd3, %rd19;ld.global.u32 %r101, [%rd20];setp.gt.s32 %p10, %r101, %r20;selp.b32 %r354, %r354, %r352, %p10;BB22_9:cvt.s64.s32 %rd21, %r354;add.s64 %rd22, %rd21, %rd4;shl.b64 %rd23, %rd22, 2;add.s64 %rd24, %rd3, %rd23;ld.param.u64 %rd26, [%rd7+80];cvta.to.global.u64 %rd27, %rd26;ld.param.u32 %r102, [%rd7+88];mul.lo.s32 %r103, %r102, %r19;cvt.s64.s32 %rd28, %r103;add.s64 %rd29, %rd28, %rd21;shl.b64 %rd30, %rd29, 2;add.s64 %rd31, %rd27, %rd30;ld.global.u32 %r104, [%rd24];sub.s32 %r105, %r20, %r104;ld.global.u32 %r106, [%rd31];add.s32 %r356, %r106, %r105;ld.param.u64 %rd32, [%rd7+328];cvta.to.global.u64 %rd33, %rd32;mul.wide.s32 %rd34, %r356, 4;add.s64 %rd35, %rd33, %rd34;ld.global.u32 %r357, [%rd35];ld.param.u64 %rd36, [%rd7+320];cvta.to.global.u64 %rd37, %rd36;add.s64 %rd38, %rd37, %rd34;ld.param.u64 %rd39, [%rd7+48];cvta.to.global.u64 %rd40, %rd39;ld.param.u32 %r107, [%rd7+56];mul.lo.s32 %r108, %r107, %r19;cvt.s64.s32 %rd41, %r108;add.s64 %rd42, %rd41, %rd21;shl.b64 %rd43, %rd42, 3;add.s64 %rd44, %rd40, %rd43;ld.global.u32 %r109, [%rd44+4];setp.gt.s32 %p11, %r109, -1;xor.b32 %r110, %r109, 2147483647;selp.b32 %r111, %r109, %r110, %p11;mov.b32 %f4, %r111;ld.global.f32 %f5, [%rd38];add.f32 %f6, %f5, %f4;ld.param.u64 %rd45, [%rd7+336];cvta.to.global.u64 %rd46, %rd45;add.s64 %rd47, %rd46, %rd34;ld.global.u32 %r112, [%rd47];ld.global.u64 %rd48, [%rd2+-44];mul.wide.s32 %rd49, %r112, 4;add.s64 %rd50, %rd48, %rd49;ld.f32 %f7, [%rd50];sub.f32 %f8, %f6, %f7;mov.b32 %r113, %f8;setp.gt.s32 %p12, %r113, -1;xor.b32 %r114, %r113, 2147483647;selp.b32 %r115, %r113, %r114, %p12;ld.global.u32 %r116, [%rd2+28];setp.lt.s32 %p13, %r115, %r116;selp.b32 %r358, %r115, 2147483647, %p13;BB22_10:mov.u32 %r340, %tid.x;setp.lt.u32 %p1, %r340, 32;setp.ne.s32 %p14, %r358, 2147483647;shr.u32 %r118, %r340, 3;add.s32 %r119, %r118, %r340;shl.b32 %r120, %r119, 3;mov.u32 %r121, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r122, %r121, %r120;selp.u32 %r123, 1, 0, %p14;st.shared.v2.u32 [%r122+16], {%r358, %r123};bar.sync 0;@!%p1 bra BB22_14;bra.uni BB22_11;BB22_11:mov.u32 %r341, %tid.x;setp.eq.s32 %p15, %r341, 0;mul.lo.s32 %r186, %r341, 9;shl.b32 %r187, %r186, 3;add.s32 %r189, %r121, %r187;ld.shared.v2.u32 {%r190, %r191}, [%r189+24];ld.shared.v2.u32 {%r194, %r195}, [%r189+16];min.s32 %r198, %r194, %r190;add.s32 %r199, %r191, %r195;ld.shared.v2.u32 {%r200, %r201}, [%r189+32];min.s32 %r204, %r198, %r200;add.s32 %r205, %r199, %r201;ld.shared.v2.u32 {%r206, %r207}, [%r189+40];min.s32 %r210, %r204, %r206;add.s32 %r211, %r205, %r207;ld.shared.v2.u32 {%r212, %r213}, [%r189+48];min.s32 %r216, %r210, %r212;add.s32 %r217, %r211, %r213;ld.shared.v2.u32 {%r218, %r219}, [%r189+56];min.s32 %r222, %r216, %r218;add.s32 %r223, %r217, %r219;ld.shared.v2.u32 {%r224, %r225}, [%r189+64];min.s32 %r228, %r222, %r224;add.s32 %r229, %r223, %r225;ld.shared.v2.u32 {%r230, %r231}, [%r189+72];min.s32 %r126, %r228, %r230;add.s32 %r131, %r229, %r231;mov.u32 %r182, 1;mov.u32 %r183, 0;mov.u32 %r184, -1;shfl.sync.up.b32 %r125, %r126, %r182, %r183, %r184;shfl.sync.up.b32 %r130, %r131, %r182, %r183, %r184;min.s32 %r234, %r125, %r126;setp.lt.s32 %p16, %r124, 1;selp.b32 %r136, %r126, %r234, %p16;selp.b32 %r235, 0, %r130, %p16;add.s32 %r141, %r235, %r131;mov.u32 %r142, 2;shfl.sync.up.b32 %r135, %r136, %r142, %r183, %r184;shfl.sync.up.b32 %r140, %r141, %r142, %r183, %r184;min.s32 %r236, %r135, %r136;setp.lt.s32 %p17, %r124, 2;selp.b32 %r146, %r136, %r236, %p17;selp.b32 %r237, 0, %r140, %p17;add.s32 %r151, %r237, %r141;mov.u32 %r152, 4;shfl.sync.up.b32 %r145, %r146, %r152, %r183, %r184;shfl.sync.up.b32 %r150, %r151, %r152, %r183, %r184;min.s32 %r238, %r145, %r146;setp.lt.s32 %p18, %r124, 4;selp.b32 %r156, %r146, %r238, %p18;selp.b32 %r239, 0, %r150, %p18;add.s32 %r161, %r239, %r151;mov.u32 %r162, 8;shfl.sync.up.b32 %r155, %r156, %r162, %r183, %r184;shfl.sync.up.b32 %r160, %r161, %r162, %r183, %r184;min.s32 %r240, %r155, %r156;setp.lt.s32 %p19, %r124, 8;selp.b32 %r166, %r156, %r240, %p19;selp.b32 %r241, 0, %r160, %p19;add.s32 %r171, %r241, %r161;mov.u32 %r172, 16;shfl.sync.up.b32 %r165, %r166, %r172, %r183, %r184;shfl.sync.up.b32 %r170, %r171, %r172, %r183, %r184;min.s32 %r242, %r165, %r166;setp.lt.s32 %p20, %r124, 16;selp.b32 %r176, %r166, %r242, %p20;selp.b32 %r243, 0, %r170, %p20;add.s32 %r181, %r243, %r171;shfl.sync.up.b32 %r175, %r176, %r182, %r183, %r184;shfl.sync.up.b32 %r180, %r181, %r182, %r183, %r184;ld.shared.v2.u32 {%r359, %r360}, [%r189+16];ld.shared.v2.u32 {%r246, %r247}, [%r189+24];ld.shared.v2.u32 {%r248, %r249}, [%r189+32];ld.shared.v2.u32 {%r250, %r251}, [%r189+40];ld.shared.v2.u32 {%r252, %r253}, [%r189+48];ld.shared.v2.u32 {%r254, %r255}, [%r189+56];ld.shared.v2.u32 {%r256, %r257}, [%r189+64];ld.shared.v2.u32 {%r258, %r259}, [%r189+72];@%p15 bra BB22_13;min.s32 %r359, %r175, %r359;add.s32 %r360, %r360, %r180;BB22_13:st.shared.v2.u32 [%r189+16], {%r359, %r360};min.s32 %r265, %r359, %r246;add.s32 %r266, %r247, %r360;st.shared.v2.u32 [%r189+24], {%r265, %r266};min.s32 %r267, %r265, %r248;add.s32 %r268, %r249, %r266;st.shared.v2.u32 [%r189+32], {%r267, %r268};min.s32 %r269, %r267, %r250;add.s32 %r270, %r251, %r268;st.shared.v2.u32 [%r189+40], {%r269, %r270};min.s32 %r271, %r269, %r252;add.s32 %r272, %r253, %r270;st.shared.v2.u32 [%r189+48], {%r271, %r272};min.s32 %r273, %r271, %r254;add.s32 %r274, %r255, %r272;st.shared.v2.u32 [%r189+56], {%r273, %r274};min.s32 %r275, %r273, %r256;add.s32 %r276, %r257, %r274;st.shared.v2.u32 [%r189+64], {%r275, %r276};min.s32 %r277, %r275, %r258;add.s32 %r278, %r259, %r276;st.shared.v2.u32 [%r189+72], {%r277, %r278};BB22_14:mov.u32 %r332, %ntid.x;mov.u32 %r331, %tid.x;add.s32 %r280, %r332, -1;setp.eq.s32 %p2, %r331, %r280;bar.sync 0;mov.u32 %r338, %tid.x;shr.u32 %r337, %r338, 3;add.s32 %r336, %r337, %r338;shl.b32 %r335, %r336, 3;mov.u32 %r334, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r333, %r334, %r335;ld.shared.v2.u32 {%r286, %r287}, [%r333+16];@!%p2 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd54, %rd10, 28;atom.global.add.u32 %r60, [%rd54], %r287;add.s32 %r289, %r60, %r287;ld.param.u32 %r61, [%rd7+312];setp.lt.s32 %p21, %r289, %r61;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd59, %rd10, 32;atom.global.add.u32 %r293, [%rd59], %r287;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r293;ld.global.u32 %r361, [%rd2+12];setp.ge.s32 %p22, %r286, %r361;@%p22 bra BB22_19;add.s64 %rd63, %rd10, 80;add.s64 %rd64, %rd10, 64;atom.global.min.s32 %r295, [%rd64], %r286;xor.b32 %r296, %r88, 2147483647;setp.gt.s32 %p23, %r88, -1;selp.b32 %r297, %r88, %r296, %p23;mov.b32 %f9, %r297;xor.b32 %r298, %r286, 2147483647;setp.gt.s32 %p24, %r286, -1;selp.b32 %r299, %r286, %r298, %p24;mov.b32 %f10, %r299;add.f32 %f11, %f9, %f10;mov.b32 %r300, %f11;setp.gt.s32 %p25, %r300, -1;xor.b32 %r301, %r300, 2147483647;selp.b32 %r302, %r300, %r301, %p25;atom.global.min.s32 %r303, [%rd63], %r302;mov.u32 %r361, %r286;BB22_19:setp.gt.s32 %p26, %r362, %r60;@%p26 bra BB22_25;setp.gt.s32 %p27, %r88, -1;xor.b32 %r304, %r88, 2147483647;selp.b32 %r305, %r88, %r304, %p27;mov.b32 %f14, %r305;ld.param.u32 %r66, [%rd7+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r362, %r66, %r362;setp.le.s32 %p28, %r362, %r60;@%p28 bra BB22_21;setp.eq.s32 %p29, %r361, 2147483647;mov.u32 %r363, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r361, -1;xor.b32 %r307, %r361, 2147483647;selp.b32 %r308, %r361, %r307, %p30;mov.b32 %f12, %r308;add.f32 %f13, %f12, %f14;mov.b32 %r309, %f13;setp.gt.s32 %p31, %r309, -1;xor.b32 %r310, %r309, 2147483647;selp.b32 %r363, %r309, %r310, %p31;BB22_24:mov.b32 %r311, %f14;setp.gt.s32 %p32, %r311, -1;xor.b32 %r312, %r311, 2147483647;selp.b32 %r313, %r311, %r312, %p32;add.s64 %rd69, %rd10, 80;add.s64 %rd70, %rd10, 72;atom.global.min.s32 %r315, [%rd70], %r313;add.s64 %rd71, %rd10, 76;atom.global.max.s32 %r316, [%rd71], %r362;atom.global.min.s32 %r317, [%rd69], %r363;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r61;ld.global.u32 %r290, [%rd2+-4];or.b32 %r291, %r290, 2;st.global.u32 [%rd2+-4], %r291;BB22_25:bar.sync 0;ld.param.u32 %r318, [%rd7+312];ld.shared.u32 %r71, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r71, %r318;@%p33 bra BB22_32;setp.ne.s32 %p40, %r358, 2147483647;selp.b32 %r319, -1, 0, %p40;add.s32 %r320, %r287, %r319;add.s32 %r72, %r320, %r71;setp.eq.s32 %p35, %r358, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd74, [%rd7+128];cvta.to.global.u64 %rd75, %rd74;ld.param.u32 %r321, [%rd7+136];mul.lo.s32 %r322, %r321, %r344;cvt.s64.s32 %rd76, %r322;cvt.s64.s32 %rd5, %r72;add.s64 %rd77, %rd76, %rd5;shl.b64 %rd78, %rd77, 3;add.s64 %rd79, %rd75, %rd78;st.global.v2.u32 [%rd79], {%r357, %r358};ld.global.u32 %r73, [%rd2+4];setp.lt.s32 %p36, %r354, 0;@%p36 bra BB22_29;ld.param.u32 %r323, [%rd7+308];setp.lt.s32 %p37, %r354, %r323;@%p37 bra BB22_30;BB22_29:mov.u64 %rd81, $str4;cvta.global.u64 %rd82, %rd81;mov.u64 %rd83, $str1;cvta.global.u64 %rd84, %rd83;mov.u64 %rd85, __unnamed_4;cvta.global.u64 %rd86, %rd85;mov.u32 %r324, 844;mov.u64 %rd87, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd82;.param .b64 param1;st.param.b64 [param1+0], %rd84;.param .b32 param2;st.param.b32 [param2+0], %r324;.param .b64 param3;st.param.b64 [param3+0], %rd86;.param .b64 param4;st.param.b64 [param4+0], %rd87;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd89, [%rd7+144];cvta.to.global.u64 %rd90, %rd89;ld.param.u32 %r325, [%rd7+152];mul.lo.s32 %r326, %r325, %r344;cvt.s64.s32 %rd91, %r326;add.s64 %rd92, %rd91, %rd5;shl.b64 %rd93, %rd92, 3;add.s64 %rd94, %rd90, %rd93;add.s32 %r327, %r73, %r354;st.global.v2.u32 [%rd94], {%r327, %r356};BB22_31:mov.u32 %r339, %ntid.x;mov.u32 %r328, %nctaid.x;mad.lo.s32 %r351, %r328, %r339, %r351;setp.lt.s32 %p38, %r351, %r9;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r343, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r330, %nctaid.y;add.s32 %r344, %r330, %r344;setp.lt.s32 %p39, %r344, %r343;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<366>;.reg .b64 %rd<90>;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r343, %ctaid.y;setp.ge.s32 %p3, %r343, %r2;@%p3 bra BB23_33;mov.u32 %r123, %laneid;BB23_2:mov.b64 %rd89, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd7, %rd89;ld.param.u64 %rd1, [%rd7+16];cvta.to.global.u64 %rd8, %rd1;ld.param.u32 %r7, [%rd7+24];mul.lo.s32 %r80, %r7, %r343;mul.wide.s32 %rd9, %r80, 136;add.s64 %rd10, %rd8, %rd9;add.s64 %rd2, %rd10, 52;ld.global.u32 %r8, [%rd10+52];mov.u32 %r81, %ctaid.x;mov.u32 %r82, %ntid.x;mul.lo.s32 %r350, %r82, %r81;ld.global.u32 %r9, [%rd10+16];setp.ge.s32 %p4, %r350, %r9;@%p4 bra BB23_32;ld.global.u32 %r84, [%rd2+-32];BB23_4:ld.global.v2.u32 {%r88, %r361}, [%rd2+20];ld.global.u32 %r19, [%rd2+-52];mov.u32 %r90, %tid.x;add.s32 %r20, %r350, %r90;mov.u32 %r357, 2147483647;setp.ge.s32 %p5, %r20, %r9;@%p5 bra BB23_10;add.s32 %r351, %r84, -1;setp.eq.s32 %p6, %r351, %r8;ld.param.u64 %rd12, [%rd7+64];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r91, [%rd7+72];mul.lo.s32 %r92, %r91, %r19;cvt.s64.s32 %rd4, %r92;mov.u32 %r353, %r8;@%p6 bra BB23_9;BB23_6:add.s32 %r93, %r353, 1;setp.eq.s32 %p7, %r93, %r351;@%p7 bra BB23_8;sub.s32 %r94, %r351, %r353;shr.u32 %r95, %r94, 31;add.s32 %r96, %r94, %r95;shr.s32 %r97, %r96, 1;add.s32 %r98, %r97, %r353;cvt.s64.s32 %rd13, %r98;add.s64 %rd14, %rd13, %rd4;shl.b64 %rd15, %rd14, 2;add.s64 %rd16, %rd3, %rd15;ld.global.u32 %r99, [%rd16];setp.gt.s32 %p8, %r99, %r20;add.s32 %r100, %r98, -1;selp.b32 %r353, %r353, %r98, %p8;selp.b32 %r351, %r100, %r351, %p8;setp.eq.s32 %p9, %r351, %r353;@%p9 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd17, %r351;add.s64 %rd18, %rd17, %rd4;shl.b64 %rd19, %rd18, 2;add.s64 %rd20, %rd3, %rd19;ld.global.u32 %r101, [%rd20];setp.gt.s32 %p10, %r101, %r20;selp.b32 %r353, %r353, %r351, %p10;BB23_9:cvt.s64.s32 %rd21, %r353;add.s64 %rd22, %rd21, %rd4;shl.b64 %rd23, %rd22, 2;add.s64 %rd24, %rd3, %rd23;ld.param.u64 %rd26, [%rd7+80];cvta.to.global.u64 %rd27, %rd26;ld.param.u32 %r102, [%rd7+88];mul.lo.s32 %r103, %r102, %r19;cvt.s64.s32 %rd28, %r103;add.s64 %rd29, %rd28, %rd21;shl.b64 %rd30, %rd29, 2;add.s64 %rd31, %rd27, %rd30;ld.global.u32 %r104, [%rd24];sub.s32 %r105, %r20, %r104;ld.global.u32 %r106, [%rd31];add.s32 %r355, %r106, %r105;ld.param.u64 %rd32, [%rd7+328];cvta.to.global.u64 %rd33, %rd32;mul.wide.s32 %rd34, %r355, 4;add.s64 %rd35, %rd33, %rd34;ld.global.u32 %r356, [%rd35];ld.param.u64 %rd36, [%rd7+320];cvta.to.global.u64 %rd37, %rd36;add.s64 %rd38, %rd37, %rd34;ld.param.u64 %rd39, [%rd7+48];cvta.to.global.u64 %rd40, %rd39;ld.param.u32 %r107, [%rd7+56];mul.lo.s32 %r108, %r107, %r19;cvt.s64.s32 %rd41, %r108;add.s64 %rd42, %rd41, %rd21;shl.b64 %rd43, %rd42, 3;add.s64 %rd44, %rd40, %rd43;ld.global.u32 %r109, [%rd44+4];setp.gt.s32 %p11, %r109, -1;xor.b32 %r110, %r109, 2147483647;selp.b32 %r111, %r109, %r110, %p11;mov.b32 %f4, %r111;ld.global.f32 %f5, [%rd38];add.f32 %f6, %f5, %f4;mov.b32 %r112, %f6;setp.gt.s32 %p12, %r112, -1;xor.b32 %r113, %r112, 2147483647;selp.b32 %r114, %r112, %r113, %p12;ld.global.u32 %r115, [%rd2+28];setp.lt.s32 %p13, %r114, %r115;selp.b32 %r357, %r114, 2147483647, %p13;BB23_10:mov.u32 %r339, %tid.x;setp.lt.u32 %p1, %r339, 32;setp.ne.s32 %p14, %r357, 2147483647;shr.u32 %r117, %r339, 3;add.s32 %r118, %r117, %r339;shl.b32 %r119, %r118, 3;mov.u32 %r120, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r121, %r120, %r119;selp.u32 %r122, 1, 0, %p14;st.shared.v2.u32 [%r121+16], {%r357, %r122};bar.sync 0;@!%p1 bra BB23_14;bra.uni BB23_11;BB23_11:mov.u32 %r340, %tid.x;setp.eq.s32 %p15, %r340, 0;mul.lo.s32 %r185, %r340, 9;shl.b32 %r186, %r185, 3;add.s32 %r188, %r120, %r186;ld.shared.v2.u32 {%r189, %r190}, [%r188+24];ld.shared.v2.u32 {%r193, %r194}, [%r188+16];min.s32 %r197, %r193, %r189;add.s32 %r198, %r190, %r194;ld.shared.v2.u32 {%r199, %r200}, [%r188+32];min.s32 %r203, %r197, %r199;add.s32 %r204, %r198, %r200;ld.shared.v2.u32 {%r205, %r206}, [%r188+40];min.s32 %r209, %r203, %r205;add.s32 %r210, %r204, %r206;ld.shared.v2.u32 {%r211, %r212}, [%r188+48];min.s32 %r215, %r209, %r211;add.s32 %r216, %r210, %r212;ld.shared.v2.u32 {%r217, %r218}, [%r188+56];min.s32 %r221, %r215, %r217;add.s32 %r222, %r216, %r218;ld.shared.v2.u32 {%r223, %r224}, [%r188+64];min.s32 %r227, %r221, %r223;add.s32 %r228, %r222, %r224;ld.shared.v2.u32 {%r229, %r230}, [%r188+72];min.s32 %r125, %r227, %r229;add.s32 %r130, %r228, %r230;mov.u32 %r181, 1;mov.u32 %r182, 0;mov.u32 %r183, -1;shfl.sync.up.b32 %r124, %r125, %r181, %r182, %r183;shfl.sync.up.b32 %r129, %r130, %r181, %r182, %r183;min.s32 %r233, %r124, %r125;setp.lt.s32 %p16, %r123, 1;selp.b32 %r135, %r125, %r233, %p16;selp.b32 %r234, 0, %r129, %p16;add.s32 %r140, %r234, %r130;mov.u32 %r141, 2;shfl.sync.up.b32 %r134, %r135, %r141, %r182, %r183;shfl.sync.up.b32 %r139, %r140, %r141, %r182, %r183;min.s32 %r235, %r134, %r135;setp.lt.s32 %p17, %r123, 2;selp.b32 %r145, %r135, %r235, %p17;selp.b32 %r236, 0, %r139, %p17;add.s32 %r150, %r236, %r140;mov.u32 %r151, 4;shfl.sync.up.b32 %r144, %r145, %r151, %r182, %r183;shfl.sync.up.b32 %r149, %r150, %r151, %r182, %r183;min.s32 %r237, %r144, %r145;setp.lt.s32 %p18, %r123, 4;selp.b32 %r155, %r145, %r237, %p18;selp.b32 %r238, 0, %r149, %p18;add.s32 %r160, %r238, %r150;mov.u32 %r161, 8;shfl.sync.up.b32 %r154, %r155, %r161, %r182, %r183;shfl.sync.up.b32 %r159, %r160, %r161, %r182, %r183;min.s32 %r239, %r154, %r155;setp.lt.s32 %p19, %r123, 8;selp.b32 %r165, %r155, %r239, %p19;selp.b32 %r240, 0, %r159, %p19;add.s32 %r170, %r240, %r160;mov.u32 %r171, 16;shfl.sync.up.b32 %r164, %r165, %r171, %r182, %r183;shfl.sync.up.b32 %r169, %r170, %r171, %r182, %r183;min.s32 %r241, %r164, %r165;setp.lt.s32 %p20, %r123, 16;selp.b32 %r175, %r165, %r241, %p20;selp.b32 %r242, 0, %r169, %p20;add.s32 %r180, %r242, %r170;shfl.sync.up.b32 %r174, %r175, %r181, %r182, %r183;shfl.sync.up.b32 %r179, %r180, %r181, %r182, %r183;ld.shared.v2.u32 {%r358, %r359}, [%r188+16];ld.shared.v2.u32 {%r245, %r246}, [%r188+24];ld.shared.v2.u32 {%r247, %r248}, [%r188+32];ld.shared.v2.u32 {%r249, %r250}, [%r188+40];ld.shared.v2.u32 {%r251, %r252}, [%r188+48];ld.shared.v2.u32 {%r253, %r254}, [%r188+56];ld.shared.v2.u32 {%r255, %r256}, [%r188+64];ld.shared.v2.u32 {%r257, %r258}, [%r188+72];@%p15 bra BB23_13;min.s32 %r358, %r174, %r358;add.s32 %r359, %r359, %r179;BB23_13:st.shared.v2.u32 [%r188+16], {%r358, %r359};min.s32 %r264, %r358, %r245;add.s32 %r265, %r246, %r359;st.shared.v2.u32 [%r188+24], {%r264, %r265};min.s32 %r266, %r264, %r247;add.s32 %r267, %r248, %r265;st.shared.v2.u32 [%r188+32], {%r266, %r267};min.s32 %r268, %r266, %r249;add.s32 %r269, %r250, %r267;st.shared.v2.u32 [%r188+40], {%r268, %r269};min.s32 %r270, %r268, %r251;add.s32 %r271, %r252, %r269;st.shared.v2.u32 [%r188+48], {%r270, %r271};min.s32 %r272, %r270, %r253;add.s32 %r273, %r254, %r271;st.shared.v2.u32 [%r188+56], {%r272, %r273};min.s32 %r274, %r272, %r255;add.s32 %r275, %r256, %r273;st.shared.v2.u32 [%r188+64], {%r274, %r275};min.s32 %r276, %r274, %r257;add.s32 %r277, %r258, %r275;st.shared.v2.u32 [%r188+72], {%r276, %r277};BB23_14:mov.u32 %r331, %ntid.x;mov.u32 %r330, %tid.x;add.s32 %r279, %r331, -1;setp.eq.s32 %p2, %r330, %r279;bar.sync 0;mov.u32 %r337, %tid.x;shr.u32 %r336, %r337, 3;add.s32 %r335, %r336, %r337;shl.b32 %r334, %r335, 3;mov.u32 %r333, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r332, %r333, %r334;ld.shared.v2.u32 {%r285, %r286}, [%r332+16];@!%p2 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd48, %rd10, 28;atom.global.add.u32 %r60, [%rd48], %r286;add.s32 %r288, %r60, %r286;ld.param.u32 %r61, [%rd7+312];setp.lt.s32 %p21, %r288, %r61;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd53, %rd10, 32;atom.global.add.u32 %r292, [%rd53], %r286;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r292;ld.global.u32 %r360, [%rd2+12];setp.ge.s32 %p22, %r285, %r360;@%p22 bra BB23_19;add.s64 %rd57, %rd10, 80;add.s64 %rd58, %rd10, 64;atom.global.min.s32 %r294, [%rd58], %r285;xor.b32 %r295, %r88, 2147483647;setp.gt.s32 %p23, %r88, -1;selp.b32 %r296, %r88, %r295, %p23;mov.b32 %f7, %r296;xor.b32 %r297, %r285, 2147483647;setp.gt.s32 %p24, %r285, -1;selp.b32 %r298, %r285, %r297, %p24;mov.b32 %f8, %r298;add.f32 %f9, %f7, %f8;mov.b32 %r299, %f9;setp.gt.s32 %p25, %r299, -1;xor.b32 %r300, %r299, 2147483647;selp.b32 %r301, %r299, %r300, %p25;atom.global.min.s32 %r302, [%rd57], %r301;mov.u32 %r360, %r285;BB23_19:setp.gt.s32 %p26, %r361, %r60;@%p26 bra BB23_25;setp.gt.s32 %p27, %r88, -1;xor.b32 %r303, %r88, 2147483647;selp.b32 %r304, %r88, %r303, %p27;mov.b32 %f12, %r304;ld.param.u32 %r66, [%rd7+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r361, %r66, %r361;setp.le.s32 %p28, %r361, %r60;@%p28 bra BB23_21;setp.eq.s32 %p29, %r360, 2147483647;mov.u32 %r362, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r360, -1;xor.b32 %r306, %r360, 2147483647;selp.b32 %r307, %r360, %r306, %p30;mov.b32 %f10, %r307;add.f32 %f11, %f10, %f12;mov.b32 %r308, %f11;setp.gt.s32 %p31, %r308, -1;xor.b32 %r309, %r308, 2147483647;selp.b32 %r362, %r308, %r309, %p31;BB23_24:mov.b32 %r310, %f12;setp.gt.s32 %p32, %r310, -1;xor.b32 %r311, %r310, 2147483647;selp.b32 %r312, %r310, %r311, %p32;add.s64 %rd63, %rd10, 80;add.s64 %rd64, %rd10, 72;atom.global.min.s32 %r314, [%rd64], %r312;add.s64 %rd65, %rd10, 76;atom.global.max.s32 %r315, [%rd65], %r361;atom.global.min.s32 %r316, [%rd63], %r362;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r61;ld.global.u32 %r289, [%rd2+-4];or.b32 %r290, %r289, 2;st.global.u32 [%rd2+-4], %r290;BB23_25:bar.sync 0;ld.param.u32 %r317, [%rd7+312];ld.shared.u32 %r71, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r71, %r317;@%p33 bra BB23_32;setp.ne.s32 %p40, %r357, 2147483647;selp.b32 %r318, -1, 0, %p40;add.s32 %r319, %r286, %r318;add.s32 %r72, %r319, %r71;setp.eq.s32 %p35, %r357, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd68, [%rd7+128];cvta.to.global.u64 %rd69, %rd68;ld.param.u32 %r320, [%rd7+136];mul.lo.s32 %r321, %r320, %r343;cvt.s64.s32 %rd70, %r321;cvt.s64.s32 %rd5, %r72;add.s64 %rd71, %rd70, %rd5;shl.b64 %rd72, %rd71, 3;add.s64 %rd73, %rd69, %rd72;st.global.v2.u32 [%rd73], {%r356, %r357};ld.global.u32 %r73, [%rd2+4];setp.lt.s32 %p36, %r353, 0;@%p36 bra BB23_29;ld.param.u32 %r322, [%rd7+308];setp.lt.s32 %p37, %r353, %r322;@%p37 bra BB23_30;BB23_29:mov.u64 %rd75, $str4;cvta.global.u64 %rd76, %rd75;mov.u64 %rd77, $str1;cvta.global.u64 %rd78, %rd77;mov.u64 %rd79, __unnamed_5;cvta.global.u64 %rd80, %rd79;mov.u32 %r323, 844;mov.u64 %rd81, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd76;.param .b64 param1;st.param.b64 [param1+0], %rd78;.param .b32 param2;st.param.b32 [param2+0], %r323;.param .b64 param3;st.param.b64 [param3+0], %rd80;.param .b64 param4;st.param.b64 [param4+0], %rd81;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd83, [%rd7+144];cvta.to.global.u64 %rd84, %rd83;ld.param.u32 %r324, [%rd7+152];mul.lo.s32 %r325, %r324, %r343;cvt.s64.s32 %rd85, %r325;add.s64 %rd86, %rd85, %rd5;shl.b64 %rd87, %rd86, 3;add.s64 %rd88, %rd84, %rd87;add.s32 %r326, %r73, %r353;st.global.v2.u32 [%rd88], {%r326, %r355};BB23_31:mov.u32 %r338, %ntid.x;mov.u32 %r327, %nctaid.x;mad.lo.s32 %r350, %r327, %r338, %r350;setp.lt.s32 %p38, %r350, %r9;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r342, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r329, %nctaid.y;add.s32 %r343, %r329, %r343;setp.lt.s32 %p39, %r343, %r342;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<24>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r13, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r1;@%p1 bra BB26_6;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r3, %r15, %r14, %r16;mov.u32 %r4, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r5, %r17, %r15;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r18, %r22, 34;mul.wide.s32 %rd7, %r18, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r19, [%rd8+136];ld.global.u32 %r8, [%rd8];sub.s32 %r9, %r19, %r8;setp.ge.s32 %p2, %r3, %r9;@%p2 bra BB26_5;mul.lo.s32 %r20, %r22, %r13;cvt.s64.s32 %rd2, %r20;mov.u32 %r23, %r3;BB26_4:cvt.s64.s32 %rd9, %r23;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r21, %r23, %r8;mul.wide.s32 %rd14, %r21, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;add.s32 %r23, %r5, %r23;setp.lt.s32 %p3, %r23, %r9;@%p3 bra BB26_4;BB26_5:add.s32 %r22, %r4, %r22;setp.lt.s32 %p4, %r22, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<24>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r13, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r1;@%p1 bra BB27_6;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r3, %r15, %r14, %r16;mov.u32 %r4, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r5, %r17, %r15;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r18, %r22, 34;mul.wide.s32 %rd7, %r18, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r19, [%rd8+136];ld.global.u32 %r8, [%rd8];sub.s32 %r9, %r19, %r8;setp.ge.s32 %p2, %r3, %r9;@%p2 bra BB27_5;mul.lo.s32 %r20, %r22, %r13;cvt.s64.s32 %rd2, %r20;mov.u32 %r23, %r3;BB27_4:cvt.s64.s32 %rd9, %r23;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r21, %r23, %r8;mul.wide.s32 %rd14, %r21, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;add.s32 %r23, %r5, %r23;setp.lt.s32 %p3, %r23, %r9;@%p3 bra BB27_4;BB27_5:add.s32 %r22, %r4, %r22;setp.lt.s32 %p4, %r22, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<24>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r13, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r1;@%p1 bra BB28_6;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r3, %r15, %r14, %r16;mov.u32 %r4, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r5, %r17, %r15;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r18, %r22, 34;mul.wide.s32 %rd7, %r18, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r19, [%rd8+136];ld.global.u32 %r8, [%rd8];sub.s32 %r9, %r19, %r8;setp.ge.s32 %p2, %r3, %r9;@%p2 bra BB28_5;mul.lo.s32 %r20, %r22, %r13;cvt.s64.s32 %rd2, %r20;mov.u32 %r23, %r3;BB28_4:cvt.s64.s32 %rd9, %r23;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r21, %r23, %r8;mul.wide.s32 %rd14, %r21, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;add.s32 %r23, %r5, %r23;setp.lt.s32 %p3, %r23, %r9;@%p3 bra BB28_4;BB28_5:add.s32 %r22, %r4, %r22;setp.lt.s32 %p4, %r22, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<25>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r13, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r23, %ctaid.y;setp.ge.s32 %p1, %r23, %r1;@%p1 bra BB29_6;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r3, %r15, %r14, %r16;mov.u32 %r4, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r5, %r17, %r15;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r18, %r23, 34;mul.wide.s32 %rd7, %r18, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r19, [%rd8+136];ld.global.u32 %r8, [%rd8];sub.s32 %r9, %r19, %r8;setp.ge.s32 %p2, %r3, %r9;@%p2 bra BB29_5;mul.lo.s32 %r20, %r23, %r13;cvt.s64.s32 %rd2, %r20;mov.u32 %r24, %r3;BB29_4:cvt.s64.s32 %rd9, %r24;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r21, [%rd12];add.s32 %r22, %r24, %r8;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r21;add.s32 %r24, %r5, %r24;setp.lt.s32 %p3, %r24, %r9;@%p3 bra BB29_4;BB29_5:add.s32 %r23, %r4, %r23;setp.lt.s32 %p4, %r23, %r1;@%p4 bra BB29_2;BB29_6:ret;}########~~~#}}}#|||#{{{#zzz#yyy#xxx#>>>#www#vvv#uuu#ttt#sss#rrr#qqq#ppp#ooo#mmm###lll#kkk#jjj#iii#hhh#ggg @ ! ! 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``bpXq`a@@p(H\ @ GBB"C1@H(#ܑ @`a @@ @H# @@@@@ ]@(@@@@@cuda-decoder-kernels.cucuda-decoder-kernels-utils.h!is_representative || extra_cost == 0.0fmain_q_idx >= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@; ;R fP;xs8l;0;)ppVp WDpX~pY pHZ= pT[5 p4\p]pTT^p\_)pT`ApXaipbpx\c pxd+"pL|e<$pHf%ptg'pth})pi+pHjj-plk>/pdl|1pm3pHnF5pHo6p@Tp8p,q9pDr:p se p\ p] _ pa @pc\; ; pV(pWZpXpYu pZ L[m `[ <\D\Y ]%(]^_5 `M a] auxb|b-Xc 4dS!8d"em#(e%f&g 'g( h[*#i*#i,&jT.p)k(0L,l0P,lH2,/m20/mh4 2n"64o77p69:qm:x=r';P@@s2Ag@yCh@@Ei@Gj@M Hk@ @Jl@ Pm'@1@`o'@pp@ r@q@xr@|@s @@ t @@u @v@!w @#x@o%y@v'z@){?@A+| @,@}@. ~'@10@3@@ @4@@6@@88@9@:@@@ $ \$ ] a br d"@(e)1i-,k/( l1 m&p@V6X#@cuda-decoder-kernels.cuELF3\##@8@.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5240.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4792.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4276.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3655$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3657.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtVPt`t~lt@xtttuu,tJ1t7t@)=tCtp?ItOt U-rW!.7X/ Y 0 Z 1[26"[("[H/3\v45U]w}67^8_9`G!:M"aT#x#;%<&b'y(=9)>#*c+?,dp-z-@.A/eo0{0BH1"e2C}3f4Dn5g6E 7F7h9G9i:|;H<I{=j>J?k@}}AKaBlFC~CLOEM$FmFRGN0HOInLJP$KojLQ;MprNR+Oq)PSPrQT RsvRURRR2VWXc YV Z@[\@]R^#_=`@!a &b)c@5,d@/e"3f5gu7h@n9i=j@3?kAl EmHn@Jo@LpNqPrQs@4 /local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/usr/local/cuda/include/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/../iterator/../local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/../../warp/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/usr/local/cuda/include/thrust/system/detail/sequential/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/../cudadecoder/usr/include/c++/7/usr/include/c++/7/bits/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../thread/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/..cuda-decoder-kernels.cucuda_device_runtime_api.hrdevice_atomic_functions.hpp@sm_32_atomic_functions.hpp*util_device.cuhޛSblock_scan_raking.cuhޛblock_scan.cuhޛ¤warp_scan_shfl.cuhޛblock_reduce_warp_reductions.cuhޛLblock_reduce.cuhޛblock_histogram_sort.cuhޛ@block_histogram.cuhޛblock_radix_sort.cuh ޛƫblock_radix_rank.cuh ޛblock_scan_warp_scans.cuhޛblock_exchange.cuh ޛјexecution_policy.h cuda-decoder-common.h cmath move.h 3thread_scan.cuhޛRthread_reduce.cuhޛ/util_ptx.cuhޛcuda-decoder-kernels-utils.hG 0| ~8~~z  0| ~~ ~0 }z  0| ~8~~z  0| ~~ ~0 }z    x ` u {(iy %N #]yr5  $]  8qu{qi!y}yyk}R.|U-~S5 ~~8i({{( {8 mnzz(pt|z~z~||||||||||(}}}} }} }}~~ ~z"{Zzzz}}z(S-} ~z|8z-0S- v| v}~ {( ~~8i({{( {8znzzm_xp ~ r z~z~||||||||||(}}}} }} }}~~ ~z"{Zzzz}}z(S-} ~z|8z-0S- v| v}~ {( t 0t0 t 8zt yv}( (   t    vt t (8t  x }t {t t (t t {z }}}K5Ks(  u  8u  {}}~}w w w x| x u |u |(c{0&  v v ( 0u vz|}0}} }0(80(}F}}~| u li u fgcix($   uu  (zz~v( b 0v v zv( xx| vz ~8~~~(0000x~F v u ~}|u }0 t 8   w  ~}xwwwuz  w w w w  wwzP2}N2N3 ~}y  ~~ wmu wr rp uz  v0:   ww8w}w wz~~~~ ~F0  u u u * (   xny xyxx~~} x{|xxx8 x~( tcc ~~(~~~~ |o   y ~a~~ }0  ~ ~|h L(7M3 w  w w~hxx|v x|v  xv( z{vxxxzx~v xxzv v  x~ xzv v v ({ v xxxx~~ zv v 0vxzxv v   H:  xx((xx    y0yw wymjmhyw y| w~b0y y({|{ v  w~bh0; ( yy|y yikyv{}( y  wxx8~}y # ~{z0 { uyz ~~ ({8z |z z( }~}xy{8z}8}}}}}}}}}}}}}}}}}}}}}}}}}}} z}F~~} z ~}}삄D< D8zzy(}{}}}}}}}}}00}}(}}0(} }8}}8} }}}:F~~~~~~ ~~}~ }~ z0wwyy  ~t yz}y~y~M3 M( N0 y0~  {{(y y0   ~ ~ }(~zvx|~~{ v(~w v t ~ ~(~~~ } } } } ~ |]||z I;  ~ ~r( 6B8~0 ~ii ~(~~~ 0x~F,s v x} zo~ (~  {v v| (tx v~vt vz{( i ~~{}0}}}~~   0((z}}:F~(}}}~~yy YhY) ~ z~((}t8 ~ ~z uq {t( ~~||8 ~~~(~z0~}} ~{~zy v~ mrp 8 zz { w x|w{k}uyz  8}}} ('  >E({{|~}z >E({{|z~~8 =E({{|~}z <E({{|z~~8 < q k }([( dbj󁄁 ; 8[}nY2xn| ^r z}򄁁 :{nzz }0z  |~򁀀~0~~h gy~ ~oivj{}1O@nsssl{􄄄_􄄄 }}타y{}| { u~omm z~ 5{nzz }0z  |~򁀀~0~~y"gxyj -V}}!ocw v ^ {}1O@nsssl{􄄄_􄄄 }}타y{}| { u~omm z~ 0({z ~ v~~z񀁁  /}  z y~~v ~ uomo z~fpx w ~v v$woxv  w~ v w v }omm | -~ ( ylys v x z~zzzzz~zz yz y x  |}~ ,|j񀁀 }~{0Psss t u y u  '^~N3Q3i_ 􄄅}~z򀀄 y tomm } (|zz }j} rt "U z ~^~!} w z~u{ 0Pssss~󃂀~󃂀~󃂀~󃂀~ ~~~~~_􄄄}x w~ w v rz ~~{{0 %} zzsz{~ m ~ ~kkk kzkn{}|}{ omm rx fv ow~ ~w k   #~  ( vtu ~v { v z z z󃃃z y񀁁  !{ }svc   wjzno yy y }z{~g~ 򀀁}qjihx񁀃vvvvv |{~~|z~~}}d"}-R0X~zzr}~ |w򁁁yo w x}򀁄  z}~u  vq ~  yv ~)Z&Z%]mqbzns} xez{esvsxxo w]"]os{ ovm}no |wdqji{u ~x Zz{ ~z u  u zS5|z{(ypst z ~~sswsz~  ~}58 ~z [y tx({xqq s  v {|}u { v v 0  {򂁅{~~0~~y x |~huzui({򄁀vvvvvvvv z z z z z z z z z z z z z z z z z z z z~󃃃󃃃󃃃󃃃%_f yo ~ w~ v v }{} { ~8 hz섁 si x xsss+Xx(gs i|(n&l(s  x  x0|  { x ~􄄄􄄄􄄄2S􄄄ꅀ yꅀ yꅀ yꅀ yꅀ{* wwww wwwrU>mhhPmFm P5K]( { z*hAiiyqjj ~r ~(m0!I3Q~ i~ ~vt S` u jrlk~w v  񁁀 s }} U {  z0 }x z~ "t v za y v |~{q xz im} t~{{vvvv z ||pv w z  |mu}((~ z0 Qsss xm { {z z |{ | yz yz| ~~~~_􄄄}q  ||~u  f p2R tm  ]#^ v  a ~_Z&!j wiN1 h v 8 |{|r񃅂w {mmtteX g gqqqqj gv x {z~mv ~x x n w x~{v wx znuv 퀁 8I xw}w}} }} ~~~b'X򂆇|s }섃}{~y  J k|  } {0 I is} z{񆁁  ~y zzl nn  z%`~u x~ {{ vmk~ s u 0 r us d _" xZ) LJ Gt}u~򁁁z ;(.version 6.2.target sm_35.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<871>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r827, %ctaid.y;setp.ge.s32 %p2, %r827, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r91, %tid.x;shr.u32 %r92, %r91, 5;add.s32 %r93, %r92, %r91;mov.u32 %r94, %nctaid.x;mov.u32 %r95, %ntid.x;mul.lo.s32 %r3, %r94, %r95;shl.b32 %r96, %r93, 2;mov.u32 %r97, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r4, %r97, %r96;shl.b32 %r98, %r93, 3;mov.u32 %r99, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r5, %r99, %r98;mov.u32 %r328, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r12, [%rd1+24];mul.lo.s32 %r100, %r12, %r827;mul.wide.s32 %rd8, %r100, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r13, [%rd3];ld.global.v2.u32 {%r21, %r860}, [%rd3+16];setp.lt.s32 %p3, %r21, 1;@%p3 bra BB10_34;ld.global.u32 %r16, [%rd3+56];ld.global.u32 %r17, [%rd3+80];ld.global.u32 %r23, [%rd3+52];BB10_4:mov.u32 %r22, %r860;mov.u32 %r104, %ctaid.x;mul.lo.s32 %r858, %r95, %r104;mov.u32 %r853, 0;setp.ge.s32 %p4, %r858, %r21;@%p4 bra BB10_22;add.s32 %r27, %r22, -1;mul.lo.s32 %r843, %r95, %r104;mov.u32 %r841, 0;BB10_6:add.s32 %r35, %r843, %r91;mov.u32 %r848, 2147483647;setp.ge.s32 %p5, %r35, %r21;@%p5 bra BB10_14;setp.eq.s32 %p6, %r27, %r23;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r111, [%rd1+72];mul.lo.s32 %r112, %r111, %r13;cvt.s64.s32 %rd5, %r112;mov.u32 %r845, %r27;mov.u32 %r847, %r23;@%p6 bra BB10_11;BB10_8:add.s32 %r113, %r847, 1;setp.eq.s32 %p7, %r113, %r845;@%p7 bra BB10_10;sub.s32 %r114, %r845, %r847;shr.u32 %r115, %r114, 31;add.s32 %r116, %r114, %r115;shr.s32 %r117, %r116, 1;add.s32 %r118, %r117, %r847;cvt.s64.s32 %rd10, %r118;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r119, [%rd13];setp.gt.s32 %p8, %r119, %r35;add.s32 %r120, %r118, -1;selp.b32 %r847, %r847, %r118, %p8;selp.b32 %r845, %r120, %r845, %p8;setp.eq.s32 %p9, %r845, %r847;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r845;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r121, [%rd17];setp.gt.s32 %p10, %r121, %r35;selp.b32 %r847, %r847, %r845, %p10;BB10_11:cvt.s64.s32 %rd18, %r847;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r122, [%rd1+88];mul.lo.s32 %r123, %r122, %r13;cvt.s64.s32 %rd24, %r123;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r124, [%rd21];sub.s32 %r125, %r35, %r124;ld.global.u32 %r126, [%rd27];add.s32 %r849, %r126, %r125;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r849, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r850, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r127, [%rd1+56];mul.lo.s32 %r128, %r127, %r13;cvt.s64.s32 %rd37, %r128;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r129, [%rd40+4];setp.gt.s32 %p11, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r131, %r129, %r130, %p11;mov.b32 %f1, %r131;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r132, %f3;setp.gt.s32 %p12, %r132, -1;xor.b32 %r133, %r132, 2147483647;selp.b32 %r44, %r132, %r133, %p12;ld.global.u32 %r134, [%rd3+64];setp.ge.s32 %p13, %r44, %r134;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r136, [%rd44], %r44;BB10_13:setp.lt.s32 %p14, %r44, %r17;selp.b32 %r848, %r44, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r848, 2147483647;selp.u32 %r137, 1, 0, %p15;st.shared.u32 [%r4+16], %r137;bar.sync 0;setp.gt.u32 %p16, %r91, 31;@%p16 bra BB10_17;mov.u32 %r824, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r174, %r91, 33;shl.b32 %r175, %r174, 2;add.s32 %r177, %r824, %r175;ld.shared.u32 %r178, [%r177+20];ld.shared.u32 %r179, [%r177+16];add.s32 %r180, %r178, %r179;ld.shared.u32 %r181, [%r177+24];add.s32 %r182, %r180, %r181;ld.shared.u32 %r183, [%r177+28];add.s32 %r184, %r182, %r183;ld.shared.u32 %r185, [%r177+32];add.s32 %r186, %r184, %r185;ld.shared.u32 %r187, [%r177+36];add.s32 %r188, %r186, %r187;ld.shared.u32 %r189, [%r177+40];add.s32 %r190, %r188, %r189;ld.shared.u32 %r191, [%r177+44];add.s32 %r192, %r190, %r191;ld.shared.u32 %r193, [%r177+48];add.s32 %r194, %r192, %r193;ld.shared.u32 %r195, [%r177+52];add.s32 %r196, %r194, %r195;ld.shared.u32 %r197, [%r177+56];add.s32 %r198, %r196, %r197;ld.shared.u32 %r199, [%r177+60];add.s32 %r200, %r198, %r199;ld.shared.u32 %r201, [%r177+64];add.s32 %r202, %r200, %r201;ld.shared.u32 %r203, [%r177+68];add.s32 %r204, %r202, %r203;ld.shared.u32 %r205, [%r177+72];add.s32 %r206, %r204, %r205;ld.shared.u32 %r207, [%r177+76];add.s32 %r208, %r206, %r207;ld.shared.u32 %r209, [%r177+80];add.s32 %r210, %r208, %r209;ld.shared.u32 %r211, [%r177+84];add.s32 %r212, %r210, %r211;ld.shared.u32 %r213, [%r177+88];add.s32 %r214, %r212, %r213;ld.shared.u32 %r215, [%r177+92];add.s32 %r216, %r214, %r215;ld.shared.u32 %r217, [%r177+96];add.s32 %r218, %r216, %r217;ld.shared.u32 %r219, [%r177+100];add.s32 %r220, %r218, %r219;ld.shared.u32 %r221, [%r177+104];add.s32 %r222, %r220, %r221;ld.shared.u32 %r223, [%r177+108];add.s32 %r224, %r222, %r223;ld.shared.u32 %r225, [%r177+112];add.s32 %r226, %r224, %r225;ld.shared.u32 %r227, [%r177+116];add.s32 %r228, %r226, %r227;ld.shared.u32 %r229, [%r177+120];add.s32 %r230, %r228, %r229;ld.shared.u32 %r231, [%r177+124];add.s32 %r232, %r230, %r231;ld.shared.u32 %r233, [%r177+128];add.s32 %r234, %r232, %r233;ld.shared.u32 %r235, [%r177+132];add.s32 %r236, %r234, %r235;ld.shared.u32 %r237, [%r177+136];add.s32 %r238, %r236, %r237;ld.shared.u32 %r239, [%r177+140];add.s32 %r142, %r238, %r239;mov.u32 %r140, 1;mov.u32 %r165, 0;mov.u32 %r172, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r142, %r140, %r165, %r172; @p add.s32 r0, r0, %r142; mov.s32 %r138, r0;}mov.u32 %r146, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r138, %r146, %r165, %r172; @p add.s32 r0, r0, %r138; mov.s32 %r144, r0;}mov.u32 %r152, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r144, %r152, %r165, %r172; @p add.s32 r0, r0, %r144; mov.s32 %r150, r0;}mov.u32 %r158, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r150, %r158, %r165, %r172; @p add.s32 r0, r0, %r150; mov.s32 %r156, r0;}mov.u32 %r164, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r156, %r164, %r165, %r172; @p add.s32 r0, r0, %r156; mov.s32 %r162, r0;}mov.u32 %r171, 31;shfl.sync.idx.b32 %r168, %r162, %r171, %r171, %r172;sub.s32 %r240, %r162, %r142;ld.shared.u32 %r241, [%r177+16];add.s32 %r242, %r241, %r240;ld.shared.u32 %r243, [%r177+20];add.s32 %r244, %r243, %r242;ld.shared.u32 %r245, [%r177+24];add.s32 %r246, %r245, %r244;ld.shared.u32 %r247, [%r177+28];add.s32 %r248, %r247, %r246;ld.shared.u32 %r249, [%r177+32];add.s32 %r250, %r249, %r248;ld.shared.u32 %r251, [%r177+36];add.s32 %r252, %r251, %r250;ld.shared.u32 %r253, [%r177+40];add.s32 %r254, %r253, %r252;ld.shared.u32 %r255, [%r177+44];add.s32 %r256, %r255, %r254;ld.shared.u32 %r257, [%r177+48];add.s32 %r258, %r257, %r256;ld.shared.u32 %r259, [%r177+52];add.s32 %r260, %r259, %r258;ld.shared.u32 %r261, [%r177+56];add.s32 %r262, %r261, %r260;ld.shared.u32 %r263, [%r177+60];add.s32 %r264, %r263, %r262;ld.shared.u32 %r265, [%r177+64];add.s32 %r266, %r265, %r264;ld.shared.u32 %r267, [%r177+68];add.s32 %r268, %r267, %r266;ld.shared.u32 %r269, [%r177+72];add.s32 %r270, %r269, %r268;ld.shared.u32 %r271, [%r177+76];add.s32 %r272, %r271, %r270;ld.shared.u32 %r273, [%r177+80];add.s32 %r274, %r273, %r272;ld.shared.u32 %r275, [%r177+84];add.s32 %r276, %r275, %r274;ld.shared.u32 %r277, [%r177+88];add.s32 %r278, %r277, %r276;ld.shared.u32 %r279, [%r177+92];add.s32 %r280, %r279, %r278;ld.shared.u32 %r281, [%r177+96];add.s32 %r282, %r281, %r280;ld.shared.u32 %r283, [%r177+100];add.s32 %r284, %r283, %r282;ld.shared.u32 %r285, [%r177+104];add.s32 %r286, %r285, %r284;ld.shared.u32 %r287, [%r177+108];add.s32 %r288, %r287, %r286;ld.shared.u32 %r289, [%r177+112];add.s32 %r290, %r289, %r288;ld.shared.u32 %r291, [%r177+116];add.s32 %r292, %r291, %r290;ld.shared.u32 %r293, [%r177+120];add.s32 %r294, %r293, %r292;ld.shared.u32 %r295, [%r177+124];add.s32 %r296, %r295, %r294;ld.shared.u32 %r297, [%r177+128];add.s32 %r298, %r297, %r296;ld.shared.u32 %r299, [%r177+132];add.s32 %r300, %r299, %r298;ld.shared.u32 %r301, [%r177+136];add.s32 %r302, %r301, %r300;st.shared.u32 [%r177+16], %r240;st.shared.u32 [%r177+20], %r242;st.shared.u32 [%r177+24], %r244;st.shared.u32 [%r177+28], %r246;st.shared.u32 [%r177+32], %r248;st.shared.u32 [%r177+36], %r250;st.shared.u32 [%r177+40], %r252;st.shared.u32 [%r177+44], %r254;st.shared.u32 [%r177+48], %r256;st.shared.u32 [%r177+52], %r258;st.shared.u32 [%r177+56], %r260;st.shared.u32 [%r177+60], %r262;st.shared.u32 [%r177+64], %r264;st.shared.u32 [%r177+68], %r266;st.shared.u32 [%r177+72], %r268;st.shared.u32 [%r177+76], %r270;st.shared.u32 [%r177+80], %r272;st.shared.u32 [%r177+84], %r274;st.shared.u32 [%r177+88], %r276;st.shared.u32 [%r177+92], %r278;st.shared.u32 [%r177+96], %r280;st.shared.u32 [%r177+100], %r282;st.shared.u32 [%r177+104], %r284;st.shared.u32 [%r177+108], %r286;st.shared.u32 [%r177+112], %r288;st.shared.u32 [%r177+116], %r290;st.shared.u32 [%r177+120], %r292;st.shared.u32 [%r177+124], %r294;st.shared.u32 [%r177+128], %r296;st.shared.u32 [%r177+132], %r298;st.shared.u32 [%r177+136], %r300;st.shared.u32 [%r177+140], %r302;setp.ne.s32 %p17, %r91, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r168;BB10_17:bar.sync 0;ld.shared.u32 %r303, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r853, %r303, %r841;ld.param.u32 %r304, [%rd1+312];setp.lt.s32 %p18, %r853, %r304;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r848, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r307, [%r4+16];add.s32 %r308, %r307, %r841;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r309, [%rd1+136];mul.lo.s32 %r310, %r309, %r827;cvt.s64.s32 %rd47, %r310;cvt.s64.s32 %rd48, %r308;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r850, %r848};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r311, [%rd1+152];mul.lo.s32 %r312, %r311, %r827;cvt.s64.s32 %rd54, %r312;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r313, %r847, %r16;st.global.v2.u32 [%rd57], {%r313, %r849};BB10_21:bar.sync 0;add.s32 %r843, %r3, %r843;setp.lt.s32 %p20, %r843, %r21;mov.u32 %r841, %r853;@%p20 bra BB10_6;BB10_22:mov.u32 %r21, 0;setp.ge.s32 %p21, %r858, %r853;mov.u32 %r860, %r22;@%p21 bra BB10_33;BB10_23:mov.u32 %r861, 0;add.s32 %r63, %r858, %r91;mov.u32 %r862, -1;setp.ge.s32 %p22, %r63, %r853;@%p22 bra BB10_25;add.s32 %r823, %r858, %r91;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r321, [%rd1+136];mul.lo.s32 %r322, %r321, %r827;cvt.s64.s32 %rd60, %r322;cvt.s64.s32 %rd61, %r823;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r857, %r856}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r857, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r325, [%rd68+4];ld.global.u32 %r862, [%rd68];sub.s32 %r861, %r325, %r862;BB10_25:setp.lt.u32 %p1, %r91, 32;setp.ne.s32 %p23, %r862, -1;selp.u32 %r327, 1, 0, %p23;st.shared.v2.u32 [%r5+16], {%r861, %r327};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r822, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r400, %r91, 33;shl.b32 %r401, %r400, 3;add.s32 %r403, %r822, %r401;ld.shared.v2.u32 {%r404, %r405}, [%r403+24];ld.shared.v2.u32 {%r408, %r409}, [%r403+16];add.s32 %r412, %r404, %r408;add.s32 %r413, %r405, %r409;ld.shared.v2.u32 {%r414, %r415}, [%r403+32];add.s32 %r418, %r412, %r414;add.s32 %r419, %r413, %r415;ld.shared.v2.u32 {%r420, %r421}, [%r403+40];add.s32 %r424, %r418, %r420;add.s32 %r425, %r419, %r421;ld.shared.v2.u32 {%r426, %r427}, [%r403+48];add.s32 %r430, %r424, %r426;add.s32 %r431, %r425, %r427;ld.shared.v2.u32 {%r432, %r433}, [%r403+56];add.s32 %r436, %r430, %r432;add.s32 %r437, %r431, %r433;ld.shared.v2.u32 {%r438, %r439}, [%r403+64];add.s32 %r442, %r436, %r438;add.s32 %r443, %r437, %r439;ld.shared.v2.u32 {%r444, %r445}, [%r403+72];add.s32 %r448, %r442, %r444;add.s32 %r449, %r443, %r445;ld.shared.v2.u32 {%r450, %r451}, [%r403+80];add.s32 %r454, %r448, %r450;add.s32 %r455, %r449, %r451;ld.shared.v2.u32 {%r456, %r457}, [%r403+88];add.s32 %r460, %r454, %r456;add.s32 %r461, %r455, %r457;ld.shared.v2.u32 {%r462, %r463}, [%r403+96];add.s32 %r466, %r460, %r462;add.s32 %r467, %r461, %r463;ld.shared.v2.u32 {%r468, %r469}, [%r403+104];add.s32 %r472, %r466, %r468;add.s32 %r473, %r467, %r469;ld.shared.v2.u32 {%r474, %r475}, [%r403+112];add.s32 %r478, %r472, %r474;add.s32 %r479, %r473, %r475;ld.shared.v2.u32 {%r480, %r481}, [%r403+120];add.s32 %r484, %r478, %r480;add.s32 %r485, %r479, %r481;ld.shared.v2.u32 {%r486, %r487}, [%r403+128];add.s32 %r490, %r484, %r486;add.s32 %r491, %r485, %r487;ld.shared.v2.u32 {%r492, %r493}, [%r403+136];add.s32 %r496, %r490, %r492;add.s32 %r497, %r491, %r493;ld.shared.v2.u32 {%r498, %r499}, [%r403+144];add.s32 %r502, %r496, %r498;add.s32 %r503, %r497, %r499;ld.shared.v2.u32 {%r504, %r505}, [%r403+152];add.s32 %r508, %r502, %r504;add.s32 %r509, %r503, %r505;ld.shared.v2.u32 {%r510, %r511}, [%r403+160];add.s32 %r514, %r508, %r510;add.s32 %r515, %r509, %r511;ld.shared.v2.u32 {%r516, %r517}, [%r403+168];add.s32 %r520, %r514, %r516;add.s32 %r521, %r515, %r517;ld.shared.v2.u32 {%r522, %r523}, [%r403+176];add.s32 %r526, %r520, %r522;add.s32 %r527, %r521, %r523;ld.shared.v2.u32 {%r528, %r529}, [%r403+184];add.s32 %r532, %r526, %r528;add.s32 %r533, %r527, %r529;ld.shared.v2.u32 {%r534, %r535}, [%r403+192];add.s32 %r538, %r532, %r534;add.s32 %r539, %r533, %r535;ld.shared.v2.u32 {%r540, %r541}, [%r403+200];add.s32 %r544, %r538, %r540;add.s32 %r545, %r539, %r541;ld.shared.v2.u32 {%r546, %r547}, [%r403+208];add.s32 %r550, %r544, %r546;add.s32 %r551, %r545, %r547;ld.shared.v2.u32 {%r552, %r553}, [%r403+216];add.s32 %r556, %r550, %r552;add.s32 %r557, %r551, %r553;ld.shared.v2.u32 {%r558, %r559}, [%r403+224];add.s32 %r562, %r556, %r558;add.s32 %r563, %r557, %r559;ld.shared.v2.u32 {%r564, %r565}, [%r403+232];add.s32 %r568, %r562, %r564;add.s32 %r569, %r563, %r565;ld.shared.v2.u32 {%r570, %r571}, [%r403+240];add.s32 %r574, %r568, %r570;add.s32 %r575, %r569, %r571;ld.shared.v2.u32 {%r576, %r577}, [%r403+248];add.s32 %r580, %r574, %r576;add.s32 %r581, %r575, %r577;ld.shared.v2.u32 {%r582, %r583}, [%r403+256];add.s32 %r586, %r580, %r582;add.s32 %r587, %r581, %r583;ld.shared.v2.u32 {%r588, %r589}, [%r403+264];add.s32 %r330, %r586, %r588;add.s32 %r335, %r587, %r589;mov.u32 %r396, 1;mov.u32 %r397, 0;mov.u32 %r398, -1;shfl.sync.up.b32 %r329, %r330, %r396, %r397, %r398;shfl.sync.up.b32 %r334, %r335, %r396, %r397, %r398;setp.lt.s32 %p24, %r328, 1;selp.b32 %r592, 0, %r329, %p24;add.s32 %r340, %r592, %r330;selp.b32 %r593, 0, %r334, %p24;add.s32 %r345, %r593, %r335;mov.u32 %r346, 2;shfl.sync.up.b32 %r339, %r340, %r346, %r397, %r398;shfl.sync.up.b32 %r344, %r345, %r346, %r397, %r398;setp.lt.s32 %p25, %r328, 2;selp.b32 %r594, 0, %r339, %p25;add.s32 %r350, %r594, %r340;selp.b32 %r595, 0, %r344, %p25;add.s32 %r355, %r595, %r345;mov.u32 %r356, 4;shfl.sync.up.b32 %r349, %r350, %r356, %r397, %r398;shfl.sync.up.b32 %r354, %r355, %r356, %r397, %r398;setp.lt.s32 %p26, %r328, 4;selp.b32 %r596, 0, %r349, %p26;add.s32 %r360, %r596, %r350;selp.b32 %r597, 0, %r354, %p26;add.s32 %r365, %r597, %r355;mov.u32 %r366, 8;shfl.sync.up.b32 %r359, %r360, %r366, %r397, %r398;shfl.sync.up.b32 %r364, %r365, %r366, %r397, %r398;setp.lt.s32 %p27, %r328, 8;selp.b32 %r598, 0, %r359, %p27;add.s32 %r370, %r598, %r360;selp.b32 %r599, 0, %r364, %p27;add.s32 %r375, %r599, %r365;mov.u32 %r376, 16;shfl.sync.up.b32 %r369, %r370, %r376, %r397, %r398;shfl.sync.up.b32 %r374, %r375, %r376, %r397, %r398;setp.lt.s32 %p28, %r328, 16;selp.b32 %r600, 0, %r369, %p28;add.s32 %r390, %r600, %r370;selp.b32 %r601, 0, %r374, %p28;add.s32 %r395, %r601, %r375;mov.u32 %r387, 31;shfl.sync.idx.b32 %r379, %r390, %r387, %r387, %r398;shfl.sync.idx.b32 %r384, %r395, %r387, %r387, %r398;shfl.sync.up.b32 %r389, %r390, %r396, %r397, %r398;shfl.sync.up.b32 %r394, %r395, %r396, %r397, %r398;setp.eq.s32 %p29, %r328, 0;ld.shared.v2.u32 {%r602, %r603}, [%r403+16];ld.shared.v2.u32 {%r606, %r607}, [%r403+24];ld.shared.v2.u32 {%r610, %r611}, [%r403+32];ld.shared.v2.u32 {%r614, %r615}, [%r403+40];ld.shared.v2.u32 {%r618, %r619}, [%r403+48];ld.shared.v2.u32 {%r622, %r623}, [%r403+56];ld.shared.v2.u32 {%r626, %r627}, [%r403+64];ld.shared.v2.u32 {%r630, %r631}, [%r403+72];ld.shared.v2.u32 {%r634, %r635}, [%r403+80];ld.shared.v2.u32 {%r638, %r639}, [%r403+88];ld.shared.v2.u32 {%r642, %r643}, [%r403+96];ld.shared.v2.u32 {%r646, %r647}, [%r403+104];ld.shared.v2.u32 {%r650, %r651}, [%r403+112];ld.shared.v2.u32 {%r654, %r655}, [%r403+120];ld.shared.v2.u32 {%r658, %r659}, [%r403+128];ld.shared.v2.u32 {%r662, %r663}, [%r403+136];ld.shared.v2.u32 {%r666, %r667}, [%r403+144];ld.shared.v2.u32 {%r670, %r671}, [%r403+152];ld.shared.v2.u32 {%r674, %r675}, [%r403+160];ld.shared.v2.u32 {%r678, %r679}, [%r403+168];ld.shared.v2.u32 {%r682, %r683}, [%r403+176];ld.shared.v2.u32 {%r686, %r687}, [%r403+184];ld.shared.v2.u32 {%r690, %r691}, [%r403+192];ld.shared.v2.u32 {%r694, %r695}, [%r403+200];ld.shared.v2.u32 {%r698, %r699}, [%r403+208];ld.shared.v2.u32 {%r702, %r703}, [%r403+216];ld.shared.v2.u32 {%r706, %r707}, [%r403+224];ld.shared.v2.u32 {%r710, %r711}, [%r403+232];ld.shared.v2.u32 {%r714, %r715}, [%r403+240];ld.shared.v2.u32 {%r718, %r719}, [%r403+248];ld.shared.v2.u32 {%r722, %r723}, [%r403+256];selp.b32 %r726, 0, %r389, %p29;selp.b32 %r727, 0, %r394, %p29;st.shared.v2.u32 [%r403+16], {%r726, %r727};add.s32 %r728, %r603, %r727;add.s32 %r729, %r602, %r726;st.shared.v2.u32 [%r403+24], {%r729, %r728};add.s32 %r730, %r607, %r728;add.s32 %r731, %r606, %r729;st.shared.v2.u32 [%r403+32], {%r731, %r730};add.s32 %r732, %r611, %r730;add.s32 %r733, %r610, %r731;st.shared.v2.u32 [%r403+40], {%r733, %r732};add.s32 %r734, %r615, %r732;add.s32 %r735, %r614, %r733;st.shared.v2.u32 [%r403+48], {%r735, %r734};add.s32 %r736, %r619, %r734;add.s32 %r737, %r618, %r735;st.shared.v2.u32 [%r403+56], {%r737, %r736};add.s32 %r738, %r623, %r736;add.s32 %r739, %r622, %r737;st.shared.v2.u32 [%r403+64], {%r739, %r738};add.s32 %r740, %r627, %r738;add.s32 %r741, %r626, %r739;st.shared.v2.u32 [%r403+72], {%r741, %r740};add.s32 %r742, %r631, %r740;add.s32 %r743, %r630, %r741;st.shared.v2.u32 [%r403+80], {%r743, %r742};add.s32 %r744, %r635, %r742;add.s32 %r745, %r634, %r743;st.shared.v2.u32 [%r403+88], {%r745, %r744};add.s32 %r746, %r639, %r744;add.s32 %r747, %r638, %r745;st.shared.v2.u32 [%r403+96], {%r747, %r746};add.s32 %r748, %r643, %r746;add.s32 %r749, %r642, %r747;st.shared.v2.u32 [%r403+104], {%r749, %r748};add.s32 %r750, %r647, %r748;add.s32 %r751, %r646, %r749;st.shared.v2.u32 [%r403+112], {%r751, %r750};add.s32 %r752, %r651, %r750;add.s32 %r753, %r650, %r751;st.shared.v2.u32 [%r403+120], {%r753, %r752};add.s32 %r754, %r655, %r752;add.s32 %r755, %r654, %r753;st.shared.v2.u32 [%r403+128], {%r755, %r754};add.s32 %r756, %r659, %r754;add.s32 %r757, %r658, %r755;st.shared.v2.u32 [%r403+136], {%r757, %r756};add.s32 %r758, %r663, %r756;add.s32 %r759, %r662, %r757;st.shared.v2.u32 [%r403+144], {%r759, %r758};add.s32 %r760, %r667, %r758;add.s32 %r761, %r666, %r759;st.shared.v2.u32 [%r403+152], {%r761, %r760};add.s32 %r762, %r671, %r760;add.s32 %r763, %r670, %r761;st.shared.v2.u32 [%r403+160], {%r763, %r762};add.s32 %r764, %r675, %r762;add.s32 %r765, %r674, %r763;st.shared.v2.u32 [%r403+168], {%r765, %r764};add.s32 %r766, %r679, %r764;add.s32 %r767, %r678, %r765;st.shared.v2.u32 [%r403+176], {%r767, %r766};add.s32 %r768, %r683, %r766;add.s32 %r769, %r682, %r767;st.shared.v2.u32 [%r403+184], {%r769, %r768};add.s32 %r770, %r687, %r768;add.s32 %r771, %r686, %r769;st.shared.v2.u32 [%r403+192], {%r771, %r770};add.s32 %r772, %r691, %r770;add.s32 %r773, %r690, %r771;st.shared.v2.u32 [%r403+200], {%r773, %r772};add.s32 %r774, %r695, %r772;add.s32 %r775, %r694, %r773;st.shared.v2.u32 [%r403+208], {%r775, %r774};add.s32 %r776, %r699, %r774;add.s32 %r777, %r698, %r775;st.shared.v2.u32 [%r403+216], {%r777, %r776};add.s32 %r778, %r703, %r776;add.s32 %r779, %r702, %r777;st.shared.v2.u32 [%r403+224], {%r779, %r778};add.s32 %r780, %r707, %r778;add.s32 %r781, %r706, %r779;st.shared.v2.u32 [%r403+232], {%r781, %r780};add.s32 %r782, %r711, %r780;add.s32 %r783, %r710, %r781;st.shared.v2.u32 [%r403+240], {%r783, %r782};add.s32 %r784, %r715, %r782;add.s32 %r785, %r714, %r783;st.shared.v2.u32 [%r403+248], {%r785, %r784};add.s32 %r786, %r719, %r784;add.s32 %r787, %r718, %r785;st.shared.v2.u32 [%r403+256], {%r787, %r786};add.s32 %r788, %r723, %r786;add.s32 %r789, %r722, %r787;st.shared.v2.u32 [%r403+264], {%r789, %r788};setp.ne.s32 %p30, %r91, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r379, %r384};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r790, %r791}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r76, %r791, %r860;ld.param.u32 %r792, [%rd1+308];setp.lt.s32 %p31, %r76, %r792;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r77, %r790, %r21;setp.eq.s32 %p32, %r862, -1;@%p32 bra BB10_32;add.s32 %r825, %r858, %r91;ld.shared.v2.u32 {%r795, %r796}, [%r5+16];add.s32 %r799, %r796, %r860;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r800, [%rd1+88];mul.lo.s32 %r801, %r800, %r13;cvt.s64.s32 %rd71, %r801;cvt.s64.s32 %rd72, %r799;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r862;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r802, [%rd1+72];mul.lo.s32 %r803, %r802, %r13;cvt.s64.s32 %rd78, %r803;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r804, %r795, %r21;st.global.u32 [%rd81], %r804;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r805, [%rd1+56];mul.lo.s32 %r806, %r805, %r13;cvt.s64.s32 %rd84, %r806;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r857, %r856};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r807, [%rd1+120];mul.lo.s32 %r808, %r807, %r827;cvt.s64.s32 %rd90, %r808;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r809, [%rd1+152];mul.lo.s32 %r810, %r809, %r827;cvt.s64.s32 %rd96, %r810;cvt.s64.s32 %rd97, %r825;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r811, [%rd1+104];mul.lo.s32 %r812, %r811, %r827;cvt.s64.s32 %rd104, %r812;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r813, 0;st.global.u32 [%rd107], %r813;BB10_32:bar.sync 0;add.s32 %r858, %r3, %r858;setp.lt.s32 %p33, %r858, %r853;mov.u32 %r21, %r77;mov.u32 %r860, %r76;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r21, 0;mov.u32 %r23, %r22;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r305, [%rd3+48];or.b32 %r306, %r305, 2;st.global.u32 [%rd3+48], %r306;mov.u32 %r860, %r22;bra.uni BB10_34;BB10_29:ld.global.u32 %r793, [%rd3+48];or.b32 %r794, %r793, 1;st.global.u32 [%rd3+48], %r794;BB10_34:setp.ne.s32 %p35, %r91, 0;@%p35 bra BB10_36;mov.u32 %r815, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r816, [%rd1+40];mul.lo.s32 %r817, %r816, %r827;mul.wide.s32 %rd110, %r817, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r815, %r860};st.global.v2.u32 [%rd111+16], {%r815, %r860};BB10_36:ld.param.u32 %r819, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r818, %nctaid.y;add.s32 %r827, %r818, %r827;setp.lt.s32 %p36, %r827, %r819;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<64>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd63, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd63;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;shl.b64 %rd41, %rd40, 32;cvt.u64.u32 %rd42, %r70;or.b64 %rd43, %rd41, %rd42;add.s64 %rd44, %rd27, 8;atom.global.min.u64 %rd45, [%rd44], %rd43;ld.param.u64 %rd46, [%rd1+272];cvta.to.global.u64 %rd47, %rd46;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd48, %r58;add.s64 %rd49, %rd48, %rd6;shl.b64 %rd50, %rd49, 2;add.s64 %rd51, %rd47, %rd50;st.global.u32 [%rd51], %r56;ld.param.u64 %rd63, [%rd1+48];cvta.to.global.u64 %rd52, %rd63;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd53, %r59;add.s64 %rd54, %rd53, %rd6;shl.b64 %rd55, %rd54, 3;add.s64 %rd56, %rd52, %rd55;st.global.u32 [%rd56+4], %r71;ld.param.u64 %rd57, [%rd1+240];cvta.to.global.u64 %rd58, %rd57;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd59, %r61;add.s64 %rd60, %rd59, %rd6;shl.b64 %rd61, %rd60, 2;add.s64 %rd62, %rd58, %rd61;st.global.u32 [%rd62], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<24>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd5, %rd4;ld.param.u64 %rd1, [%rd5+16];ld.param.u32 %r3, [%rd5+24];mov.u32 %r12, %ntid.x;mov.u32 %r13, %nctaid.x;mul.lo.s32 %r4, %r13, %r12;cvta.to.global.u64 %rd6, %rd1;BB21_2:mul.lo.s32 %r14, %r3, %r31;mul.wide.s32 %rd7, %r14, 136;add.s64 %rd8, %rd6, %rd7;mov.u32 %r15, %ctaid.x;mov.u32 %r17, %tid.x;mad.lo.s32 %r32, %r12, %r15, %r17;ld.global.u32 %r6, [%rd8+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd2, [%rd5+240];ld.param.u32 %r19, [%rd5+248];mul.lo.s32 %r20, %r19, %r31;cvt.s64.s32 %rd3, %r20;BB21_4:cvt.s64.s32 %rd10, %r32;add.s64 %rd11, %rd3, %rd10;cvta.to.global.u64 %rd12, %rd2;shl.b64 %rd13, %rd11, 2;add.s64 %rd14, %rd12, %rd13;ld.global.u32 %r9, [%rd14];setp.gt.s32 %p3, %r9, -1;@%p3 bra BB21_6;ld.param.u64 %rd16, [%rd5+160];cvta.to.global.u64 %rd17, %rd16;ld.param.u32 %r24, [%rd5+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd18, %r25;shr.s32 %r26, %r9, 31;xor.b32 %r27, %r26, %r9;cvt.s64.s32 %rd19, %r27;add.s64 %rd20, %rd18, %rd19;shl.b64 %rd21, %rd20, 4;add.s64 %rd22, %rd17, %rd21;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd22], {%r29, %r28};mov.u64 %rd23, -1;st.global.u64 [%rd22+8], %rd23;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}########~~~#}}}#|||#{{{#zzz#yyy#xxx#>>>#www#vvv#uuu#ttt#sss#rrr#qqq#ppp#ooo#mmm###lll#kkk#jjj#iii#hhh#ggg @ ! ! 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Vc ?t H0 ?"0(0 \ 0@ /a H  Ft . `:?t  .@`lS`SD,Ġ.,`<@  HR`0ŠRDBP`FPDD@ ?"   :\ HH<@B$Ca<ݠ > > > hz>> > : \,H4<`0" 8?"H?"8H 88H 0 ?"0\(䠰&$`$[[<h<<<<<:82z*zzz" zRzBz:\zl1a) ( - ,J@0( 5aQ4$N@58$@E$:@-HR=<$*H6 `.,6@`L. `(匜ML6Rl3aNL.@`64`FF`zZ4@`J@  F -H& <" < &x:8 *x.x6420zzrzbzR zB(z20z"# z<\@hB pzH<@"pz+aDt-ab*  f*", `2($&,`4 4 \2(+aF< Dt:W<*<<4%DHDX!4$ . ` " .@`"/aV ! $N88$RT. `UT"VT.@`JL0`PMLNL0@`H"1ab e $"@Y@$^`0`a`f Z`0@`J 2`N2@` <HH"3a^ ! $&#tZ\2`<]\"V= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@; ;R fP;4l;N';C)pptVpWDp|X~pY pHZ= pT[5 p \p]p@T^p\_)pT`ApDaipbpd\c pxd+"p8|e<$pHf%ptg'ppth})pi+pHjj-plk>/pPl|1pm3pHnF5pHo6p,Tp8p,q9pDr:p se p\ pp] _ pa 0pc\; ; `V(`WZ`X`Yu `Z <[m L[ (\0\Y ]%]^_5`Ma]auhblb-Hc $dS!(d"em#e%f& g ' g( h[*i*i,jT.`k(0<l0@lH2m2 mh4n"6!o7$p69'qm:h*r';@-@s2.g@y@0h @2i@3j @M 5k@ 7l@ =@m(@1@Ko(@Yp @ [q @`@r@ds&@jt&@r@u @yv@!|w(@#@x@o%@y@v'@z@){@@A+@| @,@}@. ~(@10@3@ @4@@@6@88@9@:@@@ $ \$ ] a br d"@(e)1i-,k/( l1 m`@V6X<2@cuda-decoder-kernels.cuELF3\<@22@8@{.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5243.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4795.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4280.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3659$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3661.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtQPo`o~lo@xooopp,oJ1o7o@)=oCop?IoOo U-rR!.7S/ T 0 U 1V26"V"V@/3Wq45UXr}67Y8Z9[G!:M"\T#s$;%]'t%(<)^*=+_\,uH->.`.vT/?/"`.1@1a"3A3b5B5CL6c}7DM8d&9w9E;F;e;=G>f>x?H@gAyPCI%DhDzEJFiGKHjJLJk LMLlMN[Nm8OOOn PPE v u{ } z{ z >E v u{ } yz y =E v u{ } z{ z <E v u{ } yz y <z{(e3do0} ovlw z ; zw8 c/l{|r(j snr y :{n r {u |p}{ w   ~0yꅀ{ olj  z5OAssssuu||킃킃킃킃킁{}{y{{| z뀂  z(    ( 5{n r {u |p}{ w   ~0yꅀ{q$`m Z^j   z5OAssssuu|}}}}}|{}넃y녂{ {  z(~    ~( 0 ||}} y } 녀z} 0 /}   | y zy v   u   e  vxy u    u i  }bh    (0 -~   |ykjs  ~w u wzv x} tx  | p xqxxg ,|j n |  t 끂3Pj~  ~~  }} y } y } y }} y }5G~킃a \(y}}}}|  zy t z   (8 (|zv}uys| w rt}w  f0y c_(X%{ yizu 3Pj~ ~ ~ { } y } y }} y } y } {~킃킃킃킃킃킃킁  ux }v zz~}  %}  |zy j (} m | k(kkz kkꄀg}{    s  vxvy xzzk  v i  (( #~ u  v  o {njmpsv y x v( !{|#jxg wp} ww0 0z u  } zz  큁g  }t rslrlplj}|z}}d"{0R x x x x x x x n~z~ z y} {o y r z} z})Z0%]eqrzzrjvvwzx u}zx t x]" ]z||zzzos(x u}d q bzi{u w  Zzz 넁( ~z u   | 0 zK(5}w y0pss 0z ~~0(pss ~~ zz ~(5 ~z u %[ |{ q x0q u  v { (0u w { v(  z  |  냁~0yzkloi (| jnrvz jnrvz jnrv|@C>F;I8L5O2R/U,X)Z#a  y  oxz 큁v z ~|(  }  j z|((d s8  ns2As( P  !i ( ~              ꅀzzꅀz &~||||||||ts }|t|`&쁅쁅쁅쁅쁅쁅쁅쁂~쁂~|{  ~ ;Q m06|P3Kz)L x l  u w t#Qh o jl}v v 0v s (|{} Ux  v 8 }}q  (^"w v\8 ndx | 삁 낀  xqfi s tzz } wvvv z ||pp z(  |m r {|r}}  }  z3Pj~ ~ ~ { } y } y }} y } y } {~킃킃킃킃킃킃킁{|q   삁t)d |s&j  ux o xz } u  lvx }kgr$\  0( |z{ en z  w t{0_s_  _"d#k  {샅wk x yo x yzo yz~~ |~~nh|{X)Z(Q3W*샀}킀}}킀 z|q8}} }nzz  8 J|| r x}8 I||  {z} x}톁( ~y(zz |tt0nttz ttsz u   y{|} 0 lgs)er,R .Tm!N2P0R.a G p ~q w w| ;0.version 6.2.target sm_50.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<875>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r831, %ctaid.y;setp.ge.s32 %p2, %r831, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r90, %tid.x;shr.u32 %r91, %r90, 5;add.s32 %r92, %r91, %r90;shl.b32 %r93, %r92, 2;mov.u32 %r94, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r3, %r94, %r93;shl.b32 %r95, %r92, 3;mov.u32 %r96, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r4, %r96, %r95;mov.u32 %r327, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r11, [%rd1+24];mul.lo.s32 %r97, %r11, %r831;mul.wide.s32 %rd8, %r97, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r12, [%rd3];ld.global.v2.u32 {%r20, %r864}, [%rd3+16];setp.lt.s32 %p3, %r20, 1;@%p3 bra BB10_34;ld.global.u32 %r15, [%rd3+56];ld.global.u32 %r16, [%rd3+80];ld.global.u32 %r22, [%rd3+52];BB10_4:mov.u32 %r21, %r864;mov.u32 %r101, %ctaid.x;mov.u32 %r102, %ntid.x;mul.lo.s32 %r862, %r102, %r101;mov.u32 %r857, 0;setp.ge.s32 %p4, %r862, %r20;@%p4 bra BB10_22;mov.u32 %r825, %ntid.x;add.s32 %r26, %r21, -1;mul.lo.s32 %r847, %r825, %r101;mov.u32 %r845, 0;BB10_6:add.s32 %r34, %r847, %r90;mov.u32 %r852, 2147483647;setp.ge.s32 %p5, %r34, %r20;@%p5 bra BB10_14;setp.eq.s32 %p6, %r26, %r22;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r108, [%rd1+72];mul.lo.s32 %r109, %r108, %r12;cvt.s64.s32 %rd5, %r109;mov.u32 %r849, %r26;mov.u32 %r851, %r22;@%p6 bra BB10_11;BB10_8:add.s32 %r110, %r851, 1;setp.eq.s32 %p7, %r110, %r849;@%p7 bra BB10_10;sub.s32 %r111, %r849, %r851;shr.u32 %r112, %r111, 31;add.s32 %r113, %r111, %r112;shr.s32 %r114, %r113, 1;add.s32 %r115, %r114, %r851;cvt.s64.s32 %rd10, %r115;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r116, [%rd13];setp.gt.s32 %p8, %r116, %r34;add.s32 %r117, %r115, -1;selp.b32 %r851, %r851, %r115, %p8;selp.b32 %r849, %r117, %r849, %p8;setp.eq.s32 %p9, %r849, %r851;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r849;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r118, [%rd17];setp.gt.s32 %p10, %r118, %r34;selp.b32 %r851, %r851, %r849, %p10;BB10_11:cvt.s64.s32 %rd18, %r851;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r119, [%rd1+88];mul.lo.s32 %r120, %r119, %r12;cvt.s64.s32 %rd24, %r120;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r121, [%rd21];sub.s32 %r122, %r34, %r121;ld.global.u32 %r123, [%rd27];add.s32 %r853, %r123, %r122;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r853, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r854, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r124, [%rd1+56];mul.lo.s32 %r125, %r124, %r12;cvt.s64.s32 %rd37, %r125;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r126, [%rd40+4];setp.gt.s32 %p11, %r126, -1;xor.b32 %r127, %r126, 2147483647;selp.b32 %r128, %r126, %r127, %p11;mov.b32 %f1, %r128;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r129, %f3;setp.gt.s32 %p12, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r43, %r129, %r130, %p12;ld.global.u32 %r131, [%rd3+64];setp.ge.s32 %p13, %r43, %r131;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r133, [%rd44], %r43;BB10_13:setp.lt.s32 %p14, %r43, %r16;selp.b32 %r852, %r43, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r852, 2147483647;selp.u32 %r134, 1, 0, %p15;st.shared.u32 [%r3+16], %r134;bar.sync 0;setp.gt.u32 %p16, %r90, 31;@%p16 bra BB10_17;mov.u32 %r827, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r171, %r90, 33;shl.b32 %r172, %r171, 2;add.s32 %r174, %r827, %r172;ld.shared.u32 %r175, [%r174+20];ld.shared.u32 %r176, [%r174+16];add.s32 %r177, %r175, %r176;ld.shared.u32 %r178, [%r174+24];add.s32 %r179, %r177, %r178;ld.shared.u32 %r180, [%r174+28];add.s32 %r181, %r179, %r180;ld.shared.u32 %r182, [%r174+32];add.s32 %r183, %r181, %r182;ld.shared.u32 %r184, [%r174+36];add.s32 %r185, %r183, %r184;ld.shared.u32 %r186, [%r174+40];add.s32 %r187, %r185, %r186;ld.shared.u32 %r188, [%r174+44];add.s32 %r189, %r187, %r188;ld.shared.u32 %r190, [%r174+48];add.s32 %r191, %r189, %r190;ld.shared.u32 %r192, [%r174+52];add.s32 %r193, %r191, %r192;ld.shared.u32 %r194, [%r174+56];add.s32 %r195, %r193, %r194;ld.shared.u32 %r196, [%r174+60];add.s32 %r197, %r195, %r196;ld.shared.u32 %r198, [%r174+64];add.s32 %r199, %r197, %r198;ld.shared.u32 %r200, [%r174+68];add.s32 %r201, %r199, %r200;ld.shared.u32 %r202, [%r174+72];add.s32 %r203, %r201, %r202;ld.shared.u32 %r204, [%r174+76];add.s32 %r205, %r203, %r204;ld.shared.u32 %r206, [%r174+80];add.s32 %r207, %r205, %r206;ld.shared.u32 %r208, [%r174+84];add.s32 %r209, %r207, %r208;ld.shared.u32 %r210, [%r174+88];add.s32 %r211, %r209, %r210;ld.shared.u32 %r212, [%r174+92];add.s32 %r213, %r211, %r212;ld.shared.u32 %r214, [%r174+96];add.s32 %r215, %r213, %r214;ld.shared.u32 %r216, [%r174+100];add.s32 %r217, %r215, %r216;ld.shared.u32 %r218, [%r174+104];add.s32 %r219, %r217, %r218;ld.shared.u32 %r220, [%r174+108];add.s32 %r221, %r219, %r220;ld.shared.u32 %r222, [%r174+112];add.s32 %r223, %r221, %r222;ld.shared.u32 %r224, [%r174+116];add.s32 %r225, %r223, %r224;ld.shared.u32 %r226, [%r174+120];add.s32 %r227, %r225, %r226;ld.shared.u32 %r228, [%r174+124];add.s32 %r229, %r227, %r228;ld.shared.u32 %r230, [%r174+128];add.s32 %r231, %r229, %r230;ld.shared.u32 %r232, [%r174+132];add.s32 %r233, %r231, %r232;ld.shared.u32 %r234, [%r174+136];add.s32 %r235, %r233, %r234;ld.shared.u32 %r236, [%r174+140];add.s32 %r139, %r235, %r236;mov.u32 %r137, 1;mov.u32 %r162, 0;mov.u32 %r169, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r139, %r137, %r162, %r169; @p add.s32 r0, r0, %r139; mov.s32 %r135, r0;}mov.u32 %r143, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r135, %r143, %r162, %r169; @p add.s32 r0, r0, %r135; mov.s32 %r141, r0;}mov.u32 %r149, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r141, %r149, %r162, %r169; @p add.s32 r0, r0, %r141; mov.s32 %r147, r0;}mov.u32 %r155, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r147, %r155, %r162, %r169; @p add.s32 r0, r0, %r147; mov.s32 %r153, r0;}mov.u32 %r161, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r153, %r161, %r162, %r169; @p add.s32 r0, r0, %r153; mov.s32 %r159, r0;}mov.u32 %r168, 31;shfl.sync.idx.b32 %r165, %r159, %r168, %r168, %r169;sub.s32 %r237, %r159, %r139;ld.shared.u32 %r238, [%r174+16];add.s32 %r239, %r238, %r237;ld.shared.u32 %r240, [%r174+20];add.s32 %r241, %r240, %r239;ld.shared.u32 %r242, [%r174+24];add.s32 %r243, %r242, %r241;ld.shared.u32 %r244, [%r174+28];add.s32 %r245, %r244, %r243;ld.shared.u32 %r246, [%r174+32];add.s32 %r247, %r246, %r245;ld.shared.u32 %r248, [%r174+36];add.s32 %r249, %r248, %r247;ld.shared.u32 %r250, [%r174+40];add.s32 %r251, %r250, %r249;ld.shared.u32 %r252, [%r174+44];add.s32 %r253, %r252, %r251;ld.shared.u32 %r254, [%r174+48];add.s32 %r255, %r254, %r253;ld.shared.u32 %r256, [%r174+52];add.s32 %r257, %r256, %r255;ld.shared.u32 %r258, [%r174+56];add.s32 %r259, %r258, %r257;ld.shared.u32 %r260, [%r174+60];add.s32 %r261, %r260, %r259;ld.shared.u32 %r262, [%r174+64];add.s32 %r263, %r262, %r261;ld.shared.u32 %r264, [%r174+68];add.s32 %r265, %r264, %r263;ld.shared.u32 %r266, [%r174+72];add.s32 %r267, %r266, %r265;ld.shared.u32 %r268, [%r174+76];add.s32 %r269, %r268, %r267;ld.shared.u32 %r270, [%r174+80];add.s32 %r271, %r270, %r269;ld.shared.u32 %r272, [%r174+84];add.s32 %r273, %r272, %r271;ld.shared.u32 %r274, [%r174+88];add.s32 %r275, %r274, %r273;ld.shared.u32 %r276, [%r174+92];add.s32 %r277, %r276, %r275;ld.shared.u32 %r278, [%r174+96];add.s32 %r279, %r278, %r277;ld.shared.u32 %r280, [%r174+100];add.s32 %r281, %r280, %r279;ld.shared.u32 %r282, [%r174+104];add.s32 %r283, %r282, %r281;ld.shared.u32 %r284, [%r174+108];add.s32 %r285, %r284, %r283;ld.shared.u32 %r286, [%r174+112];add.s32 %r287, %r286, %r285;ld.shared.u32 %r288, [%r174+116];add.s32 %r289, %r288, %r287;ld.shared.u32 %r290, [%r174+120];add.s32 %r291, %r290, %r289;ld.shared.u32 %r292, [%r174+124];add.s32 %r293, %r292, %r291;ld.shared.u32 %r294, [%r174+128];add.s32 %r295, %r294, %r293;ld.shared.u32 %r296, [%r174+132];add.s32 %r297, %r296, %r295;ld.shared.u32 %r298, [%r174+136];add.s32 %r299, %r298, %r297;st.shared.u32 [%r174+16], %r237;st.shared.u32 [%r174+20], %r239;st.shared.u32 [%r174+24], %r241;st.shared.u32 [%r174+28], %r243;st.shared.u32 [%r174+32], %r245;st.shared.u32 [%r174+36], %r247;st.shared.u32 [%r174+40], %r249;st.shared.u32 [%r174+44], %r251;st.shared.u32 [%r174+48], %r253;st.shared.u32 [%r174+52], %r255;st.shared.u32 [%r174+56], %r257;st.shared.u32 [%r174+60], %r259;st.shared.u32 [%r174+64], %r261;st.shared.u32 [%r174+68], %r263;st.shared.u32 [%r174+72], %r265;st.shared.u32 [%r174+76], %r267;st.shared.u32 [%r174+80], %r269;st.shared.u32 [%r174+84], %r271;st.shared.u32 [%r174+88], %r273;st.shared.u32 [%r174+92], %r275;st.shared.u32 [%r174+96], %r277;st.shared.u32 [%r174+100], %r279;st.shared.u32 [%r174+104], %r281;st.shared.u32 [%r174+108], %r283;st.shared.u32 [%r174+112], %r285;st.shared.u32 [%r174+116], %r287;st.shared.u32 [%r174+120], %r289;st.shared.u32 [%r174+124], %r291;st.shared.u32 [%r174+128], %r293;st.shared.u32 [%r174+132], %r295;st.shared.u32 [%r174+136], %r297;st.shared.u32 [%r174+140], %r299;setp.ne.s32 %p17, %r90, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r165;BB10_17:bar.sync 0;ld.shared.u32 %r300, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r857, %r300, %r845;ld.param.u32 %r301, [%rd1+312];setp.lt.s32 %p18, %r857, %r301;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r852, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r304, [%r3+16];add.s32 %r305, %r304, %r845;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r306, [%rd1+136];mul.lo.s32 %r307, %r306, %r831;cvt.s64.s32 %rd47, %r307;cvt.s64.s32 %rd48, %r305;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r854, %r852};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r308, [%rd1+152];mul.lo.s32 %r309, %r308, %r831;cvt.s64.s32 %rd54, %r309;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r310, %r851, %r15;st.global.v2.u32 [%rd57], {%r310, %r853};BB10_21:bar.sync 0;mov.u32 %r826, %ntid.x;mov.u32 %r312, %nctaid.x;mad.lo.s32 %r847, %r312, %r826, %r847;setp.lt.s32 %p20, %r847, %r20;mov.u32 %r845, %r857;@%p20 bra BB10_6;BB10_22:mov.u32 %r20, 0;setp.ge.s32 %p21, %r862, %r857;mov.u32 %r864, %r21;@%p21 bra BB10_33;BB10_23:mov.u32 %r865, 0;add.s32 %r62, %r862, %r90;mov.u32 %r866, -1;setp.ge.s32 %p22, %r62, %r857;@%p22 bra BB10_25;add.s32 %r824, %r862, %r90;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r320, [%rd1+136];mul.lo.s32 %r321, %r320, %r831;cvt.s64.s32 %rd60, %r321;cvt.s64.s32 %rd61, %r824;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r861, %r860}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r861, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r324, [%rd68+4];ld.global.u32 %r866, [%rd68];sub.s32 %r865, %r324, %r866;BB10_25:setp.lt.u32 %p1, %r90, 32;setp.ne.s32 %p23, %r866, -1;selp.u32 %r326, 1, 0, %p23;st.shared.v2.u32 [%r4+16], {%r865, %r326};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r823, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r399, %r90, 33;shl.b32 %r400, %r399, 3;add.s32 %r402, %r823, %r400;ld.shared.v2.u32 {%r403, %r404}, [%r402+24];ld.shared.v2.u32 {%r407, %r408}, [%r402+16];add.s32 %r411, %r403, %r407;add.s32 %r412, %r404, %r408;ld.shared.v2.u32 {%r413, %r414}, [%r402+32];add.s32 %r417, %r411, %r413;add.s32 %r418, %r412, %r414;ld.shared.v2.u32 {%r419, %r420}, [%r402+40];add.s32 %r423, %r417, %r419;add.s32 %r424, %r418, %r420;ld.shared.v2.u32 {%r425, %r426}, [%r402+48];add.s32 %r429, %r423, %r425;add.s32 %r430, %r424, %r426;ld.shared.v2.u32 {%r431, %r432}, [%r402+56];add.s32 %r435, %r429, %r431;add.s32 %r436, %r430, %r432;ld.shared.v2.u32 {%r437, %r438}, [%r402+64];add.s32 %r441, %r435, %r437;add.s32 %r442, %r436, %r438;ld.shared.v2.u32 {%r443, %r444}, [%r402+72];add.s32 %r447, %r441, %r443;add.s32 %r448, %r442, %r444;ld.shared.v2.u32 {%r449, %r450}, [%r402+80];add.s32 %r453, %r447, %r449;add.s32 %r454, %r448, %r450;ld.shared.v2.u32 {%r455, %r456}, [%r402+88];add.s32 %r459, %r453, %r455;add.s32 %r460, %r454, %r456;ld.shared.v2.u32 {%r461, %r462}, [%r402+96];add.s32 %r465, %r459, %r461;add.s32 %r466, %r460, %r462;ld.shared.v2.u32 {%r467, %r468}, [%r402+104];add.s32 %r471, %r465, %r467;add.s32 %r472, %r466, %r468;ld.shared.v2.u32 {%r473, %r474}, [%r402+112];add.s32 %r477, %r471, %r473;add.s32 %r478, %r472, %r474;ld.shared.v2.u32 {%r479, %r480}, [%r402+120];add.s32 %r483, %r477, %r479;add.s32 %r484, %r478, %r480;ld.shared.v2.u32 {%r485, %r486}, [%r402+128];add.s32 %r489, %r483, %r485;add.s32 %r490, %r484, %r486;ld.shared.v2.u32 {%r491, %r492}, [%r402+136];add.s32 %r495, %r489, %r491;add.s32 %r496, %r490, %r492;ld.shared.v2.u32 {%r497, %r498}, [%r402+144];add.s32 %r501, %r495, %r497;add.s32 %r502, %r496, %r498;ld.shared.v2.u32 {%r503, %r504}, [%r402+152];add.s32 %r507, %r501, %r503;add.s32 %r508, %r502, %r504;ld.shared.v2.u32 {%r509, %r510}, [%r402+160];add.s32 %r513, %r507, %r509;add.s32 %r514, %r508, %r510;ld.shared.v2.u32 {%r515, %r516}, [%r402+168];add.s32 %r519, %r513, %r515;add.s32 %r520, %r514, %r516;ld.shared.v2.u32 {%r521, %r522}, [%r402+176];add.s32 %r525, %r519, %r521;add.s32 %r526, %r520, %r522;ld.shared.v2.u32 {%r527, %r528}, [%r402+184];add.s32 %r531, %r525, %r527;add.s32 %r532, %r526, %r528;ld.shared.v2.u32 {%r533, %r534}, [%r402+192];add.s32 %r537, %r531, %r533;add.s32 %r538, %r532, %r534;ld.shared.v2.u32 {%r539, %r540}, [%r402+200];add.s32 %r543, %r537, %r539;add.s32 %r544, %r538, %r540;ld.shared.v2.u32 {%r545, %r546}, [%r402+208];add.s32 %r549, %r543, %r545;add.s32 %r550, %r544, %r546;ld.shared.v2.u32 {%r551, %r552}, [%r402+216];add.s32 %r555, %r549, %r551;add.s32 %r556, %r550, %r552;ld.shared.v2.u32 {%r557, %r558}, [%r402+224];add.s32 %r561, %r555, %r557;add.s32 %r562, %r556, %r558;ld.shared.v2.u32 {%r563, %r564}, [%r402+232];add.s32 %r567, %r561, %r563;add.s32 %r568, %r562, %r564;ld.shared.v2.u32 {%r569, %r570}, [%r402+240];add.s32 %r573, %r567, %r569;add.s32 %r574, %r568, %r570;ld.shared.v2.u32 {%r575, %r576}, [%r402+248];add.s32 %r579, %r573, %r575;add.s32 %r580, %r574, %r576;ld.shared.v2.u32 {%r581, %r582}, [%r402+256];add.s32 %r585, %r579, %r581;add.s32 %r586, %r580, %r582;ld.shared.v2.u32 {%r587, %r588}, [%r402+264];add.s32 %r329, %r585, %r587;add.s32 %r334, %r586, %r588;mov.u32 %r395, 1;mov.u32 %r396, 0;mov.u32 %r397, -1;shfl.sync.up.b32 %r328, %r329, %r395, %r396, %r397;shfl.sync.up.b32 %r333, %r334, %r395, %r396, %r397;setp.lt.s32 %p24, %r327, 1;selp.b32 %r591, 0, %r328, %p24;add.s32 %r339, %r591, %r329;selp.b32 %r592, 0, %r333, %p24;add.s32 %r344, %r592, %r334;mov.u32 %r345, 2;shfl.sync.up.b32 %r338, %r339, %r345, %r396, %r397;shfl.sync.up.b32 %r343, %r344, %r345, %r396, %r397;setp.lt.s32 %p25, %r327, 2;selp.b32 %r593, 0, %r338, %p25;add.s32 %r349, %r593, %r339;selp.b32 %r594, 0, %r343, %p25;add.s32 %r354, %r594, %r344;mov.u32 %r355, 4;shfl.sync.up.b32 %r348, %r349, %r355, %r396, %r397;shfl.sync.up.b32 %r353, %r354, %r355, %r396, %r397;setp.lt.s32 %p26, %r327, 4;selp.b32 %r595, 0, %r348, %p26;add.s32 %r359, %r595, %r349;selp.b32 %r596, 0, %r353, %p26;add.s32 %r364, %r596, %r354;mov.u32 %r365, 8;shfl.sync.up.b32 %r358, %r359, %r365, %r396, %r397;shfl.sync.up.b32 %r363, %r364, %r365, %r396, %r397;setp.lt.s32 %p27, %r327, 8;selp.b32 %r597, 0, %r358, %p27;add.s32 %r369, %r597, %r359;selp.b32 %r598, 0, %r363, %p27;add.s32 %r374, %r598, %r364;mov.u32 %r375, 16;shfl.sync.up.b32 %r368, %r369, %r375, %r396, %r397;shfl.sync.up.b32 %r373, %r374, %r375, %r396, %r397;setp.lt.s32 %p28, %r327, 16;selp.b32 %r599, 0, %r368, %p28;add.s32 %r389, %r599, %r369;selp.b32 %r600, 0, %r373, %p28;add.s32 %r394, %r600, %r374;mov.u32 %r386, 31;shfl.sync.idx.b32 %r378, %r389, %r386, %r386, %r397;shfl.sync.idx.b32 %r383, %r394, %r386, %r386, %r397;shfl.sync.up.b32 %r388, %r389, %r395, %r396, %r397;shfl.sync.up.b32 %r393, %r394, %r395, %r396, %r397;setp.eq.s32 %p29, %r327, 0;ld.shared.v2.u32 {%r601, %r602}, [%r402+16];ld.shared.v2.u32 {%r605, %r606}, [%r402+24];ld.shared.v2.u32 {%r609, %r610}, [%r402+32];ld.shared.v2.u32 {%r613, %r614}, [%r402+40];ld.shared.v2.u32 {%r617, %r618}, [%r402+48];ld.shared.v2.u32 {%r621, %r622}, [%r402+56];ld.shared.v2.u32 {%r625, %r626}, [%r402+64];ld.shared.v2.u32 {%r629, %r630}, [%r402+72];ld.shared.v2.u32 {%r633, %r634}, [%r402+80];ld.shared.v2.u32 {%r637, %r638}, [%r402+88];ld.shared.v2.u32 {%r641, %r642}, [%r402+96];ld.shared.v2.u32 {%r645, %r646}, [%r402+104];ld.shared.v2.u32 {%r649, %r650}, [%r402+112];ld.shared.v2.u32 {%r653, %r654}, [%r402+120];ld.shared.v2.u32 {%r657, %r658}, [%r402+128];ld.shared.v2.u32 {%r661, %r662}, [%r402+136];ld.shared.v2.u32 {%r665, %r666}, [%r402+144];ld.shared.v2.u32 {%r669, %r670}, [%r402+152];ld.shared.v2.u32 {%r673, %r674}, [%r402+160];ld.shared.v2.u32 {%r677, %r678}, [%r402+168];ld.shared.v2.u32 {%r681, %r682}, [%r402+176];ld.shared.v2.u32 {%r685, %r686}, [%r402+184];ld.shared.v2.u32 {%r689, %r690}, [%r402+192];ld.shared.v2.u32 {%r693, %r694}, [%r402+200];ld.shared.v2.u32 {%r697, %r698}, [%r402+208];ld.shared.v2.u32 {%r701, %r702}, [%r402+216];ld.shared.v2.u32 {%r705, %r706}, [%r402+224];ld.shared.v2.u32 {%r709, %r710}, [%r402+232];ld.shared.v2.u32 {%r713, %r714}, [%r402+240];ld.shared.v2.u32 {%r717, %r718}, [%r402+248];ld.shared.v2.u32 {%r721, %r722}, [%r402+256];selp.b32 %r725, 0, %r388, %p29;selp.b32 %r726, 0, %r393, %p29;st.shared.v2.u32 [%r402+16], {%r725, %r726};add.s32 %r727, %r602, %r726;add.s32 %r728, %r601, %r725;st.shared.v2.u32 [%r402+24], {%r728, %r727};add.s32 %r729, %r606, %r727;add.s32 %r730, %r605, %r728;st.shared.v2.u32 [%r402+32], {%r730, %r729};add.s32 %r731, %r610, %r729;add.s32 %r732, %r609, %r730;st.shared.v2.u32 [%r402+40], {%r732, %r731};add.s32 %r733, %r614, %r731;add.s32 %r734, %r613, %r732;st.shared.v2.u32 [%r402+48], {%r734, %r733};add.s32 %r735, %r618, %r733;add.s32 %r736, %r617, %r734;st.shared.v2.u32 [%r402+56], {%r736, %r735};add.s32 %r737, %r622, %r735;add.s32 %r738, %r621, %r736;st.shared.v2.u32 [%r402+64], {%r738, %r737};add.s32 %r739, %r626, %r737;add.s32 %r740, %r625, %r738;st.shared.v2.u32 [%r402+72], {%r740, %r739};add.s32 %r741, %r630, %r739;add.s32 %r742, %r629, %r740;st.shared.v2.u32 [%r402+80], {%r742, %r741};add.s32 %r743, %r634, %r741;add.s32 %r744, %r633, %r742;st.shared.v2.u32 [%r402+88], {%r744, %r743};add.s32 %r745, %r638, %r743;add.s32 %r746, %r637, %r744;st.shared.v2.u32 [%r402+96], {%r746, %r745};add.s32 %r747, %r642, %r745;add.s32 %r748, %r641, %r746;st.shared.v2.u32 [%r402+104], {%r748, %r747};add.s32 %r749, %r646, %r747;add.s32 %r750, %r645, %r748;st.shared.v2.u32 [%r402+112], {%r750, %r749};add.s32 %r751, %r650, %r749;add.s32 %r752, %r649, %r750;st.shared.v2.u32 [%r402+120], {%r752, %r751};add.s32 %r753, %r654, %r751;add.s32 %r754, %r653, %r752;st.shared.v2.u32 [%r402+128], {%r754, %r753};add.s32 %r755, %r658, %r753;add.s32 %r756, %r657, %r754;st.shared.v2.u32 [%r402+136], {%r756, %r755};add.s32 %r757, %r662, %r755;add.s32 %r758, %r661, %r756;st.shared.v2.u32 [%r402+144], {%r758, %r757};add.s32 %r759, %r666, %r757;add.s32 %r760, %r665, %r758;st.shared.v2.u32 [%r402+152], {%r760, %r759};add.s32 %r761, %r670, %r759;add.s32 %r762, %r669, %r760;st.shared.v2.u32 [%r402+160], {%r762, %r761};add.s32 %r763, %r674, %r761;add.s32 %r764, %r673, %r762;st.shared.v2.u32 [%r402+168], {%r764, %r763};add.s32 %r765, %r678, %r763;add.s32 %r766, %r677, %r764;st.shared.v2.u32 [%r402+176], {%r766, %r765};add.s32 %r767, %r682, %r765;add.s32 %r768, %r681, %r766;st.shared.v2.u32 [%r402+184], {%r768, %r767};add.s32 %r769, %r686, %r767;add.s32 %r770, %r685, %r768;st.shared.v2.u32 [%r402+192], {%r770, %r769};add.s32 %r771, %r690, %r769;add.s32 %r772, %r689, %r770;st.shared.v2.u32 [%r402+200], {%r772, %r771};add.s32 %r773, %r694, %r771;add.s32 %r774, %r693, %r772;st.shared.v2.u32 [%r402+208], {%r774, %r773};add.s32 %r775, %r698, %r773;add.s32 %r776, %r697, %r774;st.shared.v2.u32 [%r402+216], {%r776, %r775};add.s32 %r777, %r702, %r775;add.s32 %r778, %r701, %r776;st.shared.v2.u32 [%r402+224], {%r778, %r777};add.s32 %r779, %r706, %r777;add.s32 %r780, %r705, %r778;st.shared.v2.u32 [%r402+232], {%r780, %r779};add.s32 %r781, %r710, %r779;add.s32 %r782, %r709, %r780;st.shared.v2.u32 [%r402+240], {%r782, %r781};add.s32 %r783, %r714, %r781;add.s32 %r784, %r713, %r782;st.shared.v2.u32 [%r402+248], {%r784, %r783};add.s32 %r785, %r718, %r783;add.s32 %r786, %r717, %r784;st.shared.v2.u32 [%r402+256], {%r786, %r785};add.s32 %r787, %r722, %r785;add.s32 %r788, %r721, %r786;st.shared.v2.u32 [%r402+264], {%r788, %r787};setp.ne.s32 %p30, %r90, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r378, %r383};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r789, %r790}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r75, %r790, %r864;ld.param.u32 %r791, [%rd1+308];setp.lt.s32 %p31, %r75, %r791;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r76, %r789, %r20;setp.eq.s32 %p32, %r866, -1;@%p32 bra BB10_32;add.s32 %r829, %r862, %r90;ld.shared.v2.u32 {%r794, %r795}, [%r4+16];add.s32 %r798, %r795, %r864;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r799, [%rd1+88];mul.lo.s32 %r800, %r799, %r12;cvt.s64.s32 %rd71, %r800;cvt.s64.s32 %rd72, %r798;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r866;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r801, [%rd1+72];mul.lo.s32 %r802, %r801, %r12;cvt.s64.s32 %rd78, %r802;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r803, %r794, %r20;st.global.u32 [%rd81], %r803;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r804, [%rd1+56];mul.lo.s32 %r805, %r804, %r12;cvt.s64.s32 %rd84, %r805;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r861, %r860};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r806, [%rd1+120];mul.lo.s32 %r807, %r806, %r831;cvt.s64.s32 %rd90, %r807;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r808, [%rd1+152];mul.lo.s32 %r809, %r808, %r831;cvt.s64.s32 %rd96, %r809;cvt.s64.s32 %rd97, %r829;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r810, [%rd1+104];mul.lo.s32 %r811, %r810, %r831;cvt.s64.s32 %rd104, %r811;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r812, 0;st.global.u32 [%rd107], %r812;BB10_32:bar.sync 0;mov.u32 %r828, %ntid.x;mov.u32 %r814, %nctaid.x;mad.lo.s32 %r862, %r814, %r828, %r862;setp.lt.s32 %p33, %r862, %r857;mov.u32 %r20, %r76;mov.u32 %r864, %r75;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r20, 0;mov.u32 %r22, %r21;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r302, [%rd3+48];or.b32 %r303, %r302, 2;st.global.u32 [%rd3+48], %r303;mov.u32 %r864, %r21;bra.uni BB10_34;BB10_29:ld.global.u32 %r792, [%rd3+48];or.b32 %r793, %r792, 1;st.global.u32 [%rd3+48], %r793;BB10_34:setp.ne.s32 %p35, %r90, 0;@%p35 bra BB10_36;mov.u32 %r816, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r817, [%rd1+40];mul.lo.s32 %r818, %r817, %r831;mul.wide.s32 %rd110, %r818, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r816, %r864};st.global.v2.u32 [%rd111+16], {%r816, %r864};BB10_36:ld.param.u32 %r820, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r819, %nctaid.y;add.s32 %r831, %r819, %r831;setp.lt.s32 %p36, %r831, %r820;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<63>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd62, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd62;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;cvt.u64.u32 %rd41, %r70;bfi.b64 %rd42, %rd40, %rd41, 32, 32;add.s64 %rd43, %rd27, 8;atom.global.min.u64 %rd44, [%rd43], %rd42;ld.param.u64 %rd45, [%rd1+272];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd47, %r58;add.s64 %rd48, %rd47, %rd6;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd46, %rd49;st.global.u32 [%rd50], %r56;ld.param.u64 %rd62, [%rd1+48];cvta.to.global.u64 %rd51, %rd62;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd52, %r59;add.s64 %rd53, %rd52, %rd6;shl.b64 %rd54, %rd53, 3;add.s64 %rd55, %rd51, %rd54;st.global.u32 [%rd55+4], %r71;ld.param.u64 %rd56, [%rd1+240];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd58, %r61;add.s64 %rd59, %rd58, %rd6;shl.b64 %rd60, %rd59, 2;add.s64 %rd61, %rd57, %rd60;st.global.u32 [%rd61], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<22>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd4;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r13, %ntid.x;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r4, %r14, %r13;cvta.to.global.u64 %rd5, %rd2;BB21_2:mul.lo.s32 %r15, %r3, %r31;mul.wide.s32 %rd6, %r15, 136;add.s64 %rd7, %rd5, %rd6;mov.u32 %r16, %ctaid.x;mov.u32 %r18, %tid.x;mad.lo.s32 %r32, %r13, %r16, %r18;ld.global.u32 %r6, [%rd7+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd3, [%rd1+240];ld.param.u32 %r7, [%rd1+248];BB21_4:mul.lo.s32 %r23, %r7, %r31;cvt.s64.s32 %rd8, %r23;cvt.s64.s32 %rd9, %r32;add.s64 %rd10, %rd8, %rd9;cvta.to.global.u64 %rd11, %rd3;shl.b64 %rd12, %rd10, 2;add.s64 %rd13, %rd11, %rd12;ld.global.u32 %r10, [%rd13];setp.gt.s32 %p3, %r10, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r24, [%rd1+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd16, %r25;shr.s32 %r26, %r10, 31;xor.b32 %r27, %r26, %r10;cvt.s64.s32 %rd17, %r27;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd20], {%r29, %r28};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}###~~~#}}}#|||#{{{#zzz#yyy#xxx#www#vvxvx#uuu#ttt#sss#;;;#rrr#qqq#ppp#ooo#nnn#mmm#lll#kkk#jjj#hhh###ggg#fff#eee#ddd#ccc#bbb @ ! ! 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N@  O  G0[)87\ )8G\K  )8 g Lw L'\  G   \l[\ 'H8)8G LW L  )8G\@\[@[ L L"i7 G '\GX\w X\ i6  @ gN gO WL W0[\?'O)8)8@7\'Ng0[ G\c6GKW @X|?h6)[D')\'|?h6G)[ )\G|h6)[)\ |h6D)[)\|?h6k[*[*\e[ \D<L?N'['\'['\'['\MW[W\W[W\W[W\'[?'\ i[i7G Gi7@G7X\i7@G\ G?  gL g cK@@PP?L g g mK W_ A'N'Oс[6'0[7H8 6 gN gO g0[&[[[&[ )[/[ g0[ \$GL%WL$G gm[@$  @ 6)8"6[  ["@(6 6 6 \ 6"GL?g\\#WL\$ gm[\ A 'N 'O@ 70[)8)8 '\G\K m[ @)8 L@ Lg\G   \ h67[7 \]c6M MMM1 DM M Mq M&\\ğ&g\W\& g\ W\&W\G\?!PP&!\\!g\W\!'P'c6&'P\&&\!G\&g\GPGc6- _'&GP\'\PW\&W\&P?c6'P&&\''\&g\!w\&Qc6'!Q\''\&G\'!w\P'P K[ K[W\]G\ w\]g\\]\7\]'\\]\ \] \ \ ] \ ]'LMWe[? @ [7 w\" G\ cK@ L $ G\ $ @g\  "]@?GL eK:@e75 @ gN gO@ 0[ )8G\ )8 G\GK@W$G  O  e7 k[" )8$ H L X L  \ ` N )8 \@ \ [ [@ N 0[)8 O )8w\ 0[ \ ?K )8 O  \ N  \ K 0[   \ )8 'N 'O\"@ K 0[gO   gN )8H\7 0[L@\ K  \)8\GK\W @7\G\ A Y\\\      ? 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B 'N 'O  G0[ m[J @ gN gO  G0[gL` L'L[&[[[  N O )[ @/[ N O @  N O70[ W0[ 70[' \  G0[GL\@)8 )8 )8WL\/ )8  7\@\K` 4NOg0[)8$7\\K 7\\" K g\!  'N'Ow 0[)8 ?7\w\K 7\\GKW   gNgO g0[k[ )8 ? 7\g\ GK   W  "'N 'O70[W[ W[W[W[&@W )[W/[70[G\L L!  \@ L\ ? WL@' N'O' 0[c[@ gL g cK@@PL Li7G Li7`G L\ @ XLi7 GL i7G  \ L  L L WL '\  L  G   GL  WL       /        @P?Lg mK |W@'N'O70[' mK"@NO WL 70[ \  'O _ )8 )8\" 'N 0[ 7\@ ' cK K'@\\  @gL cK@@PL@PPPcuda-decoder-kernels.cucuda-decoder-kernels-utils.h!is_representative || extra_cost == 0.0fmain_q_idx >= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@A9 9P a80A97+/9)ppxQpRDpS~pT pHU= pTV5 p$WpXpDTYp\Z)pT[ApH\p]ph\^px_ p<|`"pHaL$ptbS&pttc'pd%*pHe+plf-pTg}/ph1pHi2pHj4p0Tk!6p,ln7pDmt8p ne pW ppX ZM p\ 0p^8 9 `Q(`RZ`S`Tu `U <Vm LV (W,WYX% XYZ5[|\X]4 ^ _y! `!`#a%b%b!'c(dH)d+de,@!f.$gI0&h1)i3,jb5/k6h2l8@5m88@n2`9b y`;c `=d `?e M `Af Cg K@h+ 1]j+ pk s@l z@m   n& ]  o% u p q ? r( U"`s # t % @u '` v@ ) w s+ @x G-` y( / @ z0 0` @{ s2 @| +4} 5~ '7 S8`@ 6 @$ W@$ X@ \d@ ]^@_!@@(`e(@1dX,@,f,.@( g/@ h<`2424V6X<4@cuda-decoder-kernels.cuELF3\<@44@8@{.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5243.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4795.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4280.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3659$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3661.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtQPo`o~lo@xooopp,oJ1o7o@)=oCop?IoOo U-rR!.7S/ T 0 U 1V26"V"V@/3Wq45UXr}67Y8Z9[G!:M"\T#s$;%]'t%(<)^*=+_\,uH->.`.vT/?/"`.1@1a"3A3b5B5CL6c}7DM8d&9w9E;F;e;=G>f>x?H@gAyPCI%DhDzEJFiGKHjJLJk LMLlMN[Nm8OOOn PPE v u{ } z{ z >E v u{ } yz y =E v u{ } z{ z <E v u{ } yz y <z{(e3do0} ovlw z ; zw8 c/l{|r(j snr y :{n r {u |p}{ w   ~0yꅀ{ olj  z5OAssssuu||킃킃킃킃킁{}{y{{| z뀂  z(    ( 5{n r {u |p}{ w   ~0yꅀ{q$`m Z^j   z5OAssssuu|}}}}}|{}넃y녂{ {  z(~    ~( 0 ||}} y } 녀z} 0 /}   | y zy v   u   e  vxy u    u i  }bh    (0 -~   |ykjs  ~w u wzv x} tx  | p xqxxg ,|j n |  t 끂3Pj~  ~~  }} y } y } y }} y }5G~킃a \(y}}}}|  zy t z   (8 (|zv}uys| w rt}w  f0y c_(X%{ yizu 3Pj~ ~ ~ { } y } y }} y } y } {~킃킃킃킃킃킃킁  ux }v zz~}  %}  |zy j (} m | k(kkz kkꄀg}{    s  vxvy xzzk  v i  (( #~ u  v  o {njmpsv y x v( !{|#jxg wp} ww0 0z u  } zz  큁g  }t rslrlplj}|z}}d"{0R x x x x x x x n~z~ z y} {o y r z} z})Z0%]eqrzzrjvvwzx u}zx t x]" ]z||zzzos(x u}d q bzi{u w  Zzz 넁( ~z u   | 0 zK(5}w y0pss 0z ~~0(pss ~~ zz ~(5 ~z u %[ |{ q x0q u  v { (0u w { v(  z  |  냁~0yzkloi (| jnrvz jnrvz jnrv|@C>F;I8L5O2R/U,X)Z#a  y  oxz 큁v z ~|(  }  j z|((d s8  ns2As( P  !i ( ~              ꅀzzꅀz &~||||||||ts }|t|`&쁅쁅쁅쁅쁅쁅쁅쁂~쁂~|{  ~ ;Q m06|P3Kz)L x l  u w t#Qh o jl}v v 0v s (|{} Ux  v 8 }}q  (^"w v\8 ndx | 삁 낀  xqfi s tzz } wvvv z ||pp z(  |m r {|r}}  }  z3Pj~ ~ ~ { } y } y }} y } y } {~킃킃킃킃킃킃킁{|q   삁t)d |s&j  ux o xz } u  lvx }kgr$\  0( |z{ en z  w t{0_s_  _"d#k  {샅wk x yo x yzo yz~~ |~~nh|{X)Z(Q3W*샀}킀}}킀 z|q8}} }nzz  8 J|| r x}8 I||  {z} x}톁( ~y(zz |tt0nttz ttsz u   y{|} 0 lgs)er,R .Tm!N2P0R.a G p ~q w w| ;0.version 6.2.target sm_52.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<875>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r831, %ctaid.y;setp.ge.s32 %p2, %r831, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r90, %tid.x;shr.u32 %r91, %r90, 5;add.s32 %r92, %r91, %r90;shl.b32 %r93, %r92, 2;mov.u32 %r94, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r3, %r94, %r93;shl.b32 %r95, %r92, 3;mov.u32 %r96, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r4, %r96, %r95;mov.u32 %r327, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r11, [%rd1+24];mul.lo.s32 %r97, %r11, %r831;mul.wide.s32 %rd8, %r97, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r12, [%rd3];ld.global.v2.u32 {%r20, %r864}, [%rd3+16];setp.lt.s32 %p3, %r20, 1;@%p3 bra BB10_34;ld.global.u32 %r15, [%rd3+56];ld.global.u32 %r16, [%rd3+80];ld.global.u32 %r22, [%rd3+52];BB10_4:mov.u32 %r21, %r864;mov.u32 %r101, %ctaid.x;mov.u32 %r102, %ntid.x;mul.lo.s32 %r862, %r102, %r101;mov.u32 %r857, 0;setp.ge.s32 %p4, %r862, %r20;@%p4 bra BB10_22;mov.u32 %r825, %ntid.x;add.s32 %r26, %r21, -1;mul.lo.s32 %r847, %r825, %r101;mov.u32 %r845, 0;BB10_6:add.s32 %r34, %r847, %r90;mov.u32 %r852, 2147483647;setp.ge.s32 %p5, %r34, %r20;@%p5 bra BB10_14;setp.eq.s32 %p6, %r26, %r22;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r108, [%rd1+72];mul.lo.s32 %r109, %r108, %r12;cvt.s64.s32 %rd5, %r109;mov.u32 %r849, %r26;mov.u32 %r851, %r22;@%p6 bra BB10_11;BB10_8:add.s32 %r110, %r851, 1;setp.eq.s32 %p7, %r110, %r849;@%p7 bra BB10_10;sub.s32 %r111, %r849, %r851;shr.u32 %r112, %r111, 31;add.s32 %r113, %r111, %r112;shr.s32 %r114, %r113, 1;add.s32 %r115, %r114, %r851;cvt.s64.s32 %rd10, %r115;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r116, [%rd13];setp.gt.s32 %p8, %r116, %r34;add.s32 %r117, %r115, -1;selp.b32 %r851, %r851, %r115, %p8;selp.b32 %r849, %r117, %r849, %p8;setp.eq.s32 %p9, %r849, %r851;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r849;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r118, [%rd17];setp.gt.s32 %p10, %r118, %r34;selp.b32 %r851, %r851, %r849, %p10;BB10_11:cvt.s64.s32 %rd18, %r851;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r119, [%rd1+88];mul.lo.s32 %r120, %r119, %r12;cvt.s64.s32 %rd24, %r120;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r121, [%rd21];sub.s32 %r122, %r34, %r121;ld.global.u32 %r123, [%rd27];add.s32 %r853, %r123, %r122;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r853, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r854, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r124, [%rd1+56];mul.lo.s32 %r125, %r124, %r12;cvt.s64.s32 %rd37, %r125;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r126, [%rd40+4];setp.gt.s32 %p11, %r126, -1;xor.b32 %r127, %r126, 2147483647;selp.b32 %r128, %r126, %r127, %p11;mov.b32 %f1, %r128;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r129, %f3;setp.gt.s32 %p12, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r43, %r129, %r130, %p12;ld.global.u32 %r131, [%rd3+64];setp.ge.s32 %p13, %r43, %r131;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r133, [%rd44], %r43;BB10_13:setp.lt.s32 %p14, %r43, %r16;selp.b32 %r852, %r43, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r852, 2147483647;selp.u32 %r134, 1, 0, %p15;st.shared.u32 [%r3+16], %r134;bar.sync 0;setp.gt.u32 %p16, %r90, 31;@%p16 bra BB10_17;mov.u32 %r827, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r171, %r90, 33;shl.b32 %r172, %r171, 2;add.s32 %r174, %r827, %r172;ld.shared.u32 %r175, [%r174+20];ld.shared.u32 %r176, [%r174+16];add.s32 %r177, %r175, %r176;ld.shared.u32 %r178, [%r174+24];add.s32 %r179, %r177, %r178;ld.shared.u32 %r180, [%r174+28];add.s32 %r181, %r179, %r180;ld.shared.u32 %r182, [%r174+32];add.s32 %r183, %r181, %r182;ld.shared.u32 %r184, [%r174+36];add.s32 %r185, %r183, %r184;ld.shared.u32 %r186, [%r174+40];add.s32 %r187, %r185, %r186;ld.shared.u32 %r188, [%r174+44];add.s32 %r189, %r187, %r188;ld.shared.u32 %r190, [%r174+48];add.s32 %r191, %r189, %r190;ld.shared.u32 %r192, [%r174+52];add.s32 %r193, %r191, %r192;ld.shared.u32 %r194, [%r174+56];add.s32 %r195, %r193, %r194;ld.shared.u32 %r196, [%r174+60];add.s32 %r197, %r195, %r196;ld.shared.u32 %r198, [%r174+64];add.s32 %r199, %r197, %r198;ld.shared.u32 %r200, [%r174+68];add.s32 %r201, %r199, %r200;ld.shared.u32 %r202, [%r174+72];add.s32 %r203, %r201, %r202;ld.shared.u32 %r204, [%r174+76];add.s32 %r205, %r203, %r204;ld.shared.u32 %r206, [%r174+80];add.s32 %r207, %r205, %r206;ld.shared.u32 %r208, [%r174+84];add.s32 %r209, %r207, %r208;ld.shared.u32 %r210, [%r174+88];add.s32 %r211, %r209, %r210;ld.shared.u32 %r212, [%r174+92];add.s32 %r213, %r211, %r212;ld.shared.u32 %r214, [%r174+96];add.s32 %r215, %r213, %r214;ld.shared.u32 %r216, [%r174+100];add.s32 %r217, %r215, %r216;ld.shared.u32 %r218, [%r174+104];add.s32 %r219, %r217, %r218;ld.shared.u32 %r220, [%r174+108];add.s32 %r221, %r219, %r220;ld.shared.u32 %r222, [%r174+112];add.s32 %r223, %r221, %r222;ld.shared.u32 %r224, [%r174+116];add.s32 %r225, %r223, %r224;ld.shared.u32 %r226, [%r174+120];add.s32 %r227, %r225, %r226;ld.shared.u32 %r228, [%r174+124];add.s32 %r229, %r227, %r228;ld.shared.u32 %r230, [%r174+128];add.s32 %r231, %r229, %r230;ld.shared.u32 %r232, [%r174+132];add.s32 %r233, %r231, %r232;ld.shared.u32 %r234, [%r174+136];add.s32 %r235, %r233, %r234;ld.shared.u32 %r236, [%r174+140];add.s32 %r139, %r235, %r236;mov.u32 %r137, 1;mov.u32 %r162, 0;mov.u32 %r169, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r139, %r137, %r162, %r169; @p add.s32 r0, r0, %r139; mov.s32 %r135, r0;}mov.u32 %r143, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r135, %r143, %r162, %r169; @p add.s32 r0, r0, %r135; mov.s32 %r141, r0;}mov.u32 %r149, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r141, %r149, %r162, %r169; @p add.s32 r0, r0, %r141; mov.s32 %r147, r0;}mov.u32 %r155, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r147, %r155, %r162, %r169; @p add.s32 r0, r0, %r147; mov.s32 %r153, r0;}mov.u32 %r161, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r153, %r161, %r162, %r169; @p add.s32 r0, r0, %r153; mov.s32 %r159, r0;}mov.u32 %r168, 31;shfl.sync.idx.b32 %r165, %r159, %r168, %r168, %r169;sub.s32 %r237, %r159, %r139;ld.shared.u32 %r238, [%r174+16];add.s32 %r239, %r238, %r237;ld.shared.u32 %r240, [%r174+20];add.s32 %r241, %r240, %r239;ld.shared.u32 %r242, [%r174+24];add.s32 %r243, %r242, %r241;ld.shared.u32 %r244, [%r174+28];add.s32 %r245, %r244, %r243;ld.shared.u32 %r246, [%r174+32];add.s32 %r247, %r246, %r245;ld.shared.u32 %r248, [%r174+36];add.s32 %r249, %r248, %r247;ld.shared.u32 %r250, [%r174+40];add.s32 %r251, %r250, %r249;ld.shared.u32 %r252, [%r174+44];add.s32 %r253, %r252, %r251;ld.shared.u32 %r254, [%r174+48];add.s32 %r255, %r254, %r253;ld.shared.u32 %r256, [%r174+52];add.s32 %r257, %r256, %r255;ld.shared.u32 %r258, [%r174+56];add.s32 %r259, %r258, %r257;ld.shared.u32 %r260, [%r174+60];add.s32 %r261, %r260, %r259;ld.shared.u32 %r262, [%r174+64];add.s32 %r263, %r262, %r261;ld.shared.u32 %r264, [%r174+68];add.s32 %r265, %r264, %r263;ld.shared.u32 %r266, [%r174+72];add.s32 %r267, %r266, %r265;ld.shared.u32 %r268, [%r174+76];add.s32 %r269, %r268, %r267;ld.shared.u32 %r270, [%r174+80];add.s32 %r271, %r270, %r269;ld.shared.u32 %r272, [%r174+84];add.s32 %r273, %r272, %r271;ld.shared.u32 %r274, [%r174+88];add.s32 %r275, %r274, %r273;ld.shared.u32 %r276, [%r174+92];add.s32 %r277, %r276, %r275;ld.shared.u32 %r278, [%r174+96];add.s32 %r279, %r278, %r277;ld.shared.u32 %r280, [%r174+100];add.s32 %r281, %r280, %r279;ld.shared.u32 %r282, [%r174+104];add.s32 %r283, %r282, %r281;ld.shared.u32 %r284, [%r174+108];add.s32 %r285, %r284, %r283;ld.shared.u32 %r286, [%r174+112];add.s32 %r287, %r286, %r285;ld.shared.u32 %r288, [%r174+116];add.s32 %r289, %r288, %r287;ld.shared.u32 %r290, [%r174+120];add.s32 %r291, %r290, %r289;ld.shared.u32 %r292, [%r174+124];add.s32 %r293, %r292, %r291;ld.shared.u32 %r294, [%r174+128];add.s32 %r295, %r294, %r293;ld.shared.u32 %r296, [%r174+132];add.s32 %r297, %r296, %r295;ld.shared.u32 %r298, [%r174+136];add.s32 %r299, %r298, %r297;st.shared.u32 [%r174+16], %r237;st.shared.u32 [%r174+20], %r239;st.shared.u32 [%r174+24], %r241;st.shared.u32 [%r174+28], %r243;st.shared.u32 [%r174+32], %r245;st.shared.u32 [%r174+36], %r247;st.shared.u32 [%r174+40], %r249;st.shared.u32 [%r174+44], %r251;st.shared.u32 [%r174+48], %r253;st.shared.u32 [%r174+52], %r255;st.shared.u32 [%r174+56], %r257;st.shared.u32 [%r174+60], %r259;st.shared.u32 [%r174+64], %r261;st.shared.u32 [%r174+68], %r263;st.shared.u32 [%r174+72], %r265;st.shared.u32 [%r174+76], %r267;st.shared.u32 [%r174+80], %r269;st.shared.u32 [%r174+84], %r271;st.shared.u32 [%r174+88], %r273;st.shared.u32 [%r174+92], %r275;st.shared.u32 [%r174+96], %r277;st.shared.u32 [%r174+100], %r279;st.shared.u32 [%r174+104], %r281;st.shared.u32 [%r174+108], %r283;st.shared.u32 [%r174+112], %r285;st.shared.u32 [%r174+116], %r287;st.shared.u32 [%r174+120], %r289;st.shared.u32 [%r174+124], %r291;st.shared.u32 [%r174+128], %r293;st.shared.u32 [%r174+132], %r295;st.shared.u32 [%r174+136], %r297;st.shared.u32 [%r174+140], %r299;setp.ne.s32 %p17, %r90, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r165;BB10_17:bar.sync 0;ld.shared.u32 %r300, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r857, %r300, %r845;ld.param.u32 %r301, [%rd1+312];setp.lt.s32 %p18, %r857, %r301;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r852, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r304, [%r3+16];add.s32 %r305, %r304, %r845;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r306, [%rd1+136];mul.lo.s32 %r307, %r306, %r831;cvt.s64.s32 %rd47, %r307;cvt.s64.s32 %rd48, %r305;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r854, %r852};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r308, [%rd1+152];mul.lo.s32 %r309, %r308, %r831;cvt.s64.s32 %rd54, %r309;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r310, %r851, %r15;st.global.v2.u32 [%rd57], {%r310, %r853};BB10_21:bar.sync 0;mov.u32 %r826, %ntid.x;mov.u32 %r312, %nctaid.x;mad.lo.s32 %r847, %r312, %r826, %r847;setp.lt.s32 %p20, %r847, %r20;mov.u32 %r845, %r857;@%p20 bra BB10_6;BB10_22:mov.u32 %r20, 0;setp.ge.s32 %p21, %r862, %r857;mov.u32 %r864, %r21;@%p21 bra BB10_33;BB10_23:mov.u32 %r865, 0;add.s32 %r62, %r862, %r90;mov.u32 %r866, -1;setp.ge.s32 %p22, %r62, %r857;@%p22 bra BB10_25;add.s32 %r824, %r862, %r90;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r320, [%rd1+136];mul.lo.s32 %r321, %r320, %r831;cvt.s64.s32 %rd60, %r321;cvt.s64.s32 %rd61, %r824;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r861, %r860}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r861, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r324, [%rd68+4];ld.global.u32 %r866, [%rd68];sub.s32 %r865, %r324, %r866;BB10_25:setp.lt.u32 %p1, %r90, 32;setp.ne.s32 %p23, %r866, -1;selp.u32 %r326, 1, 0, %p23;st.shared.v2.u32 [%r4+16], {%r865, %r326};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r823, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r399, %r90, 33;shl.b32 %r400, %r399, 3;add.s32 %r402, %r823, %r400;ld.shared.v2.u32 {%r403, %r404}, [%r402+24];ld.shared.v2.u32 {%r407, %r408}, [%r402+16];add.s32 %r411, %r403, %r407;add.s32 %r412, %r404, %r408;ld.shared.v2.u32 {%r413, %r414}, [%r402+32];add.s32 %r417, %r411, %r413;add.s32 %r418, %r412, %r414;ld.shared.v2.u32 {%r419, %r420}, [%r402+40];add.s32 %r423, %r417, %r419;add.s32 %r424, %r418, %r420;ld.shared.v2.u32 {%r425, %r426}, [%r402+48];add.s32 %r429, %r423, %r425;add.s32 %r430, %r424, %r426;ld.shared.v2.u32 {%r431, %r432}, [%r402+56];add.s32 %r435, %r429, %r431;add.s32 %r436, %r430, %r432;ld.shared.v2.u32 {%r437, %r438}, [%r402+64];add.s32 %r441, %r435, %r437;add.s32 %r442, %r436, %r438;ld.shared.v2.u32 {%r443, %r444}, [%r402+72];add.s32 %r447, %r441, %r443;add.s32 %r448, %r442, %r444;ld.shared.v2.u32 {%r449, %r450}, [%r402+80];add.s32 %r453, %r447, %r449;add.s32 %r454, %r448, %r450;ld.shared.v2.u32 {%r455, %r456}, [%r402+88];add.s32 %r459, %r453, %r455;add.s32 %r460, %r454, %r456;ld.shared.v2.u32 {%r461, %r462}, [%r402+96];add.s32 %r465, %r459, %r461;add.s32 %r466, %r460, %r462;ld.shared.v2.u32 {%r467, %r468}, [%r402+104];add.s32 %r471, %r465, %r467;add.s32 %r472, %r466, %r468;ld.shared.v2.u32 {%r473, %r474}, [%r402+112];add.s32 %r477, %r471, %r473;add.s32 %r478, %r472, %r474;ld.shared.v2.u32 {%r479, %r480}, [%r402+120];add.s32 %r483, %r477, %r479;add.s32 %r484, %r478, %r480;ld.shared.v2.u32 {%r485, %r486}, [%r402+128];add.s32 %r489, %r483, %r485;add.s32 %r490, %r484, %r486;ld.shared.v2.u32 {%r491, %r492}, [%r402+136];add.s32 %r495, %r489, %r491;add.s32 %r496, %r490, %r492;ld.shared.v2.u32 {%r497, %r498}, [%r402+144];add.s32 %r501, %r495, %r497;add.s32 %r502, %r496, %r498;ld.shared.v2.u32 {%r503, %r504}, [%r402+152];add.s32 %r507, %r501, %r503;add.s32 %r508, %r502, %r504;ld.shared.v2.u32 {%r509, %r510}, [%r402+160];add.s32 %r513, %r507, %r509;add.s32 %r514, %r508, %r510;ld.shared.v2.u32 {%r515, %r516}, [%r402+168];add.s32 %r519, %r513, %r515;add.s32 %r520, %r514, %r516;ld.shared.v2.u32 {%r521, %r522}, [%r402+176];add.s32 %r525, %r519, %r521;add.s32 %r526, %r520, %r522;ld.shared.v2.u32 {%r527, %r528}, [%r402+184];add.s32 %r531, %r525, %r527;add.s32 %r532, %r526, %r528;ld.shared.v2.u32 {%r533, %r534}, [%r402+192];add.s32 %r537, %r531, %r533;add.s32 %r538, %r532, %r534;ld.shared.v2.u32 {%r539, %r540}, [%r402+200];add.s32 %r543, %r537, %r539;add.s32 %r544, %r538, %r540;ld.shared.v2.u32 {%r545, %r546}, [%r402+208];add.s32 %r549, %r543, %r545;add.s32 %r550, %r544, %r546;ld.shared.v2.u32 {%r551, %r552}, [%r402+216];add.s32 %r555, %r549, %r551;add.s32 %r556, %r550, %r552;ld.shared.v2.u32 {%r557, %r558}, [%r402+224];add.s32 %r561, %r555, %r557;add.s32 %r562, %r556, %r558;ld.shared.v2.u32 {%r563, %r564}, [%r402+232];add.s32 %r567, %r561, %r563;add.s32 %r568, %r562, %r564;ld.shared.v2.u32 {%r569, %r570}, [%r402+240];add.s32 %r573, %r567, %r569;add.s32 %r574, %r568, %r570;ld.shared.v2.u32 {%r575, %r576}, [%r402+248];add.s32 %r579, %r573, %r575;add.s32 %r580, %r574, %r576;ld.shared.v2.u32 {%r581, %r582}, [%r402+256];add.s32 %r585, %r579, %r581;add.s32 %r586, %r580, %r582;ld.shared.v2.u32 {%r587, %r588}, [%r402+264];add.s32 %r329, %r585, %r587;add.s32 %r334, %r586, %r588;mov.u32 %r395, 1;mov.u32 %r396, 0;mov.u32 %r397, -1;shfl.sync.up.b32 %r328, %r329, %r395, %r396, %r397;shfl.sync.up.b32 %r333, %r334, %r395, %r396, %r397;setp.lt.s32 %p24, %r327, 1;selp.b32 %r591, 0, %r328, %p24;add.s32 %r339, %r591, %r329;selp.b32 %r592, 0, %r333, %p24;add.s32 %r344, %r592, %r334;mov.u32 %r345, 2;shfl.sync.up.b32 %r338, %r339, %r345, %r396, %r397;shfl.sync.up.b32 %r343, %r344, %r345, %r396, %r397;setp.lt.s32 %p25, %r327, 2;selp.b32 %r593, 0, %r338, %p25;add.s32 %r349, %r593, %r339;selp.b32 %r594, 0, %r343, %p25;add.s32 %r354, %r594, %r344;mov.u32 %r355, 4;shfl.sync.up.b32 %r348, %r349, %r355, %r396, %r397;shfl.sync.up.b32 %r353, %r354, %r355, %r396, %r397;setp.lt.s32 %p26, %r327, 4;selp.b32 %r595, 0, %r348, %p26;add.s32 %r359, %r595, %r349;selp.b32 %r596, 0, %r353, %p26;add.s32 %r364, %r596, %r354;mov.u32 %r365, 8;shfl.sync.up.b32 %r358, %r359, %r365, %r396, %r397;shfl.sync.up.b32 %r363, %r364, %r365, %r396, %r397;setp.lt.s32 %p27, %r327, 8;selp.b32 %r597, 0, %r358, %p27;add.s32 %r369, %r597, %r359;selp.b32 %r598, 0, %r363, %p27;add.s32 %r374, %r598, %r364;mov.u32 %r375, 16;shfl.sync.up.b32 %r368, %r369, %r375, %r396, %r397;shfl.sync.up.b32 %r373, %r374, %r375, %r396, %r397;setp.lt.s32 %p28, %r327, 16;selp.b32 %r599, 0, %r368, %p28;add.s32 %r389, %r599, %r369;selp.b32 %r600, 0, %r373, %p28;add.s32 %r394, %r600, %r374;mov.u32 %r386, 31;shfl.sync.idx.b32 %r378, %r389, %r386, %r386, %r397;shfl.sync.idx.b32 %r383, %r394, %r386, %r386, %r397;shfl.sync.up.b32 %r388, %r389, %r395, %r396, %r397;shfl.sync.up.b32 %r393, %r394, %r395, %r396, %r397;setp.eq.s32 %p29, %r327, 0;ld.shared.v2.u32 {%r601, %r602}, [%r402+16];ld.shared.v2.u32 {%r605, %r606}, [%r402+24];ld.shared.v2.u32 {%r609, %r610}, [%r402+32];ld.shared.v2.u32 {%r613, %r614}, [%r402+40];ld.shared.v2.u32 {%r617, %r618}, [%r402+48];ld.shared.v2.u32 {%r621, %r622}, [%r402+56];ld.shared.v2.u32 {%r625, %r626}, [%r402+64];ld.shared.v2.u32 {%r629, %r630}, [%r402+72];ld.shared.v2.u32 {%r633, %r634}, [%r402+80];ld.shared.v2.u32 {%r637, %r638}, [%r402+88];ld.shared.v2.u32 {%r641, %r642}, [%r402+96];ld.shared.v2.u32 {%r645, %r646}, [%r402+104];ld.shared.v2.u32 {%r649, %r650}, [%r402+112];ld.shared.v2.u32 {%r653, %r654}, [%r402+120];ld.shared.v2.u32 {%r657, %r658}, [%r402+128];ld.shared.v2.u32 {%r661, %r662}, [%r402+136];ld.shared.v2.u32 {%r665, %r666}, [%r402+144];ld.shared.v2.u32 {%r669, %r670}, [%r402+152];ld.shared.v2.u32 {%r673, %r674}, [%r402+160];ld.shared.v2.u32 {%r677, %r678}, [%r402+168];ld.shared.v2.u32 {%r681, %r682}, [%r402+176];ld.shared.v2.u32 {%r685, %r686}, [%r402+184];ld.shared.v2.u32 {%r689, %r690}, [%r402+192];ld.shared.v2.u32 {%r693, %r694}, [%r402+200];ld.shared.v2.u32 {%r697, %r698}, [%r402+208];ld.shared.v2.u32 {%r701, %r702}, [%r402+216];ld.shared.v2.u32 {%r705, %r706}, [%r402+224];ld.shared.v2.u32 {%r709, %r710}, [%r402+232];ld.shared.v2.u32 {%r713, %r714}, [%r402+240];ld.shared.v2.u32 {%r717, %r718}, [%r402+248];ld.shared.v2.u32 {%r721, %r722}, [%r402+256];selp.b32 %r725, 0, %r388, %p29;selp.b32 %r726, 0, %r393, %p29;st.shared.v2.u32 [%r402+16], {%r725, %r726};add.s32 %r727, %r602, %r726;add.s32 %r728, %r601, %r725;st.shared.v2.u32 [%r402+24], {%r728, %r727};add.s32 %r729, %r606, %r727;add.s32 %r730, %r605, %r728;st.shared.v2.u32 [%r402+32], {%r730, %r729};add.s32 %r731, %r610, %r729;add.s32 %r732, %r609, %r730;st.shared.v2.u32 [%r402+40], {%r732, %r731};add.s32 %r733, %r614, %r731;add.s32 %r734, %r613, %r732;st.shared.v2.u32 [%r402+48], {%r734, %r733};add.s32 %r735, %r618, %r733;add.s32 %r736, %r617, %r734;st.shared.v2.u32 [%r402+56], {%r736, %r735};add.s32 %r737, %r622, %r735;add.s32 %r738, %r621, %r736;st.shared.v2.u32 [%r402+64], {%r738, %r737};add.s32 %r739, %r626, %r737;add.s32 %r740, %r625, %r738;st.shared.v2.u32 [%r402+72], {%r740, %r739};add.s32 %r741, %r630, %r739;add.s32 %r742, %r629, %r740;st.shared.v2.u32 [%r402+80], {%r742, %r741};add.s32 %r743, %r634, %r741;add.s32 %r744, %r633, %r742;st.shared.v2.u32 [%r402+88], {%r744, %r743};add.s32 %r745, %r638, %r743;add.s32 %r746, %r637, %r744;st.shared.v2.u32 [%r402+96], {%r746, %r745};add.s32 %r747, %r642, %r745;add.s32 %r748, %r641, %r746;st.shared.v2.u32 [%r402+104], {%r748, %r747};add.s32 %r749, %r646, %r747;add.s32 %r750, %r645, %r748;st.shared.v2.u32 [%r402+112], {%r750, %r749};add.s32 %r751, %r650, %r749;add.s32 %r752, %r649, %r750;st.shared.v2.u32 [%r402+120], {%r752, %r751};add.s32 %r753, %r654, %r751;add.s32 %r754, %r653, %r752;st.shared.v2.u32 [%r402+128], {%r754, %r753};add.s32 %r755, %r658, %r753;add.s32 %r756, %r657, %r754;st.shared.v2.u32 [%r402+136], {%r756, %r755};add.s32 %r757, %r662, %r755;add.s32 %r758, %r661, %r756;st.shared.v2.u32 [%r402+144], {%r758, %r757};add.s32 %r759, %r666, %r757;add.s32 %r760, %r665, %r758;st.shared.v2.u32 [%r402+152], {%r760, %r759};add.s32 %r761, %r670, %r759;add.s32 %r762, %r669, %r760;st.shared.v2.u32 [%r402+160], {%r762, %r761};add.s32 %r763, %r674, %r761;add.s32 %r764, %r673, %r762;st.shared.v2.u32 [%r402+168], {%r764, %r763};add.s32 %r765, %r678, %r763;add.s32 %r766, %r677, %r764;st.shared.v2.u32 [%r402+176], {%r766, %r765};add.s32 %r767, %r682, %r765;add.s32 %r768, %r681, %r766;st.shared.v2.u32 [%r402+184], {%r768, %r767};add.s32 %r769, %r686, %r767;add.s32 %r770, %r685, %r768;st.shared.v2.u32 [%r402+192], {%r770, %r769};add.s32 %r771, %r690, %r769;add.s32 %r772, %r689, %r770;st.shared.v2.u32 [%r402+200], {%r772, %r771};add.s32 %r773, %r694, %r771;add.s32 %r774, %r693, %r772;st.shared.v2.u32 [%r402+208], {%r774, %r773};add.s32 %r775, %r698, %r773;add.s32 %r776, %r697, %r774;st.shared.v2.u32 [%r402+216], {%r776, %r775};add.s32 %r777, %r702, %r775;add.s32 %r778, %r701, %r776;st.shared.v2.u32 [%r402+224], {%r778, %r777};add.s32 %r779, %r706, %r777;add.s32 %r780, %r705, %r778;st.shared.v2.u32 [%r402+232], {%r780, %r779};add.s32 %r781, %r710, %r779;add.s32 %r782, %r709, %r780;st.shared.v2.u32 [%r402+240], {%r782, %r781};add.s32 %r783, %r714, %r781;add.s32 %r784, %r713, %r782;st.shared.v2.u32 [%r402+248], {%r784, %r783};add.s32 %r785, %r718, %r783;add.s32 %r786, %r717, %r784;st.shared.v2.u32 [%r402+256], {%r786, %r785};add.s32 %r787, %r722, %r785;add.s32 %r788, %r721, %r786;st.shared.v2.u32 [%r402+264], {%r788, %r787};setp.ne.s32 %p30, %r90, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r378, %r383};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r789, %r790}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r75, %r790, %r864;ld.param.u32 %r791, [%rd1+308];setp.lt.s32 %p31, %r75, %r791;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r76, %r789, %r20;setp.eq.s32 %p32, %r866, -1;@%p32 bra BB10_32;add.s32 %r829, %r862, %r90;ld.shared.v2.u32 {%r794, %r795}, [%r4+16];add.s32 %r798, %r795, %r864;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r799, [%rd1+88];mul.lo.s32 %r800, %r799, %r12;cvt.s64.s32 %rd71, %r800;cvt.s64.s32 %rd72, %r798;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r866;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r801, [%rd1+72];mul.lo.s32 %r802, %r801, %r12;cvt.s64.s32 %rd78, %r802;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r803, %r794, %r20;st.global.u32 [%rd81], %r803;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r804, [%rd1+56];mul.lo.s32 %r805, %r804, %r12;cvt.s64.s32 %rd84, %r805;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r861, %r860};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r806, [%rd1+120];mul.lo.s32 %r807, %r806, %r831;cvt.s64.s32 %rd90, %r807;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r808, [%rd1+152];mul.lo.s32 %r809, %r808, %r831;cvt.s64.s32 %rd96, %r809;cvt.s64.s32 %rd97, %r829;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r810, [%rd1+104];mul.lo.s32 %r811, %r810, %r831;cvt.s64.s32 %rd104, %r811;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r812, 0;st.global.u32 [%rd107], %r812;BB10_32:bar.sync 0;mov.u32 %r828, %ntid.x;mov.u32 %r814, %nctaid.x;mad.lo.s32 %r862, %r814, %r828, %r862;setp.lt.s32 %p33, %r862, %r857;mov.u32 %r20, %r76;mov.u32 %r864, %r75;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r20, 0;mov.u32 %r22, %r21;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r302, [%rd3+48];or.b32 %r303, %r302, 2;st.global.u32 [%rd3+48], %r303;mov.u32 %r864, %r21;bra.uni BB10_34;BB10_29:ld.global.u32 %r792, [%rd3+48];or.b32 %r793, %r792, 1;st.global.u32 [%rd3+48], %r793;BB10_34:setp.ne.s32 %p35, %r90, 0;@%p35 bra BB10_36;mov.u32 %r816, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r817, [%rd1+40];mul.lo.s32 %r818, %r817, %r831;mul.wide.s32 %rd110, %r818, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r816, %r864};st.global.v2.u32 [%rd111+16], {%r816, %r864};BB10_36:ld.param.u32 %r820, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r819, %nctaid.y;add.s32 %r831, %r819, %r831;setp.lt.s32 %p36, %r831, %r820;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<63>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd62, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd62;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;cvt.u64.u32 %rd41, %r70;bfi.b64 %rd42, %rd40, %rd41, 32, 32;add.s64 %rd43, %rd27, 8;atom.global.min.u64 %rd44, [%rd43], %rd42;ld.param.u64 %rd45, [%rd1+272];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd47, %r58;add.s64 %rd48, %rd47, %rd6;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd46, %rd49;st.global.u32 [%rd50], %r56;ld.param.u64 %rd62, [%rd1+48];cvta.to.global.u64 %rd51, %rd62;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd52, %r59;add.s64 %rd53, %rd52, %rd6;shl.b64 %rd54, %rd53, 3;add.s64 %rd55, %rd51, %rd54;st.global.u32 [%rd55+4], %r71;ld.param.u64 %rd56, [%rd1+240];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd58, %r61;add.s64 %rd59, %rd58, %rd6;shl.b64 %rd60, %rd59, 2;add.s64 %rd61, %rd57, %rd60;st.global.u32 [%rd61], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<22>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd4;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r13, %ntid.x;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r4, %r14, %r13;cvta.to.global.u64 %rd5, %rd2;BB21_2:mul.lo.s32 %r15, %r3, %r31;mul.wide.s32 %rd6, %r15, 136;add.s64 %rd7, %rd5, %rd6;mov.u32 %r16, %ctaid.x;mov.u32 %r18, %tid.x;mad.lo.s32 %r32, %r13, %r16, %r18;ld.global.u32 %r6, [%rd7+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd3, [%rd1+240];ld.param.u32 %r7, [%rd1+248];BB21_4:mul.lo.s32 %r23, %r7, %r31;cvt.s64.s32 %rd8, %r23;cvt.s64.s32 %rd9, %r32;add.s64 %rd10, %rd8, %rd9;cvta.to.global.u64 %rd11, %rd3;shl.b64 %rd12, %rd10, 2;add.s64 %rd13, %rd11, %rd12;ld.global.u32 %r10, [%rd13];setp.gt.s32 %p3, %r10, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r24, [%rd1+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd16, %r25;shr.s32 %r26, %r10, 31;xor.b32 %r27, %r26, %r10;cvt.s64.s32 %rd17, %r27;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd20], {%r29, %r28};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}###~~~#}}}#|||#{{{#zzz#yyy#xxx#www#vvxvx#uuu#ttt#sss#;;;#rrr#qqq#ppp#ooo#nnn#mmm#lll#kkk#jjj#hhh###ggg#fff#eee#ddd#ccc#bbb @ ! ! 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'N"'O0[ '\m[ N" O W0[g\  )8)8 7\@ G\ K   WL7\@ 'N 'O 0[ )8c[ L   L @gLg cK@@?Lgg mK IğgNgOW0['[ '['['[F@'/[')[W0[g\ GL WL      G @  N   Ow0[gL&'['['[`')[74i7b i7\G G X\ i7&@'['/[0[ \L G >g cK  L G L\   ~ \     G G  @@?L g g mK DW @  gN* gO W0[&G[G[G[FG[G/[G)[@W0[g \GL  WL G     " N   O  0[  G[G[G[&G[G )[G/[ 0[7 \L G LL\ G4i7i77\G G7X\74@i7\\ G4 2@\ '\  G  >  ! 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WL@'N'O'0[Gc[@gLg cK@@P?Lgg mK |W@'N'O'0["gNggO70['[ '['['[&@')['/[W0[G \GLWL G wm["N O @ NO"7 0[W0[\)8)8)8O\\BK )8G\)8 W\G\K'G 'c6@D@N OG0[)8\G\BKG  @4i7G 7\i7G7 X\[ i7     n  \@ @g Ng O0[)8\\BG KW   @NO0[@NO)8\w0[g\@ K)8 \\K`\  @  N  O"@0[ 'N 'O  )8 0[\'4 \ \" )8 \ K    \ )8 @ \ K\  4  \\A  \  Lg[][  @    Wp  \@  @WL' N'O' 0[wc[@gLg cK@@PPP?Lgg mK |W@'N'O70["gN9gO70[G[ G[G[G[&@G)[G/[W0[g \GLWL  G m[" N O"@ ' N' ON@@O W0[ g0[  0[\ )8   )8 )8 'N'O G0[ )8")8 '\)8 '[g\K`)8)8  7\G\Kg\  '\ g\"K  '\@ g\w\G\@  K   4 i7)8N OxG\WL X 0[)8' N H\'O)8 G 0[X\K@c['G\ H\ @gLg cK@@?Lgg mK W_ A'N'O'с[670[7H8 6gNgO'0[&7[7[7[&7[7)[7/[ W0[G\GLWLG )8[)8'm[r@\\\G\B'm[N"OH0[)8)88\X\"K!\ \   h6 ] c6MM MM M  MMM_\\ \  7\\7\GP \\ P? _P\\P \\"'P?'c6'P#"\\#7\\ #GPGc6GP" \ \"#'\ \"Pc6- _ P\\P#"\ 7\#Q?c6Q\\#\\"Pk[P "K[K[\]\%W\T1|$G\1| >W\]G\ $]\] \ \] \ \ ] \\ ] ^+\]]DM1M'c[ $_W\ 7\W\7\N"OG0[)8)87\W\"K\? )87[)87k[ @@gNgO70[ W[ W[ W[W[&@ W)[W/[0[ !w\ G\GLBg[WLY7@  g\   @    g ? \@  @WL' N'O7 0['c[@gLg cK}@@PPPP?Lgg mKX'L tW"@'k[6Gс[`@'N'O 67H8G0[gNgOG0[&7[7[7[F7[7/[7)[@W0[g\GLWLG Wm[@@gN gOG0[7[&7[7[7[&@7)[7/[W0[ ?g\GL\WLw\ Wm[,\ A)@NO@G0[)8)8 '\7\K   N O0[4BN O)8 )8 G\ 7\ )80[7\B K '  )8 '\\ K\  G  '4k[ U[ G\?  @gm[)8j Lz L J  jN jO0[)8 j\ i6z\"? JK Zj\`\ \z\!Z\ @?\@h6]5c6M MMM1!D M MMq M \!\ğ \! \ \!\ W\!G\?!P P"!\! \"'\!\#"'P'c6 !'P##\ \#"7\ !\#GPGc6- _ GP$\\P$#G\ W\!$P?c6P!!\\!$\ G\"!Qc6 Q#"\"\#!7\" '\#P""PK["K[W\]G\ w\]g\\]\\]\ \] \ \ ] \\ ]\]DMWc[ @'N'O0[ @ )8' N' O@)8\0[@\ K'\)8\" K \    )8@NOw[@0[)8)87\)87\ KW\G\  WL' N'O' 0[Wc[x@gLg cK`@@?Lgg mK |W@'N'O70["gNgO'0[7[ 7[7[7[&@7)[7/[W0[G\GLWL G i7m[G'\ @'N'O70[&W[W[W[&W[W)[W/[ 70[G\L?L \"NO70[)8)8 g\'\K  e[ @@ i7 G \Y\i7Gg\\\ ? m[ *' LGP:' L@t :\ G\&[6[w0[ \[[  [([ w\[[ [([W \:' L\[t[W0[*' L7f[GP\7f[ O\ ?N7\ ' GL 7\' L 0[\ \ ? ' L )8WE[)8 W\ G\" GH8 G@6 L\ L Ge[ e7 g[g[W0[\G[ G([G[G [tW \:W\&G[G([G[G [\\@g[g[0[Gf[a\Gf[` m[a\ ' cK\GE[@ L  L\  k[    w  \@ "g N@g O gG0[N @O)8g\ g0[G\G K@O )8W  g\N '\ K0[ ")8g\k[ @w\KG\ g\\  \ G >  i7GY\@i7G WL' N'O 0[c[@gLg cKh@@PP?Lgg mKD *\"@Ё[G6)8'H8G 6gN @> gO  0[ [[f [ [ )[ /[0[ \@GLWL   e[i6 @$ hN hO 0[  )8  \ \ HK@ X G \  h6 \?GL LLL1 DL GL Lq_L\G\'| 7\W\P?@\'PP\|GP`\P?p\Q\\\\\G\7\\'\\\\ \G\ \ \?\ L \ 7 mK 7 cK   i7 G X\  Y X\ i7@ i7 G \@ G  G?  gLg cK@@PP?L$g$g mK  W_ A  " W(8  G6'N'O @  G 6 'H8 70[ )8# 7' @"'H8$gN$gO-$70[&G[G[G[D<G[G)[1\G/[W0[g \@GLWL 0@8)8 @ 6B66["@G [(6 6  6 \GL g\WLG_7\ @ @66 6[G ["(6 6 6 \GLg\WLG7\   4?k[@7 gK@@ m[D\@ \G    G\ m[ $6@0@8)8@$'N$'O$g0[G\ )8G\KGW\ @@NO W0[G\)8@G\KGW\  i7GwY\[@'[@?@` g\@$6@ k6\G!8@\3 6\W\@\'(8\w@\\\\ W[\"7e6?\JZ GL  L L L1 D L GL L ? L L \\\\|PA\%'P?%Q\&%GP&%a\|'&P'&q\!'Q?!'\!@\!\t"'e6@N W\G\W\D%G\&W\AN"Ge6"We6%&W\"ge6&G\%W\G\"we6%W\ G\"e[!K[ %W\!%i\"e[   k[w\ H8B\!I\G@? e[BL!!J\\! \\ G\G\ \\ \\ \w\ G\\ \ \ \c6 \ $6Jw\DX H@ $6 \  `\  XD8 H'H88We[(H8  \ `\  k[WL (H8 \ D L`LDL@' N'Ow 0[c[W\D\!?{@ i6{#e[!\#e6\#'e6 \$gN@DL$gO$70[)8\ 7\B#GKW? $gN@D$gO'H8DL$70[)8)8"7\'\GK W A$gN$gO"'H8DL$70[ )8)87\@'\GKW Gb6 )g6pPB@'H8)8D8 @$gN$gOP$70[)8?GLWL'\7@L\'@L8 L\qD%L8L!@LOc7 DLLL D@LLL DL@LL GL'@'_ %A!@\_&8'\ g\@w\ \@@@g6@D$gNL$gO@L$70[V@L'H8L)8LGLD@LW LLL\GLG\W L CW\@ \ \@ P ?\ c6 @$gN$gO @$70[)8GLD<WL@LwG\@Lc6QDLg\L#\G >ċ@@$$gL$g cK@H8G(8! H8(8h6 h6\7\@000@\8X\@H8 H8J6 J60@\@0 03@\@@0\2@\  H@0\2@\  H'@m[m[2\2\@Dw \GP?g \0Y\wY@W Y YW Y YH8(8G\G\h6h\h \ @g6g\ KK@i[@m7[[\ @ Y e6 Y@wX \@GH\ D6g(\GG\k[k[G\GG\G\@ @PPPP?Lgg mK @gNgO70[[ [[[&@/[)[G0[g\GLWL @ NO w0[ [[f [ [ )[/[0[ \L L  gLg cK? @@PP?Lgg mK - W? _1\ 'N 'O '0[gN @tgO  70[ G[ G[f G[ G[ G)[ G/[ 70[' \@GL WL   ` 'N 'O  70[W[W[fW[W[W)[W/[70[G\@LL   G 0@8'4kK4 @'\i7 G  \ XL m[i7G-@  "@ 6 )8 6 @ W[ w [  (6? 6  6' \  6 GLw\ @ WL[K[K \7\\\ @ N@ O g0[)8k[)87\g\ K  G m[@PO?G0\G\Gd[   PN GG\w\w0[ ?)8g!|w\g\)8G\K7\? WL@' N'OG 0[c[@@" N O @ g0[)8k[)8G\G\@ K  )8@ L L   Ki7GG\GX\i7Gm[HP"NW0\O?4W\Gd[@D 0WG\W\ | 0[)8g | @W\w\)8 G\KG\    @WL' N'Og 0[c[@@gLg cK@@?Lgg mK - W? _1'\ 'N 'O0@8 W0["gNFgO70[G[ G[G[G[&@G)[G/[W0[g \ GL WL   'N'O70[G[&G[G[G[ @G)[G/[W0[g \L L  G  m[+@ 6B@)86w["@ [(66  6g\ 6 L7\\L @\  N@O70[)8k[)8\G\  BK )8 L L i7GgX\ Ki7G 7g[\ '\7\7\`GG\W k[7Y['\7\ @WL@'N'O'0[c[@@WL'O'Nk[W0[  c[@@gLg cK@@P|Lg|g mK @['H8 8"@gNgO 70[G[G[fG[G[G)[G/[W0[g \ GLWL'\  7\  U\ Uc6@7\    G !GTT  |(\DW@'N'OW0[  m[TT @\ L7\m[$'e['N" 'O 0['\ )8@G\ge[ @ g\\g[)8\)8  g\ \ K  wi[g\  e[ @\ge[@)8  g\ \ K  wi[g\@ \E )8)gN gO \ K0[  )8g\ \@ GK W \@  N  O0[ )8 g\ \K   w\  `\G 'H8@)8 L  L ' L7 L` '4i7G4X\i7Gm[Pd7|<|w!\ '|_!\ G| !\1 | d[? !\ | !\> Dwc[L[K4\ AY4h624G[ 22'H82\A4G64G 6 D)GL/L*L ,L+L-GLQ 'LL!L_*\&GL+g\%L'g\$LG?!g \#L%\ "GL LLQ LGLL? #g\L \Lg\GLG?g\L \ LLGLQ  L LL?  \ GL \L \(LG_ \ \( \|.(P.(\0.'P?0.\10GP10\|31P310\ 3QX 3\ (\ 1|>(/\ \))\(G\**\)\,,\*\.+\,\--\.G\1'\-\\1\!!G\\&&\!G\%%g\&\$$W\%\0#G\$\""\0G\ '\"\? \ \\ \\G\'^(\\\ (\\\_G\G\g\ \W\\^ \\\ G\ \\^ \ \4k[ \\ g\ G\\ \ ^\  \/? L(W\( cK!@eK'N@X GD'O2L?0[gOW\ )8 )8 w\"gN \ K 0[ W\ )8 W\GK`\ W! \ WL'N'OW0[c[?\:@\ Dm[@ D E!  '\ @m[)N)O90[)8)8  \)\ K@  \  U)8 L@  L ?I \ [   8\k7\8 b6 ] (T  6GT  6T MMM M MT TGT M TMT TTM Mg\U' G\"MW\|\ M W\ M \U\#U MU \$M\#&MMU )\*M\ ,MM.M (\0M\XM$G\2 M_*G\4 M.G\=6 M\8 M \M2G\Q: M\< M?6G\> M\ ğ\M:G\\>G\G \6 ?M)g\\\Eg\_Dg\G\w\ g\g\!g\%g\+g\/g\3g\7g\;g\?g\g\g \g\g \W\Pc6\g\P\g\?'P'c6\?g\'P\ g\GPGc6|\g\GPD\g\Pc6\g\P\g\?Qc6\?)g\Q\|G\)PP K[ K[w\@G\] W\@>\]\@^g\]w\@~G\]W\@ \] \@ g\] w\@'\]7\@\]\D G\GD !W\!D "\ D #\#D $\"D %\%D&\$GD>'\ ]*g\ ]+w\] ,G\]-W\].'\]_/7\] 0\] 1\ 2\  ] 3\4\  ]5\6g\? ]7w\8G\ ]9W\:'\_ ] ;7\<\? ]=\>g\ ]?w\ ]'?%G\$W\#'\ ]"7\ ]_ w\!g\7\]'\1|@6(w\(Dg\&GD W\D G\]D_?D]\GD\D' 6W\DG\ DD)1|??]]k[ >]]| DM\ cK;@e70\gOD" gOGD 'Ng[ 81MgNw0[ @)8\)8 gN\ GK" 0[\'O W )8 g\)8 0[ w\ GK )8 N W \O \ K 0[ @  )8 g\ w\ K\`\ \  \   !   N"@O0[N O)8\ 0[ G\ K   \)8 @\ K\  \ ? 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N@  O  G0[)87\ )8G\K  )8 g Lw L'\  G   \l[\ 'H8)8G LW L  )8G\@\[@[ L L"i7 G '\GX\w X\ i6  @ gN gO WL W0[\?'O)8)8@7\'Ng0[ G\c6GKW @X|?h6)[D')\'|?h6G)[ )\G|h6)[)\ |h6D)[)\|?h6k[*[*\e[ \D<L?N'['\'['\'['\MW[W\W[W\W[W\'[?'\ i[i7G Gi7@G7X\i7@G\ G?  gL g cK@@PP?L g g mK W_ A'N'Oс[6'0[7H8 6 gN gO g0[&[[[&[ )[/[ g0[ \$GL%WL$G gm[@$  @ 6)8"6[  ["@(6 6 6 \ 6"GL?g\\#WL\$ gm[\ A 'N 'O@ 70[)8)8 '\G\K m[ @)8 L@ Lg\G   \ h67[7 \]c6M MMM1 DM M Mq M&\\ğ&g\W\& g\ W\&W\G\?!PP&!\\!g\W\!'P'c6&'P\&&\!G\&g\GPGc6- _'&GP\'\PW\&W\&P?c6'P&&\''\&g\!w\&Qc6'!Q\''\&G\'!w\P'P K[ K[W\]G\ w\]g\\]\7\]'\\]\ \] \ \ ] \ ]'LMWe[? @ [7 w\" G\ cK@ L $ G\ $ @g\  "]@?GL eK:@e75 @ gN gO@ 0[ )8G\ )8 G\GK@W$G  O  e7 k[" )8$ H L X L  \ ` N )8 \@ \ [ [@ N 0[)8 O )8w\ 0[ \ ?K )8 O  \ N  \ K 0[   \ )8 'N 'O\"@ K 0[gO   gN )8H\7 0[L@\ K  \)8\GK\W @7\G\ A Y\\\      ? WL@'N'OG0[ gc[h@ gL  g cKP@@PPXL*g L)W A**)'N)'O))'0[)m[ &\%\1?$\(7Ё["_ 6((GH8'  6\og mK"@hNhO h0[ x[x[fx[x[ x)[x/[h0[ \  HL\ \  XL  \  H h6\\\(^?c6 D 'N'N'N 'N'N 'NQ ?'N'N+\؟+ \,\+\G +G\+'\, \+ \, \+ \,W\,7\+g\+P, \-Pt, \,w\,P _++\.P--\+\\-+'P' ,,\..\'c6`,\\.,'P--\+\-'Pt..\,\.'P--\+\-GP..\Gc6,\.GP--\\=-+GP..\\.,GP--\+\= -P..\c6_,\.P--\6t,P+\-P ..\,,\/\'H--\\,+Q\-/Qc6Q?QQ,,\ ğ--\.+\\G\-/\/.P+w\-P,g\4D+Pk[,P  K[K[/K['K[W\'^w\-1|g\,1|G\.1|##\+1|""\ '^!!\ \ >7\ '^'\\\\ '^\\\w\'^ g\W\G\ >7\'^'\ \ \ \  '^ \ \ >'\'^!^D!Nm["@ gN gO "@N 0[ O& [0[ [& [ [ /[& )[(N[  0[[[  \[ )[" /[ GL0[ \ WLL L G\g\@ W\ G \@  \  ?G WL @)'N'O )0[)c[$G\%W\&g\l@@PPPP?Lgg mK @gNgO70[G[ G[G[G[&@G)[G/[W0[g \GLWL    4'N'O 0[ [[f[ [ )[ /[0[ \L L    gL! G   g cK i7   > G G @@PPPP?Lgg mK AgNgOğ70[G[ G[G[G[&@G)[G/[W0[g \GL WL  'N'OG0[W[&W[W[W[ @W)[W/[G0[g\ L L        gLG L!i7 G\Gg cKG  7\W\  @@PPXL'L g"@ N O '0[W[W[&?W[W[ g mK&W)[W/[70[G\LL G W? B 'N 'O  G0[ m[J @ gN gO  G0[gL` L'L[&[[[  N O )[ @/[ N O @  N O70[ W0[ 70[' \  G0[GL\@)8 )8 )8WL\/ )8  7\@\K` 4NOg0[)8$7\\K 7\\" K g\!  'N'Ow 0[)8 ?7\w\K 7\\GKW   gNgO g0[k[ )8 ? 7\g\ GK   W  "'N 'O70[W[ W[W[W[&@W )[W/[70[G\L L!  \@ L\ ? WL@' N'O' 0[c[@ gL g cK@@PL Li7G Li7`G L\ @ XLi7 GL i7G  \ L  L L WL '\  L  G   GL  WL       /        @P?Lg mK |W@'N'O70[' mK"@NO WL 70[ \  'O _ )8 )8\" 'N 0[ 7\@ ' cK K'@\\  @gL cK@@PL@PPPcuda-decoder-kernels.cucuda-decoder-kernels-utils.h!is_representative || extra_cost == 0.0fmain_q_idx >= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@A9 9P a80A97+/9)ppxQpRDpS~pT pHU= pTV5 p$WpXpDTYp\Z)pT[ApH\p]ph\^px_ p<|`"pHaL$ptbS&pttc'pd%*pHe+plf-pTg}/ph1pHi2pHj4p0Tk!6p,ln7pDmt8p ne pW ppX ZM p\ 0p^8 9 `Q(`RZ`S`Tu `U <Vm LV (W,WYX% XYZ5[|\X]4 ^ _y! `!`#a%b%b!'c(dH)d+de,@!f.$gI0&h1)i3,jb5/k6h2l8@5m88@n2`9b y`;c `=d `?e M `Af Cg K@h+ 1]j+ pk s@l z@m   n& ]  o% u p q ? r( U"`s # t % @u '` v@ ) w s+ @x G-` y( / @ z0 0` @{ s2 @| +4} 5~ '7 S8`@ 6 @$ W@$ X@ \d@ ]^@_!@@(`e(@1dX,@,f,.@( g/@ h<`2424V6XhD<@cuda-decoder-kernels.cuELF3\C%<<@8@{.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5243.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4795.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4280.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3659$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3661.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtQPo`o~lo@xooopp,oJ1o7o@)=oCop?IoOo U-rR!.7S/ T 0 U 1V26"V"VXh/3Wq45UXr}67Y8Z9[G!:M"\T#s$;%]'t%(<)^*=+_\,uH->.`.vT/?/"`P.1@1a"3A3b5B5CL6c}7DM8d&9w9E;F;e;=G>f>x?H@gAyPCI%DhDzEJFiGKHjJLJk LMLlMN[Nm8OOOn PPE  v u{ } z{ z8 >E  v u{ } yz y8 =E  v u{ } z{ z8 <E  v u{ } yz y8 < {0e3do8 ovlw {8 ;  zw0 c/l|r}0j sn|r y :{ n r {u p} w  { ~8~yz{ olj  z5OAssssuu|}}}}} |{}넃y녂{ {  z0~    ~0 5{ n r {u p} w  { ~8~yz{q$`m Z^j   z5OAssssuu|}}}}} |킀{y{| z{  z(    ( 0  ||} y } |{z{} ( /}     yz zy v   u   e  vxy u    u i ~ }bh  }  0 -~    ykjs  ~w u wzv x} tx  | p xqxxg8 ,| j n |  }t {3Pj ~ ~ { } y }} y } y } y }}5G}a \(y|}}}} | } zy t z   0 (| zv}uyzs| w rt}w  f(y ~c_(X%뀀 yizu {3Pj~  ~~  }} y } y } y }} y } {}}}}}}} {  ux 큁v zꅂ{}  %}   zy j 0} m | k(kk kkzg}    s z vxvy xzzk  v i  ( #~  }u | v  o {njmpsv y  x v0 !{ |#jxg wp}} ww8 8z u   zz  }g  }t rslrlplj}||ꂀ}}}d"{0R x x x x x x x n~z08~8 | z y00} {o  y  zr z z})Z(%]eqrzz{rjvvwzx u}zx t x]" ]ꄂ|{zzos(x u~d q bziu w  Z z { ~  u   { |( zK05}w y(pss z8zz ~(0pss  zz ~~058 ~  u %[ { q {x(q u  v {| ((u w { v |(  z  |  {~8yzkloi 0| jnrvz jnrvz jnrv|@C>F;I8L5O2R/U,X)zZ#a   y  oxz }v z ~|0  }  }j z|((d s8  ns2As( P  !i ( ~              zꅀzzꅀ &쁅쁅쁅쁅쁅쁅쁅ts }t|`&|||||||||}~{  ~ }0~;Q m(6|P3K)L~ x l  u w t#Qh o jl}v v (v s 0|}0 U x|  v 0 } }q{z  |(^"w v}\0 ndx  | {  xqfi s tzz } wvvv z |쀃pp z  | m r {|r}  }  z3Pj~  ~~  }} y } y } y }} y } {}}}}}}} |{{|q   |t)d s&j  ux o xz  u  lvx }kgr$\  ( |z{ e{n z  |w t(_s_  _"d#k  {|wk x yzo x yzo yꅁ~{ ||~}~nh쁆X)Z(Q3W*|}}킀}}  |z|q0|}} nzz } ( J | r x}( I |  {z x} ~y(zz |tt(nttz t~tsz u | | y|} ( lgs)er,R .Tm!N2P0R.a G  p ~q w w삁 0;.version 6.2.target sm_60.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<875>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r831, %ctaid.y;setp.ge.s32 %p2, %r831, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r90, %tid.x;shr.u32 %r91, %r90, 5;add.s32 %r92, %r91, %r90;shl.b32 %r93, %r92, 2;mov.u32 %r94, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r3, %r94, %r93;shl.b32 %r95, %r92, 3;mov.u32 %r96, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r4, %r96, %r95;mov.u32 %r327, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r11, [%rd1+24];mul.lo.s32 %r97, %r11, %r831;mul.wide.s32 %rd8, %r97, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r12, [%rd3];ld.global.v2.u32 {%r20, %r864}, [%rd3+16];setp.lt.s32 %p3, %r20, 1;@%p3 bra BB10_34;ld.global.u32 %r15, [%rd3+56];ld.global.u32 %r16, [%rd3+80];ld.global.u32 %r22, [%rd3+52];BB10_4:mov.u32 %r21, %r864;mov.u32 %r101, %ctaid.x;mov.u32 %r102, %ntid.x;mul.lo.s32 %r862, %r102, %r101;mov.u32 %r857, 0;setp.ge.s32 %p4, %r862, %r20;@%p4 bra BB10_22;mov.u32 %r825, %ntid.x;add.s32 %r26, %r21, -1;mul.lo.s32 %r847, %r825, %r101;mov.u32 %r845, 0;BB10_6:add.s32 %r34, %r847, %r90;mov.u32 %r852, 2147483647;setp.ge.s32 %p5, %r34, %r20;@%p5 bra BB10_14;setp.eq.s32 %p6, %r26, %r22;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r108, [%rd1+72];mul.lo.s32 %r109, %r108, %r12;cvt.s64.s32 %rd5, %r109;mov.u32 %r849, %r26;mov.u32 %r851, %r22;@%p6 bra BB10_11;BB10_8:add.s32 %r110, %r851, 1;setp.eq.s32 %p7, %r110, %r849;@%p7 bra BB10_10;sub.s32 %r111, %r849, %r851;shr.u32 %r112, %r111, 31;add.s32 %r113, %r111, %r112;shr.s32 %r114, %r113, 1;add.s32 %r115, %r114, %r851;cvt.s64.s32 %rd10, %r115;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r116, [%rd13];setp.gt.s32 %p8, %r116, %r34;add.s32 %r117, %r115, -1;selp.b32 %r851, %r851, %r115, %p8;selp.b32 %r849, %r117, %r849, %p8;setp.eq.s32 %p9, %r849, %r851;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r849;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r118, [%rd17];setp.gt.s32 %p10, %r118, %r34;selp.b32 %r851, %r851, %r849, %p10;BB10_11:cvt.s64.s32 %rd18, %r851;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r119, [%rd1+88];mul.lo.s32 %r120, %r119, %r12;cvt.s64.s32 %rd24, %r120;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r121, [%rd21];sub.s32 %r122, %r34, %r121;ld.global.u32 %r123, [%rd27];add.s32 %r853, %r123, %r122;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r853, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r854, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r124, [%rd1+56];mul.lo.s32 %r125, %r124, %r12;cvt.s64.s32 %rd37, %r125;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r126, [%rd40+4];setp.gt.s32 %p11, %r126, -1;xor.b32 %r127, %r126, 2147483647;selp.b32 %r128, %r126, %r127, %p11;mov.b32 %f1, %r128;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r129, %f3;setp.gt.s32 %p12, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r43, %r129, %r130, %p12;ld.global.u32 %r131, [%rd3+64];setp.ge.s32 %p13, %r43, %r131;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r133, [%rd44], %r43;BB10_13:setp.lt.s32 %p14, %r43, %r16;selp.b32 %r852, %r43, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r852, 2147483647;selp.u32 %r134, 1, 0, %p15;st.shared.u32 [%r3+16], %r134;bar.sync 0;setp.gt.u32 %p16, %r90, 31;@%p16 bra BB10_17;mov.u32 %r827, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r171, %r90, 33;shl.b32 %r172, %r171, 2;add.s32 %r174, %r827, %r172;ld.shared.u32 %r175, [%r174+20];ld.shared.u32 %r176, [%r174+16];add.s32 %r177, %r175, %r176;ld.shared.u32 %r178, [%r174+24];add.s32 %r179, %r177, %r178;ld.shared.u32 %r180, [%r174+28];add.s32 %r181, %r179, %r180;ld.shared.u32 %r182, [%r174+32];add.s32 %r183, %r181, %r182;ld.shared.u32 %r184, [%r174+36];add.s32 %r185, %r183, %r184;ld.shared.u32 %r186, [%r174+40];add.s32 %r187, %r185, %r186;ld.shared.u32 %r188, [%r174+44];add.s32 %r189, %r187, %r188;ld.shared.u32 %r190, [%r174+48];add.s32 %r191, %r189, %r190;ld.shared.u32 %r192, [%r174+52];add.s32 %r193, %r191, %r192;ld.shared.u32 %r194, [%r174+56];add.s32 %r195, %r193, %r194;ld.shared.u32 %r196, [%r174+60];add.s32 %r197, %r195, %r196;ld.shared.u32 %r198, [%r174+64];add.s32 %r199, %r197, %r198;ld.shared.u32 %r200, [%r174+68];add.s32 %r201, %r199, %r200;ld.shared.u32 %r202, [%r174+72];add.s32 %r203, %r201, %r202;ld.shared.u32 %r204, [%r174+76];add.s32 %r205, %r203, %r204;ld.shared.u32 %r206, [%r174+80];add.s32 %r207, %r205, %r206;ld.shared.u32 %r208, [%r174+84];add.s32 %r209, %r207, %r208;ld.shared.u32 %r210, [%r174+88];add.s32 %r211, %r209, %r210;ld.shared.u32 %r212, [%r174+92];add.s32 %r213, %r211, %r212;ld.shared.u32 %r214, [%r174+96];add.s32 %r215, %r213, %r214;ld.shared.u32 %r216, [%r174+100];add.s32 %r217, %r215, %r216;ld.shared.u32 %r218, [%r174+104];add.s32 %r219, %r217, %r218;ld.shared.u32 %r220, [%r174+108];add.s32 %r221, %r219, %r220;ld.shared.u32 %r222, [%r174+112];add.s32 %r223, %r221, %r222;ld.shared.u32 %r224, [%r174+116];add.s32 %r225, %r223, %r224;ld.shared.u32 %r226, [%r174+120];add.s32 %r227, %r225, %r226;ld.shared.u32 %r228, [%r174+124];add.s32 %r229, %r227, %r228;ld.shared.u32 %r230, [%r174+128];add.s32 %r231, %r229, %r230;ld.shared.u32 %r232, [%r174+132];add.s32 %r233, %r231, %r232;ld.shared.u32 %r234, [%r174+136];add.s32 %r235, %r233, %r234;ld.shared.u32 %r236, [%r174+140];add.s32 %r139, %r235, %r236;mov.u32 %r137, 1;mov.u32 %r162, 0;mov.u32 %r169, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r139, %r137, %r162, %r169; @p add.s32 r0, r0, %r139; mov.s32 %r135, r0;}mov.u32 %r143, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r135, %r143, %r162, %r169; @p add.s32 r0, r0, %r135; mov.s32 %r141, r0;}mov.u32 %r149, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r141, %r149, %r162, %r169; @p add.s32 r0, r0, %r141; mov.s32 %r147, r0;}mov.u32 %r155, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r147, %r155, %r162, %r169; @p add.s32 r0, r0, %r147; mov.s32 %r153, r0;}mov.u32 %r161, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r153, %r161, %r162, %r169; @p add.s32 r0, r0, %r153; mov.s32 %r159, r0;}mov.u32 %r168, 31;shfl.sync.idx.b32 %r165, %r159, %r168, %r168, %r169;sub.s32 %r237, %r159, %r139;ld.shared.u32 %r238, [%r174+16];add.s32 %r239, %r238, %r237;ld.shared.u32 %r240, [%r174+20];add.s32 %r241, %r240, %r239;ld.shared.u32 %r242, [%r174+24];add.s32 %r243, %r242, %r241;ld.shared.u32 %r244, [%r174+28];add.s32 %r245, %r244, %r243;ld.shared.u32 %r246, [%r174+32];add.s32 %r247, %r246, %r245;ld.shared.u32 %r248, [%r174+36];add.s32 %r249, %r248, %r247;ld.shared.u32 %r250, [%r174+40];add.s32 %r251, %r250, %r249;ld.shared.u32 %r252, [%r174+44];add.s32 %r253, %r252, %r251;ld.shared.u32 %r254, [%r174+48];add.s32 %r255, %r254, %r253;ld.shared.u32 %r256, [%r174+52];add.s32 %r257, %r256, %r255;ld.shared.u32 %r258, [%r174+56];add.s32 %r259, %r258, %r257;ld.shared.u32 %r260, [%r174+60];add.s32 %r261, %r260, %r259;ld.shared.u32 %r262, [%r174+64];add.s32 %r263, %r262, %r261;ld.shared.u32 %r264, [%r174+68];add.s32 %r265, %r264, %r263;ld.shared.u32 %r266, [%r174+72];add.s32 %r267, %r266, %r265;ld.shared.u32 %r268, [%r174+76];add.s32 %r269, %r268, %r267;ld.shared.u32 %r270, [%r174+80];add.s32 %r271, %r270, %r269;ld.shared.u32 %r272, [%r174+84];add.s32 %r273, %r272, %r271;ld.shared.u32 %r274, [%r174+88];add.s32 %r275, %r274, %r273;ld.shared.u32 %r276, [%r174+92];add.s32 %r277, %r276, %r275;ld.shared.u32 %r278, [%r174+96];add.s32 %r279, %r278, %r277;ld.shared.u32 %r280, [%r174+100];add.s32 %r281, %r280, %r279;ld.shared.u32 %r282, [%r174+104];add.s32 %r283, %r282, %r281;ld.shared.u32 %r284, [%r174+108];add.s32 %r285, %r284, %r283;ld.shared.u32 %r286, [%r174+112];add.s32 %r287, %r286, %r285;ld.shared.u32 %r288, [%r174+116];add.s32 %r289, %r288, %r287;ld.shared.u32 %r290, [%r174+120];add.s32 %r291, %r290, %r289;ld.shared.u32 %r292, [%r174+124];add.s32 %r293, %r292, %r291;ld.shared.u32 %r294, [%r174+128];add.s32 %r295, %r294, %r293;ld.shared.u32 %r296, [%r174+132];add.s32 %r297, %r296, %r295;ld.shared.u32 %r298, [%r174+136];add.s32 %r299, %r298, %r297;st.shared.u32 [%r174+16], %r237;st.shared.u32 [%r174+20], %r239;st.shared.u32 [%r174+24], %r241;st.shared.u32 [%r174+28], %r243;st.shared.u32 [%r174+32], %r245;st.shared.u32 [%r174+36], %r247;st.shared.u32 [%r174+40], %r249;st.shared.u32 [%r174+44], %r251;st.shared.u32 [%r174+48], %r253;st.shared.u32 [%r174+52], %r255;st.shared.u32 [%r174+56], %r257;st.shared.u32 [%r174+60], %r259;st.shared.u32 [%r174+64], %r261;st.shared.u32 [%r174+68], %r263;st.shared.u32 [%r174+72], %r265;st.shared.u32 [%r174+76], %r267;st.shared.u32 [%r174+80], %r269;st.shared.u32 [%r174+84], %r271;st.shared.u32 [%r174+88], %r273;st.shared.u32 [%r174+92], %r275;st.shared.u32 [%r174+96], %r277;st.shared.u32 [%r174+100], %r279;st.shared.u32 [%r174+104], %r281;st.shared.u32 [%r174+108], %r283;st.shared.u32 [%r174+112], %r285;st.shared.u32 [%r174+116], %r287;st.shared.u32 [%r174+120], %r289;st.shared.u32 [%r174+124], %r291;st.shared.u32 [%r174+128], %r293;st.shared.u32 [%r174+132], %r295;st.shared.u32 [%r174+136], %r297;st.shared.u32 [%r174+140], %r299;setp.ne.s32 %p17, %r90, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r165;BB10_17:bar.sync 0;ld.shared.u32 %r300, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r857, %r300, %r845;ld.param.u32 %r301, [%rd1+312];setp.lt.s32 %p18, %r857, %r301;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r852, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r304, [%r3+16];add.s32 %r305, %r304, %r845;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r306, [%rd1+136];mul.lo.s32 %r307, %r306, %r831;cvt.s64.s32 %rd47, %r307;cvt.s64.s32 %rd48, %r305;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r854, %r852};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r308, [%rd1+152];mul.lo.s32 %r309, %r308, %r831;cvt.s64.s32 %rd54, %r309;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r310, %r851, %r15;st.global.v2.u32 [%rd57], {%r310, %r853};BB10_21:bar.sync 0;mov.u32 %r826, %ntid.x;mov.u32 %r312, %nctaid.x;mad.lo.s32 %r847, %r312, %r826, %r847;setp.lt.s32 %p20, %r847, %r20;mov.u32 %r845, %r857;@%p20 bra BB10_6;BB10_22:mov.u32 %r20, 0;setp.ge.s32 %p21, %r862, %r857;mov.u32 %r864, %r21;@%p21 bra BB10_33;BB10_23:mov.u32 %r865, 0;add.s32 %r62, %r862, %r90;mov.u32 %r866, -1;setp.ge.s32 %p22, %r62, %r857;@%p22 bra BB10_25;add.s32 %r824, %r862, %r90;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r320, [%rd1+136];mul.lo.s32 %r321, %r320, %r831;cvt.s64.s32 %rd60, %r321;cvt.s64.s32 %rd61, %r824;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r861, %r860}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r861, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r324, [%rd68+4];ld.global.u32 %r866, [%rd68];sub.s32 %r865, %r324, %r866;BB10_25:setp.lt.u32 %p1, %r90, 32;setp.ne.s32 %p23, %r866, -1;selp.u32 %r326, 1, 0, %p23;st.shared.v2.u32 [%r4+16], {%r865, %r326};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r823, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r399, %r90, 33;shl.b32 %r400, %r399, 3;add.s32 %r402, %r823, %r400;ld.shared.v2.u32 {%r403, %r404}, [%r402+24];ld.shared.v2.u32 {%r407, %r408}, [%r402+16];add.s32 %r411, %r403, %r407;add.s32 %r412, %r404, %r408;ld.shared.v2.u32 {%r413, %r414}, [%r402+32];add.s32 %r417, %r411, %r413;add.s32 %r418, %r412, %r414;ld.shared.v2.u32 {%r419, %r420}, [%r402+40];add.s32 %r423, %r417, %r419;add.s32 %r424, %r418, %r420;ld.shared.v2.u32 {%r425, %r426}, [%r402+48];add.s32 %r429, %r423, %r425;add.s32 %r430, %r424, %r426;ld.shared.v2.u32 {%r431, %r432}, [%r402+56];add.s32 %r435, %r429, %r431;add.s32 %r436, %r430, %r432;ld.shared.v2.u32 {%r437, %r438}, [%r402+64];add.s32 %r441, %r435, %r437;add.s32 %r442, %r436, %r438;ld.shared.v2.u32 {%r443, %r444}, [%r402+72];add.s32 %r447, %r441, %r443;add.s32 %r448, %r442, %r444;ld.shared.v2.u32 {%r449, %r450}, [%r402+80];add.s32 %r453, %r447, %r449;add.s32 %r454, %r448, %r450;ld.shared.v2.u32 {%r455, %r456}, [%r402+88];add.s32 %r459, %r453, %r455;add.s32 %r460, %r454, %r456;ld.shared.v2.u32 {%r461, %r462}, [%r402+96];add.s32 %r465, %r459, %r461;add.s32 %r466, %r460, %r462;ld.shared.v2.u32 {%r467, %r468}, [%r402+104];add.s32 %r471, %r465, %r467;add.s32 %r472, %r466, %r468;ld.shared.v2.u32 {%r473, %r474}, [%r402+112];add.s32 %r477, %r471, %r473;add.s32 %r478, %r472, %r474;ld.shared.v2.u32 {%r479, %r480}, [%r402+120];add.s32 %r483, %r477, %r479;add.s32 %r484, %r478, %r480;ld.shared.v2.u32 {%r485, %r486}, [%r402+128];add.s32 %r489, %r483, %r485;add.s32 %r490, %r484, %r486;ld.shared.v2.u32 {%r491, %r492}, [%r402+136];add.s32 %r495, %r489, %r491;add.s32 %r496, %r490, %r492;ld.shared.v2.u32 {%r497, %r498}, [%r402+144];add.s32 %r501, %r495, %r497;add.s32 %r502, %r496, %r498;ld.shared.v2.u32 {%r503, %r504}, [%r402+152];add.s32 %r507, %r501, %r503;add.s32 %r508, %r502, %r504;ld.shared.v2.u32 {%r509, %r510}, [%r402+160];add.s32 %r513, %r507, %r509;add.s32 %r514, %r508, %r510;ld.shared.v2.u32 {%r515, %r516}, [%r402+168];add.s32 %r519, %r513, %r515;add.s32 %r520, %r514, %r516;ld.shared.v2.u32 {%r521, %r522}, [%r402+176];add.s32 %r525, %r519, %r521;add.s32 %r526, %r520, %r522;ld.shared.v2.u32 {%r527, %r528}, [%r402+184];add.s32 %r531, %r525, %r527;add.s32 %r532, %r526, %r528;ld.shared.v2.u32 {%r533, %r534}, [%r402+192];add.s32 %r537, %r531, %r533;add.s32 %r538, %r532, %r534;ld.shared.v2.u32 {%r539, %r540}, [%r402+200];add.s32 %r543, %r537, %r539;add.s32 %r544, %r538, %r540;ld.shared.v2.u32 {%r545, %r546}, [%r402+208];add.s32 %r549, %r543, %r545;add.s32 %r550, %r544, %r546;ld.shared.v2.u32 {%r551, %r552}, [%r402+216];add.s32 %r555, %r549, %r551;add.s32 %r556, %r550, %r552;ld.shared.v2.u32 {%r557, %r558}, [%r402+224];add.s32 %r561, %r555, %r557;add.s32 %r562, %r556, %r558;ld.shared.v2.u32 {%r563, %r564}, [%r402+232];add.s32 %r567, %r561, %r563;add.s32 %r568, %r562, %r564;ld.shared.v2.u32 {%r569, %r570}, [%r402+240];add.s32 %r573, %r567, %r569;add.s32 %r574, %r568, %r570;ld.shared.v2.u32 {%r575, %r576}, [%r402+248];add.s32 %r579, %r573, %r575;add.s32 %r580, %r574, %r576;ld.shared.v2.u32 {%r581, %r582}, [%r402+256];add.s32 %r585, %r579, %r581;add.s32 %r586, %r580, %r582;ld.shared.v2.u32 {%r587, %r588}, [%r402+264];add.s32 %r329, %r585, %r587;add.s32 %r334, %r586, %r588;mov.u32 %r395, 1;mov.u32 %r396, 0;mov.u32 %r397, -1;shfl.sync.up.b32 %r328, %r329, %r395, %r396, %r397;shfl.sync.up.b32 %r333, %r334, %r395, %r396, %r397;setp.lt.s32 %p24, %r327, 1;selp.b32 %r591, 0, %r328, %p24;add.s32 %r339, %r591, %r329;selp.b32 %r592, 0, %r333, %p24;add.s32 %r344, %r592, %r334;mov.u32 %r345, 2;shfl.sync.up.b32 %r338, %r339, %r345, %r396, %r397;shfl.sync.up.b32 %r343, %r344, %r345, %r396, %r397;setp.lt.s32 %p25, %r327, 2;selp.b32 %r593, 0, %r338, %p25;add.s32 %r349, %r593, %r339;selp.b32 %r594, 0, %r343, %p25;add.s32 %r354, %r594, %r344;mov.u32 %r355, 4;shfl.sync.up.b32 %r348, %r349, %r355, %r396, %r397;shfl.sync.up.b32 %r353, %r354, %r355, %r396, %r397;setp.lt.s32 %p26, %r327, 4;selp.b32 %r595, 0, %r348, %p26;add.s32 %r359, %r595, %r349;selp.b32 %r596, 0, %r353, %p26;add.s32 %r364, %r596, %r354;mov.u32 %r365, 8;shfl.sync.up.b32 %r358, %r359, %r365, %r396, %r397;shfl.sync.up.b32 %r363, %r364, %r365, %r396, %r397;setp.lt.s32 %p27, %r327, 8;selp.b32 %r597, 0, %r358, %p27;add.s32 %r369, %r597, %r359;selp.b32 %r598, 0, %r363, %p27;add.s32 %r374, %r598, %r364;mov.u32 %r375, 16;shfl.sync.up.b32 %r368, %r369, %r375, %r396, %r397;shfl.sync.up.b32 %r373, %r374, %r375, %r396, %r397;setp.lt.s32 %p28, %r327, 16;selp.b32 %r599, 0, %r368, %p28;add.s32 %r389, %r599, %r369;selp.b32 %r600, 0, %r373, %p28;add.s32 %r394, %r600, %r374;mov.u32 %r386, 31;shfl.sync.idx.b32 %r378, %r389, %r386, %r386, %r397;shfl.sync.idx.b32 %r383, %r394, %r386, %r386, %r397;shfl.sync.up.b32 %r388, %r389, %r395, %r396, %r397;shfl.sync.up.b32 %r393, %r394, %r395, %r396, %r397;setp.eq.s32 %p29, %r327, 0;ld.shared.v2.u32 {%r601, %r602}, [%r402+16];ld.shared.v2.u32 {%r605, %r606}, [%r402+24];ld.shared.v2.u32 {%r609, %r610}, [%r402+32];ld.shared.v2.u32 {%r613, %r614}, [%r402+40];ld.shared.v2.u32 {%r617, %r618}, [%r402+48];ld.shared.v2.u32 {%r621, %r622}, [%r402+56];ld.shared.v2.u32 {%r625, %r626}, [%r402+64];ld.shared.v2.u32 {%r629, %r630}, [%r402+72];ld.shared.v2.u32 {%r633, %r634}, [%r402+80];ld.shared.v2.u32 {%r637, %r638}, [%r402+88];ld.shared.v2.u32 {%r641, %r642}, [%r402+96];ld.shared.v2.u32 {%r645, %r646}, [%r402+104];ld.shared.v2.u32 {%r649, %r650}, [%r402+112];ld.shared.v2.u32 {%r653, %r654}, [%r402+120];ld.shared.v2.u32 {%r657, %r658}, [%r402+128];ld.shared.v2.u32 {%r661, %r662}, [%r402+136];ld.shared.v2.u32 {%r665, %r666}, [%r402+144];ld.shared.v2.u32 {%r669, %r670}, [%r402+152];ld.shared.v2.u32 {%r673, %r674}, [%r402+160];ld.shared.v2.u32 {%r677, %r678}, [%r402+168];ld.shared.v2.u32 {%r681, %r682}, [%r402+176];ld.shared.v2.u32 {%r685, %r686}, [%r402+184];ld.shared.v2.u32 {%r689, %r690}, [%r402+192];ld.shared.v2.u32 {%r693, %r694}, [%r402+200];ld.shared.v2.u32 {%r697, %r698}, [%r402+208];ld.shared.v2.u32 {%r701, %r702}, [%r402+216];ld.shared.v2.u32 {%r705, %r706}, [%r402+224];ld.shared.v2.u32 {%r709, %r710}, [%r402+232];ld.shared.v2.u32 {%r713, %r714}, [%r402+240];ld.shared.v2.u32 {%r717, %r718}, [%r402+248];ld.shared.v2.u32 {%r721, %r722}, [%r402+256];selp.b32 %r725, 0, %r388, %p29;selp.b32 %r726, 0, %r393, %p29;st.shared.v2.u32 [%r402+16], {%r725, %r726};add.s32 %r727, %r602, %r726;add.s32 %r728, %r601, %r725;st.shared.v2.u32 [%r402+24], {%r728, %r727};add.s32 %r729, %r606, %r727;add.s32 %r730, %r605, %r728;st.shared.v2.u32 [%r402+32], {%r730, %r729};add.s32 %r731, %r610, %r729;add.s32 %r732, %r609, %r730;st.shared.v2.u32 [%r402+40], {%r732, %r731};add.s32 %r733, %r614, %r731;add.s32 %r734, %r613, %r732;st.shared.v2.u32 [%r402+48], {%r734, %r733};add.s32 %r735, %r618, %r733;add.s32 %r736, %r617, %r734;st.shared.v2.u32 [%r402+56], {%r736, %r735};add.s32 %r737, %r622, %r735;add.s32 %r738, %r621, %r736;st.shared.v2.u32 [%r402+64], {%r738, %r737};add.s32 %r739, %r626, %r737;add.s32 %r740, %r625, %r738;st.shared.v2.u32 [%r402+72], {%r740, %r739};add.s32 %r741, %r630, %r739;add.s32 %r742, %r629, %r740;st.shared.v2.u32 [%r402+80], {%r742, %r741};add.s32 %r743, %r634, %r741;add.s32 %r744, %r633, %r742;st.shared.v2.u32 [%r402+88], {%r744, %r743};add.s32 %r745, %r638, %r743;add.s32 %r746, %r637, %r744;st.shared.v2.u32 [%r402+96], {%r746, %r745};add.s32 %r747, %r642, %r745;add.s32 %r748, %r641, %r746;st.shared.v2.u32 [%r402+104], {%r748, %r747};add.s32 %r749, %r646, %r747;add.s32 %r750, %r645, %r748;st.shared.v2.u32 [%r402+112], {%r750, %r749};add.s32 %r751, %r650, %r749;add.s32 %r752, %r649, %r750;st.shared.v2.u32 [%r402+120], {%r752, %r751};add.s32 %r753, %r654, %r751;add.s32 %r754, %r653, %r752;st.shared.v2.u32 [%r402+128], {%r754, %r753};add.s32 %r755, %r658, %r753;add.s32 %r756, %r657, %r754;st.shared.v2.u32 [%r402+136], {%r756, %r755};add.s32 %r757, %r662, %r755;add.s32 %r758, %r661, %r756;st.shared.v2.u32 [%r402+144], {%r758, %r757};add.s32 %r759, %r666, %r757;add.s32 %r760, %r665, %r758;st.shared.v2.u32 [%r402+152], {%r760, %r759};add.s32 %r761, %r670, %r759;add.s32 %r762, %r669, %r760;st.shared.v2.u32 [%r402+160], {%r762, %r761};add.s32 %r763, %r674, %r761;add.s32 %r764, %r673, %r762;st.shared.v2.u32 [%r402+168], {%r764, %r763};add.s32 %r765, %r678, %r763;add.s32 %r766, %r677, %r764;st.shared.v2.u32 [%r402+176], {%r766, %r765};add.s32 %r767, %r682, %r765;add.s32 %r768, %r681, %r766;st.shared.v2.u32 [%r402+184], {%r768, %r767};add.s32 %r769, %r686, %r767;add.s32 %r770, %r685, %r768;st.shared.v2.u32 [%r402+192], {%r770, %r769};add.s32 %r771, %r690, %r769;add.s32 %r772, %r689, %r770;st.shared.v2.u32 [%r402+200], {%r772, %r771};add.s32 %r773, %r694, %r771;add.s32 %r774, %r693, %r772;st.shared.v2.u32 [%r402+208], {%r774, %r773};add.s32 %r775, %r698, %r773;add.s32 %r776, %r697, %r774;st.shared.v2.u32 [%r402+216], {%r776, %r775};add.s32 %r777, %r702, %r775;add.s32 %r778, %r701, %r776;st.shared.v2.u32 [%r402+224], {%r778, %r777};add.s32 %r779, %r706, %r777;add.s32 %r780, %r705, %r778;st.shared.v2.u32 [%r402+232], {%r780, %r779};add.s32 %r781, %r710, %r779;add.s32 %r782, %r709, %r780;st.shared.v2.u32 [%r402+240], {%r782, %r781};add.s32 %r783, %r714, %r781;add.s32 %r784, %r713, %r782;st.shared.v2.u32 [%r402+248], {%r784, %r783};add.s32 %r785, %r718, %r783;add.s32 %r786, %r717, %r784;st.shared.v2.u32 [%r402+256], {%r786, %r785};add.s32 %r787, %r722, %r785;add.s32 %r788, %r721, %r786;st.shared.v2.u32 [%r402+264], {%r788, %r787};setp.ne.s32 %p30, %r90, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r378, %r383};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r789, %r790}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r75, %r790, %r864;ld.param.u32 %r791, [%rd1+308];setp.lt.s32 %p31, %r75, %r791;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r76, %r789, %r20;setp.eq.s32 %p32, %r866, -1;@%p32 bra BB10_32;add.s32 %r829, %r862, %r90;ld.shared.v2.u32 {%r794, %r795}, [%r4+16];add.s32 %r798, %r795, %r864;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r799, [%rd1+88];mul.lo.s32 %r800, %r799, %r12;cvt.s64.s32 %rd71, %r800;cvt.s64.s32 %rd72, %r798;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r866;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r801, [%rd1+72];mul.lo.s32 %r802, %r801, %r12;cvt.s64.s32 %rd78, %r802;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r803, %r794, %r20;st.global.u32 [%rd81], %r803;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r804, [%rd1+56];mul.lo.s32 %r805, %r804, %r12;cvt.s64.s32 %rd84, %r805;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r861, %r860};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r806, [%rd1+120];mul.lo.s32 %r807, %r806, %r831;cvt.s64.s32 %rd90, %r807;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r808, [%rd1+152];mul.lo.s32 %r809, %r808, %r831;cvt.s64.s32 %rd96, %r809;cvt.s64.s32 %rd97, %r829;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r810, [%rd1+104];mul.lo.s32 %r811, %r810, %r831;cvt.s64.s32 %rd104, %r811;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r812, 0;st.global.u32 [%rd107], %r812;BB10_32:bar.sync 0;mov.u32 %r828, %ntid.x;mov.u32 %r814, %nctaid.x;mad.lo.s32 %r862, %r814, %r828, %r862;setp.lt.s32 %p33, %r862, %r857;mov.u32 %r20, %r76;mov.u32 %r864, %r75;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r20, 0;mov.u32 %r22, %r21;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r302, [%rd3+48];or.b32 %r303, %r302, 2;st.global.u32 [%rd3+48], %r303;mov.u32 %r864, %r21;bra.uni BB10_34;BB10_29:ld.global.u32 %r792, [%rd3+48];or.b32 %r793, %r792, 1;st.global.u32 [%rd3+48], %r793;BB10_34:setp.ne.s32 %p35, %r90, 0;@%p35 bra BB10_36;mov.u32 %r816, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r817, [%rd1+40];mul.lo.s32 %r818, %r817, %r831;mul.wide.s32 %rd110, %r818, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r816, %r864};st.global.v2.u32 [%rd111+16], {%r816, %r864};BB10_36:ld.param.u32 %r820, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r819, %nctaid.y;add.s32 %r831, %r819, %r831;setp.lt.s32 %p36, %r831, %r820;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<63>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd62, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd62;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;cvt.u64.u32 %rd41, %r70;bfi.b64 %rd42, %rd40, %rd41, 32, 32;add.s64 %rd43, %rd27, 8;atom.global.min.u64 %rd44, [%rd43], %rd42;ld.param.u64 %rd45, [%rd1+272];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd47, %r58;add.s64 %rd48, %rd47, %rd6;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd46, %rd49;st.global.u32 [%rd50], %r56;ld.param.u64 %rd62, [%rd1+48];cvta.to.global.u64 %rd51, %rd62;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd52, %r59;add.s64 %rd53, %rd52, %rd6;shl.b64 %rd54, %rd53, 3;add.s64 %rd55, %rd51, %rd54;st.global.u32 [%rd55+4], %r71;ld.param.u64 %rd56, [%rd1+240];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd58, %r61;add.s64 %rd59, %rd58, %rd6;shl.b64 %rd60, %rd59, 2;add.s64 %rd61, %rd57, %rd60;st.global.u32 [%rd61], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<22>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd4;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r13, %ntid.x;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r4, %r14, %r13;cvta.to.global.u64 %rd5, %rd2;BB21_2:mul.lo.s32 %r15, %r3, %r31;mul.wide.s32 %rd6, %r15, 136;add.s64 %rd7, %rd5, %rd6;mov.u32 %r16, %ctaid.x;mov.u32 %r18, %tid.x;mad.lo.s32 %r32, %r13, %r16, %r18;ld.global.u32 %r6, [%rd7+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd3, [%rd1+240];ld.param.u32 %r7, [%rd1+248];BB21_4:mul.lo.s32 %r23, %r7, %r31;cvt.s64.s32 %rd8, %r23;cvt.s64.s32 %rd9, %r32;add.s64 %rd10, %rd8, %rd9;cvta.to.global.u64 %rd11, %rd3;shl.b64 %rd12, %rd10, 2;add.s64 %rd13, %rd11, %rd12;ld.global.u32 %r10, [%rd13];setp.gt.s32 %p3, %r10, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r24, [%rd1+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd16, %r25;shr.s32 %r26, %r10, 31;xor.b32 %r27, %r26, %r10;cvt.s64.s32 %rd17, %r27;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd20], {%r29, %r28};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}###~~~#}}}#|||#{{{#zzz#yyy#xxx#www#vvxvx#uuu#ttt#sss#;;;#rrr#qqq#ppp#ooo#nnn#mmm#lll#kkk#jjj#hhh###ggg#fff#eee#ddd#ccc#bbb* @ ! ! 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0[ \L  L    gL ` G  g cK i7  G G @@PP?Lgg mK PP"@gNgO Ą70[G[G[fG[G[G)[G/[W0[g \G@GL WL  `'N'O G0[W[W[fW[W[W)[W/[G0[g\@ L L  !     gLG Li7 G\G >g cKG 7\@^W\  @@XL'L g"@ N O '0[W[W[&?W[W[ g mK&W)[W/[70[G\LPLG 1_ W 'N 'O G0[ m[J gN gO G0[ gL L'L&[[[ [ N O& )[/[ N  O  N O@70[W0[ 70[ ' \ G0[GL \)8 )8 )8WL\/)8   7\\K 4NOg0[)87\\"K 7\@\ K   g\  'N'Ow 0[)87\w\"K 7\@\GKW!  gN gO g0[k[ )8 7\g\ GK W  A'N 'O70[&W[W[W[&W[W )[W/[ 70[G\L  L   \ L\     @WL' N'O' 0[c[@ gL g cK@@L Li7G Li7`G L\  XLi7 GL i7G  \ L  L L WL '\  L  G   GL  WL       /        @P?Lg mK PP?W'N'O70[' mKNO WL70[  \  'O )8  )8\ 'N 0[ 7\ ' cK" K'\ \  @gL cK@@PPPPPLPPP@cuda-decoder-kernels.cucuda-decoder-kernels-utils.h!is_representative || extra_cost == 0.0fmain_q_idx >= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@A9 9P a80)A9Ym,/9)ppHQpRDpXS~pT phLU= pXV5 p WpXp4XYp`Z)pX[ApD\p]pl`^p|_ pH`"pLaL$pxbS&pxc'pd%*pLe+p pf-p|g}/ph1pLi2pLj4phXk!6p0ln7pHmt8p8ne HpW pX (ZM p\ xp^8 9 Q(RZSTu U Vm V pWtWYPX%TX0Y Z5[\]| ^X_y!8 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V6XhD=@cuda-decoder-kernels.cuELF3\C%==@8@{.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE__ocg_const$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5243.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4795.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4280.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant2._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3659$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3661.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant2._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant2._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txtQPo`o~lo@xooopp,oJ1o7o@)=oCop?IoOo U-rR!.7S/ T 0 U 1V26"V"VXh/3Wq45UXr}67Y8Z9[G!:M"\T#s$;%]'t%(<)^*=+_\,uH->.`.vT/?/"`P.1@1a"3A3b5B5CL6c}7DM8d&9w9E;F;e;=G>f>x?H@gAyPCI%DhDzEJFiGKHjJLJk LMLlMN[Nm8OOOn PPE  v u{ } z{ z8 >E  v u{ } yz y8 =E  v u{ } z{ z8 <E  v u{ } yz y8 < {0e3do8 ovlw {8 ;  zw0 c/l|r}0j sn|r y :{ n r {u p} w  { ~8~yz{ olj  z5OAssssuu|}}}}} |{}넃y녂{ {  z0~    ~0 5{ n r {u p} w  { ~8~yz{q$`m Z^j   z5OAssssuu|}}}}} |킀{y{| z{  z(    ( 0  ||} y } |{z{} ( /}     yz zy v   u   e  vxy u    u i ~ }bh  }  0 -~    ykjs  ~w u wzv x} tx  | p xqxxg8 ,| j n |  }t {3Pj ~ ~ { } y }} y } y } y }}5G}a \(y|}}}} | } zy t z   0 (| zv}uyzs| w rt}w  f(y ~c_(X%뀀 yizu {3Pj~  ~~  }} y } y } y }} y } {}}}}}}} {  ux 큁v zꅂ{}  %}   zy j 0} m | k(kk kkzg}    s z vxvy xzzk  v i  ( #~  }u | v  o {njmpsv y  x v0 !{ |#jxg wp}} ww8 8z u   zz  }g  }t rslrlplj}||ꂀ}}}d"{0R x x x x x x x n~z08~8 | z y00} {o  y  zr z z})Z(%]eqrzz{rjvvwzx u}zx t x]" ]ꄂ|{zzos(x u~d q bziu w  Z z { ~  u   { |( zK05}w y(pss z8zz ~(0pss  zz ~~058 ~  u %[ { q {x(q u  v {| ((u w { v |(  z  |  {~8yzkloi 0| jnrvz jnrvz jnrv|@C>F;I8L5O2R/U,X)zZ#a   y  oxz }v z ~|0  }  }j z|((d s8  ns2As( P  !i ( ~              zꅀzzꅀ &쁅쁅쁅쁅쁅쁅쁅ts }t|`&|||||||||}~{  ~ }0~;Q m(6|P3K)L~ x l  u w t#Qh o jl}v v (v s 0|}0 U x|  v 0 } }q{z  |(^"w v}\0 ndx  | {  xqfi s tzz } wvvv z |쀃pp z  | m r {|r}  }  z3Pj~  ~~  }} y } y } y }} y } {}}}}}}} |{{|q   |t)d s&j  ux o xz  u  lvx }kgr$\  ( |z{ e{n z  |w t(_s_  _"d#k  {|wk x yzo x yzo yꅁ~{ ||~}~nh쁆X)Z(Q3W*|}}킀}}  |z|q0|}} nzz } ( J | r x}( I |  {z x} ~y(zz |tt(nttz t~tsz u | | y|} ( lgs)er,R .Tm!N2P0R.a G  p ~q w w삁 0;.version 6.2.target sm_61.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<875>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r831, %ctaid.y;setp.ge.s32 %p2, %r831, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r90, %tid.x;shr.u32 %r91, %r90, 5;add.s32 %r92, %r91, %r90;shl.b32 %r93, %r92, 2;mov.u32 %r94, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r3, %r94, %r93;shl.b32 %r95, %r92, 3;mov.u32 %r96, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r4, %r96, %r95;mov.u32 %r327, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r11, [%rd1+24];mul.lo.s32 %r97, %r11, %r831;mul.wide.s32 %rd8, %r97, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r12, [%rd3];ld.global.v2.u32 {%r20, %r864}, [%rd3+16];setp.lt.s32 %p3, %r20, 1;@%p3 bra BB10_34;ld.global.u32 %r15, [%rd3+56];ld.global.u32 %r16, [%rd3+80];ld.global.u32 %r22, [%rd3+52];BB10_4:mov.u32 %r21, %r864;mov.u32 %r101, %ctaid.x;mov.u32 %r102, %ntid.x;mul.lo.s32 %r862, %r102, %r101;mov.u32 %r857, 0;setp.ge.s32 %p4, %r862, %r20;@%p4 bra BB10_22;mov.u32 %r825, %ntid.x;add.s32 %r26, %r21, -1;mul.lo.s32 %r847, %r825, %r101;mov.u32 %r845, 0;BB10_6:add.s32 %r34, %r847, %r90;mov.u32 %r852, 2147483647;setp.ge.s32 %p5, %r34, %r20;@%p5 bra BB10_14;setp.eq.s32 %p6, %r26, %r22;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r108, [%rd1+72];mul.lo.s32 %r109, %r108, %r12;cvt.s64.s32 %rd5, %r109;mov.u32 %r849, %r26;mov.u32 %r851, %r22;@%p6 bra BB10_11;BB10_8:add.s32 %r110, %r851, 1;setp.eq.s32 %p7, %r110, %r849;@%p7 bra BB10_10;sub.s32 %r111, %r849, %r851;shr.u32 %r112, %r111, 31;add.s32 %r113, %r111, %r112;shr.s32 %r114, %r113, 1;add.s32 %r115, %r114, %r851;cvt.s64.s32 %rd10, %r115;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r116, [%rd13];setp.gt.s32 %p8, %r116, %r34;add.s32 %r117, %r115, -1;selp.b32 %r851, %r851, %r115, %p8;selp.b32 %r849, %r117, %r849, %p8;setp.eq.s32 %p9, %r849, %r851;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r849;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r118, [%rd17];setp.gt.s32 %p10, %r118, %r34;selp.b32 %r851, %r851, %r849, %p10;BB10_11:cvt.s64.s32 %rd18, %r851;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r119, [%rd1+88];mul.lo.s32 %r120, %r119, %r12;cvt.s64.s32 %rd24, %r120;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r121, [%rd21];sub.s32 %r122, %r34, %r121;ld.global.u32 %r123, [%rd27];add.s32 %r853, %r123, %r122;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r853, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r854, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r124, [%rd1+56];mul.lo.s32 %r125, %r124, %r12;cvt.s64.s32 %rd37, %r125;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r126, [%rd40+4];setp.gt.s32 %p11, %r126, -1;xor.b32 %r127, %r126, 2147483647;selp.b32 %r128, %r126, %r127, %p11;mov.b32 %f1, %r128;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r129, %f3;setp.gt.s32 %p12, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r43, %r129, %r130, %p12;ld.global.u32 %r131, [%rd3+64];setp.ge.s32 %p13, %r43, %r131;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r133, [%rd44], %r43;BB10_13:setp.lt.s32 %p14, %r43, %r16;selp.b32 %r852, %r43, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r852, 2147483647;selp.u32 %r134, 1, 0, %p15;st.shared.u32 [%r3+16], %r134;bar.sync 0;setp.gt.u32 %p16, %r90, 31;@%p16 bra BB10_17;mov.u32 %r827, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r171, %r90, 33;shl.b32 %r172, %r171, 2;add.s32 %r174, %r827, %r172;ld.shared.u32 %r175, [%r174+20];ld.shared.u32 %r176, [%r174+16];add.s32 %r177, %r175, %r176;ld.shared.u32 %r178, [%r174+24];add.s32 %r179, %r177, %r178;ld.shared.u32 %r180, [%r174+28];add.s32 %r181, %r179, %r180;ld.shared.u32 %r182, [%r174+32];add.s32 %r183, %r181, %r182;ld.shared.u32 %r184, [%r174+36];add.s32 %r185, %r183, %r184;ld.shared.u32 %r186, [%r174+40];add.s32 %r187, %r185, %r186;ld.shared.u32 %r188, [%r174+44];add.s32 %r189, %r187, %r188;ld.shared.u32 %r190, [%r174+48];add.s32 %r191, %r189, %r190;ld.shared.u32 %r192, [%r174+52];add.s32 %r193, %r191, %r192;ld.shared.u32 %r194, [%r174+56];add.s32 %r195, %r193, %r194;ld.shared.u32 %r196, [%r174+60];add.s32 %r197, %r195, %r196;ld.shared.u32 %r198, [%r174+64];add.s32 %r199, %r197, %r198;ld.shared.u32 %r200, [%r174+68];add.s32 %r201, %r199, %r200;ld.shared.u32 %r202, [%r174+72];add.s32 %r203, %r201, %r202;ld.shared.u32 %r204, [%r174+76];add.s32 %r205, %r203, %r204;ld.shared.u32 %r206, [%r174+80];add.s32 %r207, %r205, %r206;ld.shared.u32 %r208, [%r174+84];add.s32 %r209, %r207, %r208;ld.shared.u32 %r210, [%r174+88];add.s32 %r211, %r209, %r210;ld.shared.u32 %r212, [%r174+92];add.s32 %r213, %r211, %r212;ld.shared.u32 %r214, [%r174+96];add.s32 %r215, %r213, %r214;ld.shared.u32 %r216, [%r174+100];add.s32 %r217, %r215, %r216;ld.shared.u32 %r218, [%r174+104];add.s32 %r219, %r217, %r218;ld.shared.u32 %r220, [%r174+108];add.s32 %r221, %r219, %r220;ld.shared.u32 %r222, [%r174+112];add.s32 %r223, %r221, %r222;ld.shared.u32 %r224, [%r174+116];add.s32 %r225, %r223, %r224;ld.shared.u32 %r226, [%r174+120];add.s32 %r227, %r225, %r226;ld.shared.u32 %r228, [%r174+124];add.s32 %r229, %r227, %r228;ld.shared.u32 %r230, [%r174+128];add.s32 %r231, %r229, %r230;ld.shared.u32 %r232, [%r174+132];add.s32 %r233, %r231, %r232;ld.shared.u32 %r234, [%r174+136];add.s32 %r235, %r233, %r234;ld.shared.u32 %r236, [%r174+140];add.s32 %r139, %r235, %r236;mov.u32 %r137, 1;mov.u32 %r162, 0;mov.u32 %r169, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r139, %r137, %r162, %r169; @p add.s32 r0, r0, %r139; mov.s32 %r135, r0;}mov.u32 %r143, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r135, %r143, %r162, %r169; @p add.s32 r0, r0, %r135; mov.s32 %r141, r0;}mov.u32 %r149, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r141, %r149, %r162, %r169; @p add.s32 r0, r0, %r141; mov.s32 %r147, r0;}mov.u32 %r155, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r147, %r155, %r162, %r169; @p add.s32 r0, r0, %r147; mov.s32 %r153, r0;}mov.u32 %r161, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r153, %r161, %r162, %r169; @p add.s32 r0, r0, %r153; mov.s32 %r159, r0;}mov.u32 %r168, 31;shfl.sync.idx.b32 %r165, %r159, %r168, %r168, %r169;sub.s32 %r237, %r159, %r139;ld.shared.u32 %r238, [%r174+16];add.s32 %r239, %r238, %r237;ld.shared.u32 %r240, [%r174+20];add.s32 %r241, %r240, %r239;ld.shared.u32 %r242, [%r174+24];add.s32 %r243, %r242, %r241;ld.shared.u32 %r244, [%r174+28];add.s32 %r245, %r244, %r243;ld.shared.u32 %r246, [%r174+32];add.s32 %r247, %r246, %r245;ld.shared.u32 %r248, [%r174+36];add.s32 %r249, %r248, %r247;ld.shared.u32 %r250, [%r174+40];add.s32 %r251, %r250, %r249;ld.shared.u32 %r252, [%r174+44];add.s32 %r253, %r252, %r251;ld.shared.u32 %r254, [%r174+48];add.s32 %r255, %r254, %r253;ld.shared.u32 %r256, [%r174+52];add.s32 %r257, %r256, %r255;ld.shared.u32 %r258, [%r174+56];add.s32 %r259, %r258, %r257;ld.shared.u32 %r260, [%r174+60];add.s32 %r261, %r260, %r259;ld.shared.u32 %r262, [%r174+64];add.s32 %r263, %r262, %r261;ld.shared.u32 %r264, [%r174+68];add.s32 %r265, %r264, %r263;ld.shared.u32 %r266, [%r174+72];add.s32 %r267, %r266, %r265;ld.shared.u32 %r268, [%r174+76];add.s32 %r269, %r268, %r267;ld.shared.u32 %r270, [%r174+80];add.s32 %r271, %r270, %r269;ld.shared.u32 %r272, [%r174+84];add.s32 %r273, %r272, %r271;ld.shared.u32 %r274, [%r174+88];add.s32 %r275, %r274, %r273;ld.shared.u32 %r276, [%r174+92];add.s32 %r277, %r276, %r275;ld.shared.u32 %r278, [%r174+96];add.s32 %r279, %r278, %r277;ld.shared.u32 %r280, [%r174+100];add.s32 %r281, %r280, %r279;ld.shared.u32 %r282, [%r174+104];add.s32 %r283, %r282, %r281;ld.shared.u32 %r284, [%r174+108];add.s32 %r285, %r284, %r283;ld.shared.u32 %r286, [%r174+112];add.s32 %r287, %r286, %r285;ld.shared.u32 %r288, [%r174+116];add.s32 %r289, %r288, %r287;ld.shared.u32 %r290, [%r174+120];add.s32 %r291, %r290, %r289;ld.shared.u32 %r292, [%r174+124];add.s32 %r293, %r292, %r291;ld.shared.u32 %r294, [%r174+128];add.s32 %r295, %r294, %r293;ld.shared.u32 %r296, [%r174+132];add.s32 %r297, %r296, %r295;ld.shared.u32 %r298, [%r174+136];add.s32 %r299, %r298, %r297;st.shared.u32 [%r174+16], %r237;st.shared.u32 [%r174+20], %r239;st.shared.u32 [%r174+24], %r241;st.shared.u32 [%r174+28], %r243;st.shared.u32 [%r174+32], %r245;st.shared.u32 [%r174+36], %r247;st.shared.u32 [%r174+40], %r249;st.shared.u32 [%r174+44], %r251;st.shared.u32 [%r174+48], %r253;st.shared.u32 [%r174+52], %r255;st.shared.u32 [%r174+56], %r257;st.shared.u32 [%r174+60], %r259;st.shared.u32 [%r174+64], %r261;st.shared.u32 [%r174+68], %r263;st.shared.u32 [%r174+72], %r265;st.shared.u32 [%r174+76], %r267;st.shared.u32 [%r174+80], %r269;st.shared.u32 [%r174+84], %r271;st.shared.u32 [%r174+88], %r273;st.shared.u32 [%r174+92], %r275;st.shared.u32 [%r174+96], %r277;st.shared.u32 [%r174+100], %r279;st.shared.u32 [%r174+104], %r281;st.shared.u32 [%r174+108], %r283;st.shared.u32 [%r174+112], %r285;st.shared.u32 [%r174+116], %r287;st.shared.u32 [%r174+120], %r289;st.shared.u32 [%r174+124], %r291;st.shared.u32 [%r174+128], %r293;st.shared.u32 [%r174+132], %r295;st.shared.u32 [%r174+136], %r297;st.shared.u32 [%r174+140], %r299;setp.ne.s32 %p17, %r90, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r165;BB10_17:bar.sync 0;ld.shared.u32 %r300, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r857, %r300, %r845;ld.param.u32 %r301, [%rd1+312];setp.lt.s32 %p18, %r857, %r301;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r852, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r304, [%r3+16];add.s32 %r305, %r304, %r845;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r306, [%rd1+136];mul.lo.s32 %r307, %r306, %r831;cvt.s64.s32 %rd47, %r307;cvt.s64.s32 %rd48, %r305;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r854, %r852};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r308, [%rd1+152];mul.lo.s32 %r309, %r308, %r831;cvt.s64.s32 %rd54, %r309;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r310, %r851, %r15;st.global.v2.u32 [%rd57], {%r310, %r853};BB10_21:bar.sync 0;mov.u32 %r826, %ntid.x;mov.u32 %r312, %nctaid.x;mad.lo.s32 %r847, %r312, %r826, %r847;setp.lt.s32 %p20, %r847, %r20;mov.u32 %r845, %r857;@%p20 bra BB10_6;BB10_22:mov.u32 %r20, 0;setp.ge.s32 %p21, %r862, %r857;mov.u32 %r864, %r21;@%p21 bra BB10_33;BB10_23:mov.u32 %r865, 0;add.s32 %r62, %r862, %r90;mov.u32 %r866, -1;setp.ge.s32 %p22, %r62, %r857;@%p22 bra BB10_25;add.s32 %r824, %r862, %r90;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r320, [%rd1+136];mul.lo.s32 %r321, %r320, %r831;cvt.s64.s32 %rd60, %r321;cvt.s64.s32 %rd61, %r824;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r861, %r860}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r861, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r324, [%rd68+4];ld.global.u32 %r866, [%rd68];sub.s32 %r865, %r324, %r866;BB10_25:setp.lt.u32 %p1, %r90, 32;setp.ne.s32 %p23, %r866, -1;selp.u32 %r326, 1, 0, %p23;st.shared.v2.u32 [%r4+16], {%r865, %r326};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r823, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r399, %r90, 33;shl.b32 %r400, %r399, 3;add.s32 %r402, %r823, %r400;ld.shared.v2.u32 {%r403, %r404}, [%r402+24];ld.shared.v2.u32 {%r407, %r408}, [%r402+16];add.s32 %r411, %r403, %r407;add.s32 %r412, %r404, %r408;ld.shared.v2.u32 {%r413, %r414}, [%r402+32];add.s32 %r417, %r411, %r413;add.s32 %r418, %r412, %r414;ld.shared.v2.u32 {%r419, %r420}, [%r402+40];add.s32 %r423, %r417, %r419;add.s32 %r424, %r418, %r420;ld.shared.v2.u32 {%r425, %r426}, [%r402+48];add.s32 %r429, %r423, %r425;add.s32 %r430, %r424, %r426;ld.shared.v2.u32 {%r431, %r432}, [%r402+56];add.s32 %r435, %r429, %r431;add.s32 %r436, %r430, %r432;ld.shared.v2.u32 {%r437, %r438}, [%r402+64];add.s32 %r441, %r435, %r437;add.s32 %r442, %r436, %r438;ld.shared.v2.u32 {%r443, %r444}, [%r402+72];add.s32 %r447, %r441, %r443;add.s32 %r448, %r442, %r444;ld.shared.v2.u32 {%r449, %r450}, [%r402+80];add.s32 %r453, %r447, %r449;add.s32 %r454, %r448, %r450;ld.shared.v2.u32 {%r455, %r456}, [%r402+88];add.s32 %r459, %r453, %r455;add.s32 %r460, %r454, %r456;ld.shared.v2.u32 {%r461, %r462}, [%r402+96];add.s32 %r465, %r459, %r461;add.s32 %r466, %r460, %r462;ld.shared.v2.u32 {%r467, %r468}, [%r402+104];add.s32 %r471, %r465, %r467;add.s32 %r472, %r466, %r468;ld.shared.v2.u32 {%r473, %r474}, [%r402+112];add.s32 %r477, %r471, %r473;add.s32 %r478, %r472, %r474;ld.shared.v2.u32 {%r479, %r480}, [%r402+120];add.s32 %r483, %r477, %r479;add.s32 %r484, %r478, %r480;ld.shared.v2.u32 {%r485, %r486}, [%r402+128];add.s32 %r489, %r483, %r485;add.s32 %r490, %r484, %r486;ld.shared.v2.u32 {%r491, %r492}, [%r402+136];add.s32 %r495, %r489, %r491;add.s32 %r496, %r490, %r492;ld.shared.v2.u32 {%r497, %r498}, [%r402+144];add.s32 %r501, %r495, %r497;add.s32 %r502, %r496, %r498;ld.shared.v2.u32 {%r503, %r504}, [%r402+152];add.s32 %r507, %r501, %r503;add.s32 %r508, %r502, %r504;ld.shared.v2.u32 {%r509, %r510}, [%r402+160];add.s32 %r513, %r507, %r509;add.s32 %r514, %r508, %r510;ld.shared.v2.u32 {%r515, %r516}, [%r402+168];add.s32 %r519, %r513, %r515;add.s32 %r520, %r514, %r516;ld.shared.v2.u32 {%r521, %r522}, [%r402+176];add.s32 %r525, %r519, %r521;add.s32 %r526, %r520, %r522;ld.shared.v2.u32 {%r527, %r528}, [%r402+184];add.s32 %r531, %r525, %r527;add.s32 %r532, %r526, %r528;ld.shared.v2.u32 {%r533, %r534}, [%r402+192];add.s32 %r537, %r531, %r533;add.s32 %r538, %r532, %r534;ld.shared.v2.u32 {%r539, %r540}, [%r402+200];add.s32 %r543, %r537, %r539;add.s32 %r544, %r538, %r540;ld.shared.v2.u32 {%r545, %r546}, [%r402+208];add.s32 %r549, %r543, %r545;add.s32 %r550, %r544, %r546;ld.shared.v2.u32 {%r551, %r552}, [%r402+216];add.s32 %r555, %r549, %r551;add.s32 %r556, %r550, %r552;ld.shared.v2.u32 {%r557, %r558}, [%r402+224];add.s32 %r561, %r555, %r557;add.s32 %r562, %r556, %r558;ld.shared.v2.u32 {%r563, %r564}, [%r402+232];add.s32 %r567, %r561, %r563;add.s32 %r568, %r562, %r564;ld.shared.v2.u32 {%r569, %r570}, [%r402+240];add.s32 %r573, %r567, %r569;add.s32 %r574, %r568, %r570;ld.shared.v2.u32 {%r575, %r576}, [%r402+248];add.s32 %r579, %r573, %r575;add.s32 %r580, %r574, %r576;ld.shared.v2.u32 {%r581, %r582}, [%r402+256];add.s32 %r585, %r579, %r581;add.s32 %r586, %r580, %r582;ld.shared.v2.u32 {%r587, %r588}, [%r402+264];add.s32 %r329, %r585, %r587;add.s32 %r334, %r586, %r588;mov.u32 %r395, 1;mov.u32 %r396, 0;mov.u32 %r397, -1;shfl.sync.up.b32 %r328, %r329, %r395, %r396, %r397;shfl.sync.up.b32 %r333, %r334, %r395, %r396, %r397;setp.lt.s32 %p24, %r327, 1;selp.b32 %r591, 0, %r328, %p24;add.s32 %r339, %r591, %r329;selp.b32 %r592, 0, %r333, %p24;add.s32 %r344, %r592, %r334;mov.u32 %r345, 2;shfl.sync.up.b32 %r338, %r339, %r345, %r396, %r397;shfl.sync.up.b32 %r343, %r344, %r345, %r396, %r397;setp.lt.s32 %p25, %r327, 2;selp.b32 %r593, 0, %r338, %p25;add.s32 %r349, %r593, %r339;selp.b32 %r594, 0, %r343, %p25;add.s32 %r354, %r594, %r344;mov.u32 %r355, 4;shfl.sync.up.b32 %r348, %r349, %r355, %r396, %r397;shfl.sync.up.b32 %r353, %r354, %r355, %r396, %r397;setp.lt.s32 %p26, %r327, 4;selp.b32 %r595, 0, %r348, %p26;add.s32 %r359, %r595, %r349;selp.b32 %r596, 0, %r353, %p26;add.s32 %r364, %r596, %r354;mov.u32 %r365, 8;shfl.sync.up.b32 %r358, %r359, %r365, %r396, %r397;shfl.sync.up.b32 %r363, %r364, %r365, %r396, %r397;setp.lt.s32 %p27, %r327, 8;selp.b32 %r597, 0, %r358, %p27;add.s32 %r369, %r597, %r359;selp.b32 %r598, 0, %r363, %p27;add.s32 %r374, %r598, %r364;mov.u32 %r375, 16;shfl.sync.up.b32 %r368, %r369, %r375, %r396, %r397;shfl.sync.up.b32 %r373, %r374, %r375, %r396, %r397;setp.lt.s32 %p28, %r327, 16;selp.b32 %r599, 0, %r368, %p28;add.s32 %r389, %r599, %r369;selp.b32 %r600, 0, %r373, %p28;add.s32 %r394, %r600, %r374;mov.u32 %r386, 31;shfl.sync.idx.b32 %r378, %r389, %r386, %r386, %r397;shfl.sync.idx.b32 %r383, %r394, %r386, %r386, %r397;shfl.sync.up.b32 %r388, %r389, %r395, %r396, %r397;shfl.sync.up.b32 %r393, %r394, %r395, %r396, %r397;setp.eq.s32 %p29, %r327, 0;ld.shared.v2.u32 {%r601, %r602}, [%r402+16];ld.shared.v2.u32 {%r605, %r606}, [%r402+24];ld.shared.v2.u32 {%r609, %r610}, [%r402+32];ld.shared.v2.u32 {%r613, %r614}, [%r402+40];ld.shared.v2.u32 {%r617, %r618}, [%r402+48];ld.shared.v2.u32 {%r621, %r622}, [%r402+56];ld.shared.v2.u32 {%r625, %r626}, [%r402+64];ld.shared.v2.u32 {%r629, %r630}, [%r402+72];ld.shared.v2.u32 {%r633, %r634}, [%r402+80];ld.shared.v2.u32 {%r637, %r638}, [%r402+88];ld.shared.v2.u32 {%r641, %r642}, [%r402+96];ld.shared.v2.u32 {%r645, %r646}, [%r402+104];ld.shared.v2.u32 {%r649, %r650}, [%r402+112];ld.shared.v2.u32 {%r653, %r654}, [%r402+120];ld.shared.v2.u32 {%r657, %r658}, [%r402+128];ld.shared.v2.u32 {%r661, %r662}, [%r402+136];ld.shared.v2.u32 {%r665, %r666}, [%r402+144];ld.shared.v2.u32 {%r669, %r670}, [%r402+152];ld.shared.v2.u32 {%r673, %r674}, [%r402+160];ld.shared.v2.u32 {%r677, %r678}, [%r402+168];ld.shared.v2.u32 {%r681, %r682}, [%r402+176];ld.shared.v2.u32 {%r685, %r686}, [%r402+184];ld.shared.v2.u32 {%r689, %r690}, [%r402+192];ld.shared.v2.u32 {%r693, %r694}, [%r402+200];ld.shared.v2.u32 {%r697, %r698}, [%r402+208];ld.shared.v2.u32 {%r701, %r702}, [%r402+216];ld.shared.v2.u32 {%r705, %r706}, [%r402+224];ld.shared.v2.u32 {%r709, %r710}, [%r402+232];ld.shared.v2.u32 {%r713, %r714}, [%r402+240];ld.shared.v2.u32 {%r717, %r718}, [%r402+248];ld.shared.v2.u32 {%r721, %r722}, [%r402+256];selp.b32 %r725, 0, %r388, %p29;selp.b32 %r726, 0, %r393, %p29;st.shared.v2.u32 [%r402+16], {%r725, %r726};add.s32 %r727, %r602, %r726;add.s32 %r728, %r601, %r725;st.shared.v2.u32 [%r402+24], {%r728, %r727};add.s32 %r729, %r606, %r727;add.s32 %r730, %r605, %r728;st.shared.v2.u32 [%r402+32], {%r730, %r729};add.s32 %r731, %r610, %r729;add.s32 %r732, %r609, %r730;st.shared.v2.u32 [%r402+40], {%r732, %r731};add.s32 %r733, %r614, %r731;add.s32 %r734, %r613, %r732;st.shared.v2.u32 [%r402+48], {%r734, %r733};add.s32 %r735, %r618, %r733;add.s32 %r736, %r617, %r734;st.shared.v2.u32 [%r402+56], {%r736, %r735};add.s32 %r737, %r622, %r735;add.s32 %r738, %r621, %r736;st.shared.v2.u32 [%r402+64], {%r738, %r737};add.s32 %r739, %r626, %r737;add.s32 %r740, %r625, %r738;st.shared.v2.u32 [%r402+72], {%r740, %r739};add.s32 %r741, %r630, %r739;add.s32 %r742, %r629, %r740;st.shared.v2.u32 [%r402+80], {%r742, %r741};add.s32 %r743, %r634, %r741;add.s32 %r744, %r633, %r742;st.shared.v2.u32 [%r402+88], {%r744, %r743};add.s32 %r745, %r638, %r743;add.s32 %r746, %r637, %r744;st.shared.v2.u32 [%r402+96], {%r746, %r745};add.s32 %r747, %r642, %r745;add.s32 %r748, %r641, %r746;st.shared.v2.u32 [%r402+104], {%r748, %r747};add.s32 %r749, %r646, %r747;add.s32 %r750, %r645, %r748;st.shared.v2.u32 [%r402+112], {%r750, %r749};add.s32 %r751, %r650, %r749;add.s32 %r752, %r649, %r750;st.shared.v2.u32 [%r402+120], {%r752, %r751};add.s32 %r753, %r654, %r751;add.s32 %r754, %r653, %r752;st.shared.v2.u32 [%r402+128], {%r754, %r753};add.s32 %r755, %r658, %r753;add.s32 %r756, %r657, %r754;st.shared.v2.u32 [%r402+136], {%r756, %r755};add.s32 %r757, %r662, %r755;add.s32 %r758, %r661, %r756;st.shared.v2.u32 [%r402+144], {%r758, %r757};add.s32 %r759, %r666, %r757;add.s32 %r760, %r665, %r758;st.shared.v2.u32 [%r402+152], {%r760, %r759};add.s32 %r761, %r670, %r759;add.s32 %r762, %r669, %r760;st.shared.v2.u32 [%r402+160], {%r762, %r761};add.s32 %r763, %r674, %r761;add.s32 %r764, %r673, %r762;st.shared.v2.u32 [%r402+168], {%r764, %r763};add.s32 %r765, %r678, %r763;add.s32 %r766, %r677, %r764;st.shared.v2.u32 [%r402+176], {%r766, %r765};add.s32 %r767, %r682, %r765;add.s32 %r768, %r681, %r766;st.shared.v2.u32 [%r402+184], {%r768, %r767};add.s32 %r769, %r686, %r767;add.s32 %r770, %r685, %r768;st.shared.v2.u32 [%r402+192], {%r770, %r769};add.s32 %r771, %r690, %r769;add.s32 %r772, %r689, %r770;st.shared.v2.u32 [%r402+200], {%r772, %r771};add.s32 %r773, %r694, %r771;add.s32 %r774, %r693, %r772;st.shared.v2.u32 [%r402+208], {%r774, %r773};add.s32 %r775, %r698, %r773;add.s32 %r776, %r697, %r774;st.shared.v2.u32 [%r402+216], {%r776, %r775};add.s32 %r777, %r702, %r775;add.s32 %r778, %r701, %r776;st.shared.v2.u32 [%r402+224], {%r778, %r777};add.s32 %r779, %r706, %r777;add.s32 %r780, %r705, %r778;st.shared.v2.u32 [%r402+232], {%r780, %r779};add.s32 %r781, %r710, %r779;add.s32 %r782, %r709, %r780;st.shared.v2.u32 [%r402+240], {%r782, %r781};add.s32 %r783, %r714, %r781;add.s32 %r784, %r713, %r782;st.shared.v2.u32 [%r402+248], {%r784, %r783};add.s32 %r785, %r718, %r783;add.s32 %r786, %r717, %r784;st.shared.v2.u32 [%r402+256], {%r786, %r785};add.s32 %r787, %r722, %r785;add.s32 %r788, %r721, %r786;st.shared.v2.u32 [%r402+264], {%r788, %r787};setp.ne.s32 %p30, %r90, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r378, %r383};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r789, %r790}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r75, %r790, %r864;ld.param.u32 %r791, [%rd1+308];setp.lt.s32 %p31, %r75, %r791;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r76, %r789, %r20;setp.eq.s32 %p32, %r866, -1;@%p32 bra BB10_32;add.s32 %r829, %r862, %r90;ld.shared.v2.u32 {%r794, %r795}, [%r4+16];add.s32 %r798, %r795, %r864;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r799, [%rd1+88];mul.lo.s32 %r800, %r799, %r12;cvt.s64.s32 %rd71, %r800;cvt.s64.s32 %rd72, %r798;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r866;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r801, [%rd1+72];mul.lo.s32 %r802, %r801, %r12;cvt.s64.s32 %rd78, %r802;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r803, %r794, %r20;st.global.u32 [%rd81], %r803;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r804, [%rd1+56];mul.lo.s32 %r805, %r804, %r12;cvt.s64.s32 %rd84, %r805;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r861, %r860};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r806, [%rd1+120];mul.lo.s32 %r807, %r806, %r831;cvt.s64.s32 %rd90, %r807;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r808, [%rd1+152];mul.lo.s32 %r809, %r808, %r831;cvt.s64.s32 %rd96, %r809;cvt.s64.s32 %rd97, %r829;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r810, [%rd1+104];mul.lo.s32 %r811, %r810, %r831;cvt.s64.s32 %rd104, %r811;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r812, 0;st.global.u32 [%rd107], %r812;BB10_32:bar.sync 0;mov.u32 %r828, %ntid.x;mov.u32 %r814, %nctaid.x;mad.lo.s32 %r862, %r814, %r828, %r862;setp.lt.s32 %p33, %r862, %r857;mov.u32 %r20, %r76;mov.u32 %r864, %r75;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r20, 0;mov.u32 %r22, %r21;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r302, [%rd3+48];or.b32 %r303, %r302, 2;st.global.u32 [%rd3+48], %r303;mov.u32 %r864, %r21;bra.uni BB10_34;BB10_29:ld.global.u32 %r792, [%rd3+48];or.b32 %r793, %r792, 1;st.global.u32 [%rd3+48], %r793;BB10_34:setp.ne.s32 %p35, %r90, 0;@%p35 bra BB10_36;mov.u32 %r816, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r817, [%rd1+40];mul.lo.s32 %r818, %r817, %r831;mul.wide.s32 %rd110, %r818, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r816, %r864};st.global.v2.u32 [%rd111+16], {%r816, %r864};BB10_36:ld.param.u32 %r820, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r819, %nctaid.y;add.s32 %r831, %r819, %r831;setp.lt.s32 %p36, %r831, %r820;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<63>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd62, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd62;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;cvt.u64.u32 %rd41, %r70;bfi.b64 %rd42, %rd40, %rd41, 32, 32;add.s64 %rd43, %rd27, 8;atom.global.min.u64 %rd44, [%rd43], %rd42;ld.param.u64 %rd45, [%rd1+272];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd47, %r58;add.s64 %rd48, %rd47, %rd6;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd46, %rd49;st.global.u32 [%rd50], %r56;ld.param.u64 %rd62, [%rd1+48];cvta.to.global.u64 %rd51, %rd62;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd52, %r59;add.s64 %rd53, %rd52, %rd6;shl.b64 %rd54, %rd53, 3;add.s64 %rd55, %rd51, %rd54;st.global.u32 [%rd55+4], %r71;ld.param.u64 %rd56, [%rd1+240];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd58, %r61;add.s64 %rd59, %rd58, %rd6;shl.b64 %rd60, %rd59, 2;add.s64 %rd61, %rd57, %rd60;st.global.u32 [%rd61], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<22>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd4;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r13, %ntid.x;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r4, %r14, %r13;cvta.to.global.u64 %rd5, %rd2;BB21_2:mul.lo.s32 %r15, %r3, %r31;mul.wide.s32 %rd6, %r15, 136;add.s64 %rd7, %rd5, %rd6;mov.u32 %r16, %ctaid.x;mov.u32 %r18, %tid.x;mad.lo.s32 %r32, %r13, %r16, %r18;ld.global.u32 %r6, [%rd7+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd3, [%rd1+240];ld.param.u32 %r7, [%rd1+248];BB21_4:mul.lo.s32 %r23, %r7, %r31;cvt.s64.s32 %rd8, %r23;cvt.s64.s32 %rd9, %r32;add.s64 %rd10, %rd8, %rd9;cvta.to.global.u64 %rd11, %rd3;shl.b64 %rd12, %rd10, 2;add.s64 %rd13, %rd11, %rd12;ld.global.u32 %r10, [%rd13];setp.gt.s32 %p3, %r10, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r24, [%rd1+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd16, %r25;shr.s32 %r26, %r10, 31;xor.b32 %r27, %r26, %r10;cvt.s64.s32 %rd17, %r27;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd20], {%r29, %r28};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}###~~~#}}}#|||#{{{#zzz#yyy#xxx#www#vvxvx#uuu#ttt#sss#;;;#rrr#qqq#ppp#ooo#nnn#mmm#lll#kkk#jjj#hhh###ggg#fff#eee#ddd#ccc#bbb* @ ! ! A  aP8* @ ! ! A  aP8* @ ! ! A  aP8* @ ! ! A  aP8* @  a8* @  aH80* "@  ai(0HXp8XxH8x * &@  ai(0Hp H8 * (@  a8 * *@  aiH8(0* ,@  aH8H* /@  ai(808pPhH8* 2@  a(08P0hph8  * 4@  aiH8  * 7@   a(8 * <@   a(XpP8H@* >@  a8* A@    aP8 * C@    aP88* G@  a@(P  (PpH   * I@  a8* L@  a(pPP80* O@  a(08Hx(XpH8 @* R@  a(p(8h0Pp(8PX8PhxhX  * T@  a8* V@  a80* X@  a * Z@ a* \@ aH8*00+8,H+ P, X+h,*i+,+ , +,*iH+ P, X+ h, p+x,*iH+ P, X+ h, p+x,*i(+ 0, 8+ H, P+X,*i0+8,H+P,X+h,*ib9cde@ f g hjkl+m<noxpq r&s't(u*v3w4xb6y3:z={>|>}"@~@Abcdefg_h`j k' l m nopqr\stuvb"w"x$y'zQ){)|*}F+~+Y,;??Lgg mK PP'6W' 6@)8@ L L   'N'O 0[ '\m[ @ N O W0[g\ )8)8 7\ G\B K   WL7\ 'N  'O 0[)8c[ L L? @gLg cK@@PPPP?Lgg mK PP'6W' 6@)8@ L L   'N'O 0[ '\m[ @ N O W0[g\ )8)8 7\ G\B K   WL7\ 'N  'O 0[)8c[ L L? @gLg cK@@PPPP?Lgg mK PP'6W' 6@)8@ L L   'N'O 0[ '\m[ @ N O W0[g\ )8)8 7\ G\B K   WL7\ 'N  'O 0[)8c[ L L? @gLg cK@@PPPP?Lgg mK PP'6W' 6@)8@ L L   'N'O 0[ '\m[ @ N O W0[g\ )8)8 7\ G\B K   WL7\ 'N  'O 0[)8c[ L L? @gLg cK@@PPPP?Lgg mK PPO"DgNgO W0['['[&'['['/[')[W0[g\@ GL WL      G  "N  Ow0[gL'['['[')[ 74i7 i7 \G G  X\ i7'['/[0[ \@L Gg cK   LG L@^\  \!     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M'!\!\|!\!\P?8!\'P9!\|GP:!\P ;!\Q\?/e[#\<!\P\\? !\P\?7\'P\?\GP\?\)P*)\?*\*Q\ *\P!\!\ \ \ ]\]@$$g!\]%%w\@""G!\$]##W\@ '!\"]!!7\@!\ ]\@ !\] \ ]P?PP'LXMe[`@  \ cK@ L& @ \' &  @&  !gm[\Pd7|< @|7!\'|_g!\G|w!\1 |d[? !\ | !\  i7i7@@GG7\ g\gX\Pi7d7G|< @|g!\'|_w!\ G| !\1 |d[? !\ | !\ \i[@i7G7\W Lg[?h8@eKi7G\gX\i7G Pi7@d7G 7\|<  @ | 7!\'|_G!\G|g!\1|d[?w!\|!\Pd7|< @|7!\'|_G!\G|g!\1|d[?w!\|!\Pd7|<@|7!\'|_G!\G|W!\1|d[?g!\|w!\@P|PL eK!@(eK([K\@'N!'OW0[)8)8\\"K\  $& S[ SKg0@\     4  \?@ gNgOW0[\ )87\GK@ WG\ !WL' N'O7 0[7c[@gLg cK@@?Lgg mK PP"gN(gO70[G[ G[G[G[&@G)[G/[W0[ g \GLWWLG @'N'O0[Gm[N"O70['\)8)8 w\7\K i7 )8 N@ O7G\0[ @)87\)8 \K @  '@  \ WL'N'O'0[Gc[@gLg cK@@PPPPP?Lgg mK PP?W'N'O'0[gN @ggO 70['['[f'['[')['/[W0[G \@GLWLG wm[N@ O @NO7 0[`W0[\)8)8)8O \\K )8 G\)8W\@G\K' G 'c6E@"N OG0[)8 \G\KG 4i7G7\i7G7 X\[ i7     n  \@ g Ng O0[)8 \\G K W   N O0[N O)8\ w0[g\ K )8\ \K\@   N  O0[ 'N 'O )8  0[\'4 @ \ \ )8@ \ K   \ )8 \ K\ ` 4 @\\   \ Lg[][ @     Wp  \@ WL@' N'O' 0[wc[@gLg cK@@P?Lgg mK PP?W'N'O70[gN @9gO 70[G[G[fG[G[G)[G/[W0[g \@GLWL G m[ N @ O ' N"@' ONOB@ W0[ g0[ 0[@\ )8 )8 ` )8 'N'O? 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G  @ i7GY\i7 G  @WL' N'O 0[c[@gLg cKh@@?Lgg mK PP *\Ё[G6)8'H8@G 6gNA gO 0[& [[ [& [ )[ /[ 0[ \GLWL   e[i6% hN hO 0[   )8 \@ \ HK X G \    h6 \ GLL LLL  GL LL\G\ 7\G?W\P@\|'PP\GP?`\Pp\Q\\\\\G\7\\'\\\\ \G\ \ \\PP|P L \ 7 mK 7 cK@   i7 G X\ Y X\ i7 i7B G \ G @  G  gLg cK@@PPP?L$g$g mK PP | W " " W(8 G6@'N'O " G 6 'H870[ )8# 7"'H8"@$gN$gO-$70[G[ G[G[G[&G)[1\G/[ W0[g \GL 6?WL 0@8_)8 @ @66 6[G ["(6 6 6 \GLg\WLG7\  @"@666 @[G [(6 6 6 \GLg\WLG7\ ` 4k[!@7 gK@? m[?D\@\ G    G\m[` $6@0@8)8 @$'N$'O $g0[G\)8@G\KGW\@NOW0[G\)8G\"KG W\ i7GwY\[@'[@@` g\@$6@ k6\G!8@\2 6\W\\"'(8\w@\\\\W[\"7e6\JZ  GL L  L L L  GL L Lq_ L \\'|\\P?A\%'P%Q\|&%GP&%a\'&P?'&q\!'Q!'\!@\!\?"'e6@NW\G\W\%G\ &W\AN"Ge6 "We6%&W\"ge6 &G\%W\G\ "we6%W\G\"e[!K[%W\!%i\"e[  k[w\H8B\!I\G e[BL!!J\\! \\ G\G\ \\ \\ \w\ G\\ \ \ \c6 \| $6JPPPw\XPPPDP HPPP?P@PPP $6 \`\PP PP XPP`PPD8 H'H88We[(H8  \ `\  k[WL (H8 \PP L `LDL' N'Ow 0[c[ W\D\P?Pj@ i6{#e[!\#e6\#'e6 \"$gNDL$gO $70[)8\@ 7\GKW  $gN$gO'H8 DL$70[)8)87\'\B#GKW?$gND$gO'H8DL$70[)8)8 7\'\GK W Gb6)g6 @pP'H8)8D8$gN$gOP$70[)8GLWL'\L\1XY'@L8 L \%L8XL!@L DOc7LL L@LL DLL@L #LL  '@ % ?(!@\&8 >'\g\@@w\\@ @@g6$gN@L$gO@L$70[L'H8qTL)8LGL@LW LXLL \GLG\@#W LW\ @\@@\ @ P\ c6$gN$gO$70[)8GLWL@NLG\@L c6Lg\L\G@"@~@PP$$gL$g cK@PPH8G (8!H8(8h6  h6\7\@000@\8X\ @H8H8J6 J60@\@0 03@\@@0\2@\  H@0\2@\  H'@m[ m[2\2\  w \GPg \0Y\wYW Y YW Y YH8(8G\G\h6h\h \@ g6g\ KK@i[@m7[[\ @  Y e6@ YwX \ GH\D6g(\GG\ k[k[G\GG\G\@ @PP?Lgg mK PP"@?gNgO 70[[[&[[/[)[G0[g\@GLWL @NOw0[  [[ [& [ )[/[ 0[ \L  L  gLg cK @@?Lgg mK PP - W B1\ 'N 'O@ '0[gNtgO 70[& G[ G[ G[& G[ G)[ G/[  70[' \GL  WL   'N 'O 70[&W[W[W[&W[W)[W/[ 70[G\L L  G 0@8'4`kK4'\i7 G \  XL m[i7G-@   6B@ )8 6 W["@ w [  (6 6   6' \  6 GLw\ WL"[K[K\ 7\\\@ @ N  O g0[)8 k[)87\ g\ K@ G m[PDOG0\?4G\Gd[? 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0[ \L  L    gL ` G  g cK i7  G G @@PP?Lgg mK PP"@gNgO Ą70[G[G[fG[G[G)[G/[W0[g \G@GL WL  `'N'O G0[W[W[fW[W[W)[W/[G0[g\@ L L  !     gLG Li7 G\G >g cKG 7\@^W\  @@XL'L g"@ N O '0[W[W[&?W[W[ g mK&W)[W/[70[G\LPLG 1_ W 'N 'O G0[ m[J gN gO G0[ gL L'L&[[[ [ N O& )[/[ N  O  N O@70[W0[ 70[ ' \ G0[GL \)8 )8 )8WL\/)8   7\\K 4NOg0[)87\\"K 7\@\ K   g\  'N'Ow 0[)87\w\"K 7\@\GKW!  gN gO g0[k[ )8 7\g\ GK W  A'N 'O70[&W[W[W[&W[W )[W/[ 70[G\L  L   \ L\     @WL' N'O' 0[c[@ gL g cK@@L Li7G Li7`G L\  XLi7 GL i7G  \ L  L L WL '\  L  G   GL  WL       /        @P?Lg mK PP?W'N'O70[' mKNO WL70[  \  'O )8  )8\ 'N 0[ 7\ ' cK" K'\ \  @gL cK@@PPPPPLPPP@cuda-decoder-kernels.cucuda-decoder-kernels-utils.h!is_representative || extra_cost == 0.0fmain_q_idx >= 0 && main_q_idx < cst_dev_params.main_q_capacitytotal_n_extra_prev_tokens >= 0 && total_n_extra_prev_tokens <= main_q_endvoid kaldi::cuda_decoder::hashmap_insert_or_aggregate(kaldi::cuda_decoder::HashmapValueT *, int, int, int, int, int *, int *)void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = true]void kaldi::cuda_decoder::expand_arcs_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams) [with IS_EMITTING = false]void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step4_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)void kaldi::cuda_decoder::emitting_preprocess_and_list_extra_prev_tokens_step2_kernel(kaldi::cuda_decoder::DeviceParams, kaldi::cuda_decoder::KernelParams)inf_tok.prev_token >= (lane_counters->main_q_global_offset - cst_dev_params.main_q_capacity) && inf_tok.prev_token <= (lane_counters->main_q_global_offset + main_q_end)d_val@A9 9P a80)A9Ym,/9)ppHQpRDpXS~pT phLU= pXV5 p WpXp4XYp`Z)pX[ApD\p]pl`^p|_ pH`"pLaL$pxbS&pxc'pd%*pLe+p pf-p|g}/ph1pLi2pLj4phXk!6p0ln7pHmt8p8ne HpW pX (ZM p\ xp^8 9 Q(RZSTu U Vm V pWtWYPX%TX0Y Z5[\]| ^X_y!8 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V6XHF@cuda-decoder-kernels.cuELF3\FF@8@|.shstrtab.strtab.symtab.symtab_shndx.nv.info.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init.nv.global.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rela.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rel.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12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lIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.debug_frame.rel.debug_frame.shstrtab.strtab.symtab.symtab_shndx.nv.info_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.global.init__unnamed_1__unnamed_2__unnamed_3__unnamed_4__unnamed_5.nv.global_ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE$str$str1$str2$str3$str4$str5$str6.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.text._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.info._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.shared._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi.nv.constant0._ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32$_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm3x_div_rn_noftz_f32_slowpath.nv.constant0._ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE__assertfail$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up.rela.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up.rela.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan$_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE$_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset.nv.constant0._ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_idx$_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up.rel.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__5243.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up$___ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__4795.nv.constant0._ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rela.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm70_shflsync_up_p$___ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__4280.nv.constant0._ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.text._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.info._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb.nv.shared._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb$__cuda_sm20_div_rd_f32$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage__3659$___ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram__3661.nv.constant0._ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rela.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rel.text._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.info._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.shared._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rela.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.rel.text._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf.nv.constant0._ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_idx$_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up$_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up_p$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan__1876$___ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan__1878.nv.constant0._ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__1435.nv.constant0._ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up.rela.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE.rel.text._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage__953$___ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset__955.nv.constant0._ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_idx$_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE$__cuda_sm70_shflsync_up$___ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage__534.nv.constant0._ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.text._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.info._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.shared._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE.nv.constant0._ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.text._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.info._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.shared._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE.nv.constant0._ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZN3cub11EmptyKernelIvEEvv.text._ZN3cub11EmptyKernelIvEEvv.nv.info._ZN3cub11EmptyKernelIvEEvv.nv.shared._ZN3cub11EmptyKernelIvEEvv.nv.constant0._ZN3cub11EmptyKernelIvEEvv_SREG.debug_line.rel.debug_line.nv_debug_line_sass.rel.nv_debug_line_sass.nv_debug_ptx_txt.debug_frame.rel.debug_frameRPp`p~lp@xpppqq,pJ1p7p@)=pCpp?IpOp U4rS!57T6 U 7 V 8W"W0:"W9}X@r"XP#:QYsy"Y#pV;Z,< [= \:">@#]G$t$"]@d%"]'?(^)u2*"^_+@I,_X.A*/`0vp0"` l1B>2a 3wx3"a 4C5b6D7c9Ef:df<F6=e>x>"e5@>"e5@|?"e06AGAf.CH DgDyEIFhGz)H"hJJKiNL{L"i`@+M"i`NKNj0PLQkNRMSlVTNUm VOVnWPWoZXQXXXX2RSTc UV V@W #X$Y$Z[0 \"]((^+_ .` 1a$R5bA7c :d<e7AfCg cFh+Ki~NjPkRlTmgVnWo6 /local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/usr/local/cuda/include/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/../iterator/../local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../block/specializations/../../warp/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/usr/local/cuda/include/thrust/system/detail/sequential/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/src/cudadecoder/../cudadecoder/usr/include/c++/7/usr/include/c++/7/bits/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../thread/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/..cuda-decoder-kernels.cucuda_device_runtime_api.hrdevice_atomic_functions.hpp@sm_32_atomic_functions.hpp*util_device.cuhޛSblock_scan_raking.cuhޛblock_scan.cuhޛ¤warp_scan_shfl.cuhޛblock_reduce_warp_reductions.cuhޛLblock_reduce.cuhޛblock_histogram_sort.cuhޛ@block_histogram.cuhޛblock_radix_sort.cuh ޛƫblock_radix_rank.cuh ޛblock_scan_warp_scans.cuhޛblock_exchange.cuh ޛјexecution_policy.h cuda-decoder-common.h cmath move.h 3thread_scan.cuhޛRthread_reduce.cuhޛ/util_ptx.cuhޛcuda-decoder-kernels-utils.hG  0 ~ 0z 0  0 ~0z    0 ~ 0z 0  0 ~0z    0 #`u0y  ly]r5   $0]0{  qu 0yq qy0  R. S5   0~ }  g i {0{ 0{z zzzzz{x| k z  ~ ~~  || | | || }} } } }  ~~~0~0~0z~~~ z"0 Z0zz z z(S-}0  |-0S- S- v  0}~ {0  0~ }  g i {0{ 0{z zzzz wxx yr   z  ~ ~~  || | | || }} } } }  ~~~0~0~0z~~~ z"0 Z0zz z z(S-}0  |-0S- S- v  0}~ {0  t0 t  t t   z t v}    0t0 t   v t 0t  u  }t t   t   xxKs0   0u0 u 0~ u   0|  ~ w w  w}   x  u u c{&    0v  v u  u ~ v ~  } }0  `      ` ~ ~  F   } z    u lhu gix$0    0w   v v   } z0v  v  v  v w z0v yx  v 0 ~ ~0       F0  vw   u  ~   t 0    0w0w 0xww 0w  u0 00w  w  w  w   w00w0N02 P30 0y  v ~  wpppru  m  u0 0v:    0 ww0 w 0w  w ~>B>B> 00 u u *    x0y y z  x 0 0 x{  xx 00 x~w  0~ ~  o ~a   ~     ~~0 ~h    L70M3     w0h x v x v x v ~ {x~ xx x v x ~v~ ~0~  v v  vxx0x~  x~xxv  0v   H0:0   x0xx  x x    yy y 00w y0V*jmh0yw  y0w w ~ byw  y0s0 ~00v  w~bh;  zyy y0y ik y| }0 y0 0w xx00y #  0{i z{ u z~ ~0{z z}z0 0x y 0{ {{  }} } }}}} } } }}~~~    z~ ~~~~~ 0{0 z  ~   D< D 0z0x 0 z } }  }}}}}}}}}}}  }  }  }z  `      ` 0~~ ~F  0    z ~ z 0 ~ z~ ~ z z z ~~~ ~}0 zz yw   q y  ~  M3 M N0 y ~~   {0{y0~ y 0  0)   ~P~ 0~| v u0~~    t  0 ~ ~~ } 0} 0} 0}  ~0 | |0 ] | | I;  0 ~ rr ~  6B y   i n{  ~ ~  ~0         F" s  x }0 z0o~ w ~  ~0 0}   t {0  i~0  }}}} ` ` ~~~~~  z0~}~0~  y 0~  Y' Y h0)  0~~  ~ vt   0~~ ~  ut}0t 0 ~ ~~} ~~ ~~ ~ ~ ~  m  p    t0  s v   zzk yy   0}}} ~   M*  >E     0 >E        =E     0 <E        < wk0X an ;  w [ 0ny mk r  :{ n sw  z    ~0      y w y w  r l jb  ~  0 x  x  x  ]$      0      0 u  plh dl oo     ~ y      0 y  0omm  0   5{ n sw  z    0      y w y w kq!o w  v^   ~  0 x  x  x  ]$      0      0 u  plh dl oo     ~ y      0 y  0omm  0   0  y     } {   /}   y     p    omm  0 q usu u u u e$ i u w b h  omm  0 0 -~    ylys w zxz{ zzxz{  y  x       ,| j0 t  ~  0x s      | t0z rv_     z  om   0  (|  sw  z  w   z 0^ 0'x   j u0 0x s           0 x`0  w u w u v   z ~   %}  x  xs  t  m0  k k k  k0{00k  } z   0 omm  0    m  j  l  jvk$g        #~      u j  0no    0w snnn0   u  !{ #jr     n0yx y syu  z00  g0       0 ex j000 }    d     z  s~ ~0w    y0  z          r    )Z 0% ]xmqrvvyxx  u  ww]"0]s rw l0xqpu  Z z ~  u t | 0 w S05_! y oq j     oq  b"     5 ~  u  %T xxps   v 0 0z ~ 00  u  v  w |     ~0      y v x v  q k i 0 |  b"b"b"Z*^&b"b"b"b"Z*^i     0nnnnnnnjjjnnnnnjjjnnnnn jjknq+et   hw u u v z        j0   P4P4U0Q4U0Q4U0Q4U0Q4U0Q4P4P4P4U    ~     | tbce a ]$]'Y+U/M4I8E<APmP4PfG:FZ+9G:FNFJFFF>F>F>~G:v ~ w8]&hH g w t\vh.^r oliiv  {  0  s    x U  x  ov } q "t a  v0       f  t      x    0p   z  | m ux     |  0      xzz s d   } q  0  x  t     ss 0xv  .ru _g#  u vr   | | n0  w   0t  w|}} 0~  y   h  u vzy  mqfsf0  xn~   J  0z   I   v~0x 0  y  nx   p    y   |     kmW , R. xxL k G  tq x    ;.version 6.2.target sm_70.address_size 64.extern .func __assertfail(.param .b64 __assertfail_param_0,.param .b64 __assertfail_param_1,.param .b32 __assertfail_param_2,.param .b64 __assertfail_param_3,.param .b64 __assertfail_param_4);.global .align 16 .b8 __unnamed_1[126] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 104, 97, 115, 104, 109, 97, 112, 95, 105, 110, 115, 101, 114, 116, 95, 111, 114, 95, 97, 103, 103, 114, 101, 103, 97, 116, 101, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 72, 97, 115, 104, 109, 97, 112, 86, 97, 108, 117, 101, 84, 32, 42, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 44, 32, 105, 110, 116, 32, 42, 44, 32, 105, 110, 116, 32, 42, 41, 0};.global .align 16 .b8 __unnamed_2[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 50, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_3[156] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 109, 105, 116, 116, 105, 110, 103, 95, 112, 114, 101, 112, 114, 111, 99, 101, 115, 115, 95, 97, 110, 100, 95, 108, 105, 115, 116, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 95, 115, 116, 101, 112, 52, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 0};.global .align 16 .b8 __unnamed_4[141] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 116, 114, 117, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 16 .b8 __unnamed_5[142] = {118, 111, 105, 100, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 101, 120, 112, 97, 110, 100, 95, 97, 114, 99, 115, 95, 107, 101, 114, 110, 101, 108, 40, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 68, 101, 118, 105, 99, 101, 80, 97, 114, 97, 109, 115, 44, 32, 107, 97, 108, 100, 105, 58, 58, 99, 117, 100, 97, 95, 100, 101, 99, 111, 100, 101, 114, 58, 58, 75, 101, 114, 110, 101, 108, 80, 97, 114, 97, 109, 115, 41, 32, 91, 119, 105, 116, 104, 32, 73, 83, 95, 69, 77, 73, 84, 84, 73, 78, 71, 32, 61, 32, 102, 97, 108, 115, 101, 93, 0};.weak .shared .align 16 .b8 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan[2336];.weak .shared .align 4 .u32 _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset;.global .align 1 .b8 _ZN89_INTERNAL_67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf156thrust6system6detail10sequential3seqE[1];.global .align 16 .b8 $str[74] = {116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 62, 61, 32, 48, 32, 38, 38, 32, 116, 111, 116, 97, 108, 95, 110, 95, 101, 120, 116, 114, 97, 95, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 115, 32, 60, 61, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 0};.global .align 16 .b8 $str1[24] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 46, 99, 117, 0};.global .align 16 .b8 $str2[41] = {33, 105, 115, 95, 114, 101, 112, 114, 101, 115, 101, 110, 116, 97, 116, 105, 118, 101, 32, 124, 124, 32, 101, 120, 116, 114, 97, 95, 99, 111, 115, 116, 32, 61, 61, 32, 48, 46, 48, 102, 0};.global .align 16 .b8 $str3[169] = {105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 62, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 45, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 41, 32, 38, 38, 32, 105, 110, 102, 95, 116, 111, 107, 46, 112, 114, 101, 118, 95, 116, 111, 107, 101, 110, 32, 60, 61, 32, 40, 108, 97, 110, 101, 95, 99, 111, 117, 110, 116, 101, 114, 115, 45, 62, 109, 97, 105, 110, 95, 113, 95, 103, 108, 111, 98, 97, 108, 95, 111, 102, 102, 115, 101, 116, 32, 43, 32, 109, 97, 105, 110, 95, 113, 95, 101, 110, 100, 41, 0};.global .align 16 .b8 $str4[63] = {109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 62, 61, 32, 48, 32, 38, 38, 32, 109, 97, 105, 110, 95, 113, 95, 105, 100, 120, 32, 60, 32, 99, 115, 116, 95, 100, 101, 118, 95, 112, 97, 114, 97, 109, 115, 46, 109, 97, 105, 110, 95, 113, 95, 99, 97, 112, 97, 99, 105, 116, 121, 0};.global .align 8 .b8 $str5[6] = {100, 95, 118, 97, 108, 0};.global .align 16 .b8 $str6[29] = {99, 117, 100, 97, 45, 100, 101, 99, 111, 100, 101, 114, 45, 107, 101, 114, 110, 101, 108, 115, 45, 117, 116, 105, 108, 115, 46, 104, 0};.visible .entry _ZN3cub11EmptyKernelIvEEvv(){ret;}.visible .entry _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .b32 %r<21>;.reg .b64 %rd<11>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0;mov.u64 %rd1, %rd4;mov.u32 %r19, %ctaid.y;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_param_0+304];setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB1_6;ld.param.u32 %r3, [%rd1+392];mov.u32 %r11, %ntid.x;mov.u32 %r12, %ctaid.x;mov.u32 %r13, %tid.x;mad.lo.s32 %r4, %r11, %r12, %r13;mov.u32 %r5, %nctaid.y;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r6, %r14, %r11;BB1_2:setp.ge.s32 %p2, %r4, %r3;@%p2 bra BB1_5;ld.param.u64 %rd5, [%rd1+160];cvta.to.global.u64 %rd2, %rd5;ld.param.u32 %r15, [%rd1+168];mul.lo.s32 %r16, %r15, %r19;cvt.s64.s32 %rd3, %r16;mov.u32 %r20, %r4;BB1_4:cvt.s64.s32 %rd6, %r20;add.s64 %rd7, %rd3, %rd6;shl.b64 %rd8, %rd7, 4;add.s64 %rd9, %rd2, %rd8;mov.u32 %r17, 0;mov.u32 %r18, -1;st.global.v2.u32 [%rd9], {%r18, %r17};mov.u64 %rd10, -1;st.global.u64 [%rd9+8], %rd10;add.s32 %r20, %r6, %r20;setp.lt.s32 %p3, %r20, %r3;@%p3 bra BB1_4;BB1_5:add.s32 %r19, %r5, %r19;setp.lt.s32 %p4, %r19, %r2;@%p4 bra BB1_2;BB1_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0[408]){.reg .pred %p<5>;.reg .f32 %f<4>;.reg .b32 %r<17>;.reg .b64 %rd<7>;ld.param.u64 %rd1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+16];cvta.to.global.u64 %rd2, %rd1;mov.u32 %r1, 1;mov.u32 %r2, 0;st.global.v2.u32 [%rd2+24], {%r2, %r2};st.global.v2.u32 [%rd2+32], {%r2, %r1};st.global.u32 [%rd2+56], %r2;st.global.u32 [%rd2+52], %r2;st.global.v2.u32 [%rd2+40], {%r2, %r2};ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+372];mov.b32 %r3, %f1;setp.gt.s32 %p1, %r3, -1;xor.b32 %r4, %r3, 2147483647;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+388];setp.gt.s32 %p2, %r5, -1;xor.b32 %r6, %r5, 2147483647;selp.b32 %r7, %r5, %r6, %p2;selp.b32 %r8, %r3, %r4, %p1;st.global.v2.u32 [%rd2+64], {%r7, %r8};st.global.v2.u32 [%rd2+16], {%r2, %r2};st.global.u32 [%rd2+128], %r2;ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+128];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r9, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+384];setp.gt.s32 %p3, %r7, -1;xor.b32 %r10, %r7, 2147483647;selp.b32 %r11, %r7, %r10, %p3;mov.b32 %f2, %r11;add.f32 %f3, %f1, %f2;mov.b32 %r12, %f3;setp.gt.s32 %p4, %r12, -1;xor.b32 %r13, %r12, 2147483647;selp.b32 %r14, %r12, %r13, %p4;st.global.u32 [%rd2+80], %r14;st.global.v2.u32 [%rd4], {%r9, %r7};ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_param_0+144];cvta.to.global.u64 %rd6, %rd5;mov.u32 %r15, -1;mov.u32 %r16, -2147483648;st.global.v2.u32 [%rd6], {%r16, %r15};ret;}.visible .entry _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<38>;.reg .b64 %rd<47>;mov.b64 %rd11, _ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r5, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u64 %rd1, %rd11;ld.param.u64 %rd12, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0];cvta.to.global.u64 %rd2, %rd12;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+8];ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0+380];mul.lo.s32 %r17, %r1, %r2;mul.wide.s32 %rd13, %r17, 40;add.s64 %rd14, %rd2, %rd13;add.s64 %rd3, %rd14, 4;ld.global.u32 %r3, [%rd14+4];mov.u32 %r36, %ctaid.y;setp.ge.s32 %p1, %r36, %r5;@%p1 bra BB3_8;mov.u32 %r18, %ctaid.x;mov.u32 %r19, %ntid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r6, %r19, %r18, %r20;mov.u32 %r7, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r8, %r21, %r19;BB3_2:setp.ge.s32 %p2, %r6, %r3;@%p2 bra BB3_7;ld.param.u64 %rd15, [%rd1+16];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r22, [%rd1+24];mul.lo.s32 %r23, %r22, %r36;mul.wide.s32 %rd17, %r23, 136;add.s64 %rd4, %rd16, %rd17;ld.param.u64 %rd18, [%rd1+48];cvta.to.global.u64 %rd5, %rd18;ld.param.u32 %r10, [%rd1+56];mul.lo.s32 %r24, %r10, %r2;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd19, [%rd1+64];cvta.to.global.u64 %rd7, %rd19;ld.param.u32 %r11, [%rd1+72];mul.lo.s32 %r25, %r11, %r2;cvt.s64.s32 %rd8, %r25;ld.param.u64 %rd20, [%rd1+80];cvta.to.global.u64 %rd9, %rd20;ld.param.u32 %r12, [%rd1+88];mul.lo.s32 %r26, %r12, %r2;cvt.s64.s32 %rd10, %r26;mov.u32 %r37, %r6;BB3_4:ld.global.u32 %r14, [%rd4];mul.lo.s32 %r27, %r10, %r14;cvt.s64.s32 %rd21, %r27;cvt.s64.s32 %rd22, %r37;add.s64 %rd23, %rd21, %rd22;shl.b64 %rd24, %rd23, 3;add.s64 %rd25, %rd5, %rd24;add.s64 %rd26, %rd6, %rd22;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd5, %rd27;ld.global.u64 %rd29, [%rd28];st.global.u64 [%rd25], %rd29;add.s64 %rd30, %rd8, %rd22;shl.b64 %rd31, %rd30, 2;add.s64 %rd32, %rd7, %rd31;ld.global.u32 %r28, [%rd32];mul.lo.s32 %r29, %r11, %r14;cvt.s64.s32 %rd33, %r29;add.s64 %rd34, %rd33, %rd22;shl.b64 %rd35, %rd34, 2;add.s64 %rd36, %rd7, %rd35;st.global.u32 [%rd36], %r28;add.s64 %rd37, %rd10, %rd22;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd9, %rd38;ld.global.u32 %r30, [%rd39];mul.lo.s32 %r31, %r12, %r14;cvt.s64.s32 %rd40, %r31;add.s64 %rd41, %rd40, %rd22;shl.b64 %rd42, %rd41, 2;add.s64 %rd43, %rd9, %rd42;st.global.u32 [%rd43], %r30;setp.ne.s32 %p3, %r37, 0;@%p3 bra BB3_6;mul.lo.s32 %r32, %r1, %r14;mul.wide.s32 %rd44, %r32, 40;add.s64 %rd45, %rd2, %rd44;ld.global.u64 %rd46, [%rd3+-4];st.global.u64 [%rd45], %rd46;ld.global.u32 %r33, [%rd3+4];mov.u32 %r34, 0;st.global.v2.u32 [%rd45+8], {%r33, %r34};ld.param.u32 %r35, [%rd1+372];st.global.v2.u32 [%rd45+16], {%r34, %r35};BB3_6:add.s32 %r37, %r8, %r37;setp.lt.s32 %p4, %r37, %r3;@%p4 bra BB3_4;BB3_7:add.s32 %r36, %r7, %r36;setp.lt.s32 %p5, %r36, %r5;@%p5 bra BB3_2;BB3_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<23>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r22, %ctaid.y;setp.ge.s32 %p1, %r22, %r2;@%p1 bra BB4_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB4_2:mul.lo.s32 %r9, %r3, %r22;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r10, [%rd8];mul.lo.s32 %r11, %r4, %r10;mul.wide.s32 %rd9, %r11, 40;add.s64 %rd10, %rd2, %rd9;ld.global.u64 %rd11, [%rd10];st.global.u64 [%rd8+16], %rd11;ld.global.v2.u32 {%r12, %r13}, [%rd10+16];ld.global.v2.u32 {%r14, %r15}, [%rd10+8];st.global.u32 [%rd8+40], %r14;setp.gt.s32 %p2, %r13, -1;xor.b32 %r18, %r13, 2147483647;selp.b32 %r19, %r13, %r18, %p2;st.global.u32 [%rd8+68], %r19;st.global.v2.u32 [%rd8+72], {%r19, %r5};st.global.v2.u32 [%rd8+56], {%r15, %r12};add.s32 %r22, %r6, %r22;setp.lt.s32 %p3, %r22, %r2;@%p3 bra BB4_2;BB4_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<4>;.reg .b32 %r<20>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r19, %ctaid.y;setp.ge.s32 %p1, %r19, %r2;@%p1 bra BB5_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+8];mov.u32 %r5, %nctaid.y;BB5_2:mul.lo.s32 %r8, %r3, %r19;mul.wide.s32 %rd7, %r8, 136;add.s64 %rd8, %rd1, %rd7;ld.global.u32 %r9, [%rd8];mul.lo.s32 %r10, %r4, %r9;mul.wide.s32 %rd9, %r10, 40;ld.global.v2.u32 {%r11, %r12}, [%rd8+56];add.s64 %rd10, %rd2, %rd9;st.global.u32 [%rd10+12], %r11;st.global.u32 [%rd10+16], %r12;ld.global.u64 %rd11, [%rd8+16];st.global.u64 [%rd10], %rd11;ld.global.u32 %r15, [%rd8+40];ld.global.u32 %r16, [%rd8+68];st.global.u32 [%rd10+8], %r15;setp.gt.s32 %p2, %r16, -1;xor.b32 %r17, %r16, 2147483647;selp.b32 %r18, %r16, %r17, %p2;st.global.u32 [%rd10+20], %r18;add.s32 %r19, %r5, %r19;setp.lt.s32 %p3, %r19, %r2;@%p3 bra BB5_2;BB5_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<13>;.reg .b32 %r<414>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[4640];mov.b64 %rd2, _ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r4, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r1, %ntid.x;mov.u32 %r32, %ctaid.x;mul.lo.s32 %r407, %r1, %r32;mov.u32 %r3, %tid.x;add.s32 %r5, %r4, 1;setp.ge.s32 %p1, %r407, %r5;@%p1 bra BB6_10;mov.u64 %rd1, %rd2;shr.u32 %r36, %r3, 3;add.s32 %r37, %r36, %r3;mov.u32 %r38, %nctaid.x;mul.lo.s32 %r6, %r38, %r1;shl.b32 %r39, %r37, 4;mov.u32 %r40, _ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r7, %r40, %r39;mul.lo.s32 %r41, %r3, 9;shl.b32 %r42, %r41, 4;add.s32 %r8, %r40, %r42;mov.u32 %r35, 0;mov.u32 %r51, %laneid;mov.u32 %r408, %r35;mov.u32 %r409, %r35;mov.u32 %r410, %r35;BB6_2:ld.param.u32 %r406, [_ZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];add.s32 %r13, %r407, %r3;setp.ge.s32 %p2, %r13, %r406;mov.u32 %r411, %r35;mov.u32 %r412, %r35;mov.u32 %r413, %r35;@%p2 bra BB6_4;ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r46, [%rd1+24];mul.lo.s32 %r47, %r46, %r13;mul.wide.s32 %rd5, %r47, 136;add.s64 %rd6, %rd4, %rd5;ld.global.u32 %r413, [%rd6+20];ld.global.v2.u32 {%r411, %r412}, [%rd6+40];BB6_4:st.shared.v4.u32 [%r7+16], {%r413, %r412, %r411, %r35};bar.sync 0;setp.gt.u32 %p3, %r3, 31;@%p3 bra BB6_7;ld.shared.v4.u32 {%r192, %r193, %r194, %r195}, [%r8+32];ld.shared.v4.u32 {%r200, %r201, %r202, %r203}, [%r8+16];add.s32 %r208, %r192, %r200;add.s32 %r209, %r193, %r201;add.s32 %r210, %r194, %r202;add.s32 %r211, %r195, %r203;ld.shared.v4.u32 {%r212, %r213, %r214, %r215}, [%r8+48];add.s32 %r220, %r208, %r212;add.s32 %r221, %r209, %r213;add.s32 %r222, %r210, %r214;add.s32 %r223, %r211, %r215;ld.shared.v4.u32 {%r224, %r225, %r226, %r227}, [%r8+64];add.s32 %r232, %r220, %r224;add.s32 %r233, %r221, %r225;add.s32 %r234, %r222, %r226;add.s32 %r235, %r223, %r227;ld.shared.v4.u32 {%r236, %r237, %r238, %r239}, [%r8+80];add.s32 %r244, %r232, %r236;add.s32 %r245, %r233, %r237;add.s32 %r246, %r234, %r238;add.s32 %r247, %r235, %r239;ld.shared.v4.u32 {%r248, %r249, %r250, %r251}, [%r8+96];add.s32 %r256, %r244, %r248;add.s32 %r257, %r245, %r249;add.s32 %r258, %r246, %r250;add.s32 %r259, %r247, %r251;ld.shared.v4.u32 {%r260, %r261, %r262, %r263}, [%r8+112];add.s32 %r268, %r256, %r260;add.s32 %r269, %r257, %r261;add.s32 %r270, %r258, %r262;add.s32 %r271, %r259, %r263;ld.shared.v4.u32 {%r272, %r273, %r274, %r275}, [%r8+128];add.s32 %r53, %r268, %r272;add.s32 %r58, %r269, %r273;add.s32 %r63, %r270, %r274;add.s32 %r68, %r271, %r275;mov.u32 %r189, 1;mov.u32 %r190, 0;mov.u32 %r191, -1;shfl.sync.up.b32 %r52, %r53, %r189, %r190, %r191;shfl.sync.up.b32 %r57, %r58, %r189, %r190, %r191;shfl.sync.up.b32 %r62, %r63, %r189, %r190, %r191;shfl.sync.up.b32 %r67, %r68, %r189, %r190, %r191;setp.lt.s32 %p4, %r51, 1;selp.b32 %r280, 0, %r52, %p4;add.s32 %r73, %r280, %r53;selp.b32 %r281, 0, %r57, %p4;add.s32 %r78, %r281, %r58;selp.b32 %r282, 0, %r62, %p4;add.s32 %r83, %r282, %r63;selp.b32 %r283, 0, %r67, %p4;add.s32 %r88, %r283, %r68;mov.u32 %r89, 2;shfl.sync.up.b32 %r72, %r73, %r89, %r190, %r191;shfl.sync.up.b32 %r77, %r78, %r89, %r190, %r191;shfl.sync.up.b32 %r82, %r83, %r89, %r190, %r191;shfl.sync.up.b32 %r87, %r88, %r89, %r190, %r191;setp.lt.s32 %p5, %r51, 2;selp.b32 %r284, 0, %r72, %p5;add.s32 %r93, %r284, %r73;selp.b32 %r285, 0, %r77, %p5;add.s32 %r98, %r285, %r78;selp.b32 %r286, 0, %r82, %p5;add.s32 %r103, %r286, %r83;selp.b32 %r287, 0, %r87, %p5;add.s32 %r108, %r287, %r88;mov.u32 %r109, 4;shfl.sync.up.b32 %r92, %r93, %r109, %r190, %r191;shfl.sync.up.b32 %r97, %r98, %r109, %r190, %r191;shfl.sync.up.b32 %r102, %r103, %r109, %r190, %r191;shfl.sync.up.b32 %r107, %r108, %r109, %r190, %r191;setp.lt.s32 %p6, %r51, 4;selp.b32 %r288, 0, %r92, %p6;add.s32 %r113, %r288, %r93;selp.b32 %r289, 0, %r97, %p6;add.s32 %r118, %r289, %r98;selp.b32 %r290, 0, %r102, %p6;add.s32 %r123, %r290, %r103;selp.b32 %r291, 0, %r107, %p6;add.s32 %r128, %r291, %r108;mov.u32 %r129, 8;shfl.sync.up.b32 %r112, %r113, %r129, %r190, %r191;shfl.sync.up.b32 %r117, %r118, %r129, %r190, %r191;shfl.sync.up.b32 %r122, %r123, %r129, %r190, %r191;shfl.sync.up.b32 %r127, %r128, %r129, %r190, %r191;setp.lt.s32 %p7, %r51, 8;selp.b32 %r292, 0, %r112, %p7;add.s32 %r133, %r292, %r113;selp.b32 %r293, 0, %r117, %p7;add.s32 %r138, %r293, %r118;selp.b32 %r294, 0, %r122, %p7;add.s32 %r143, %r294, %r123;selp.b32 %r295, 0, %r127, %p7;add.s32 %r148, %r295, %r128;mov.u32 %r149, 16;shfl.sync.up.b32 %r132, %r133, %r149, %r190, %r191;shfl.sync.up.b32 %r137, %r138, %r149, %r190, %r191;shfl.sync.up.b32 %r142, %r143, %r149, %r190, %r191;shfl.sync.up.b32 %r147, %r148, %r149, %r190, %r191;setp.lt.s32 %p8, %r51, 16;selp.b32 %r296, 0, %r132, %p8;add.s32 %r173, %r296, %r133;selp.b32 %r297, 0, %r137, %p8;add.s32 %r178, %r297, %r138;selp.b32 %r298, 0, %r142, %p8;add.s32 %r183, %r298, %r143;selp.b32 %r299, 0, %r147, %p8;add.s32 %r188, %r299, %r148;mov.u32 %r170, 31;shfl.sync.idx.b32 %r152, %r173, %r170, %r170, %r191;shfl.sync.idx.b32 %r157, %r178, %r170, %r170, %r191;shfl.sync.idx.b32 %r162, %r183, %r170, %r170, %r191;shfl.sync.idx.b32 %r167, %r188, %r170, %r170, %r191;shfl.sync.up.b32 %r172, %r173, %r189, %r190, %r191;shfl.sync.up.b32 %r177, %r178, %r189, %r190, %r191;shfl.sync.up.b32 %r182, %r183, %r189, %r190, %r191;shfl.sync.up.b32 %r187, %r188, %r189, %r190, %r191;setp.eq.s32 %p9, %r51, 0;ld.shared.v4.u32 {%r300, %r301, %r302, %r303}, [%r8+16];ld.shared.v4.u32 {%r308, %r309, %r310, %r311}, [%r8+32];ld.shared.v4.u32 {%r316, %r317, %r318, %r319}, [%r8+48];ld.shared.v4.u32 {%r324, %r325, %r326, %r327}, [%r8+64];ld.shared.v4.u32 {%r332, %r333, %r334, %r335}, [%r8+80];ld.shared.v4.u32 {%r340, %r341, %r342, %r343}, [%r8+96];ld.shared.v4.u32 {%r348, %r349, %r350, %r351}, [%r8+112];selp.b32 %r356, 0, %r172, %p9;selp.b32 %r357, 0, %r177, %p9;selp.b32 %r358, 0, %r182, %p9;selp.b32 %r359, 0, %r187, %p9;st.shared.v4.u32 [%r8+16], {%r356, %r357, %r358, %r359};add.s32 %r360, %r303, %r359;add.s32 %r361, %r302, %r358;add.s32 %r362, %r301, %r357;add.s32 %r363, %r300, %r356;st.shared.v4.u32 [%r8+32], {%r363, %r362, %r361, %r360};add.s32 %r364, %r311, %r360;add.s32 %r365, %r310, %r361;add.s32 %r366, %r309, %r362;add.s32 %r367, %r308, %r363;st.shared.v4.u32 [%r8+48], {%r367, %r366, %r365, %r364};add.s32 %r368, %r319, %r364;add.s32 %r369, %r318, %r365;add.s32 %r370, %r317, %r366;add.s32 %r371, %r316, %r367;st.shared.v4.u32 [%r8+64], {%r371, %r370, %r369, %r368};add.s32 %r372, %r327, %r368;add.s32 %r373, %r326, %r369;add.s32 %r374, %r325, %r370;add.s32 %r375, %r324, %r371;st.shared.v4.u32 [%r8+80], {%r375, %r374, %r373, %r372};add.s32 %r376, %r335, %r372;add.s32 %r377, %r334, %r373;add.s32 %r378, %r333, %r374;add.s32 %r379, %r332, %r375;st.shared.v4.u32 [%r8+96], {%r379, %r378, %r377, %r376};add.s32 %r380, %r343, %r376;add.s32 %r381, %r342, %r377;add.s32 %r382, %r341, %r378;add.s32 %r383, %r340, %r379;st.shared.v4.u32 [%r8+112], {%r383, %r382, %r381, %r380};add.s32 %r384, %r351, %r380;add.s32 %r385, %r350, %r381;add.s32 %r386, %r349, %r382;add.s32 %r387, %r348, %r383;st.shared.v4.u32 [%r8+128], {%r387, %r386, %r385, %r384};setp.ne.s32 %p10, %r3, 0;@%p10 bra BB6_7;st.shared.v4.u32 [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624], {%r152, %r157, %r162, %r167};BB6_7:bar.sync 0;ld.shared.v4.u32 {%r388, %r389, %r390, %r391}, [_ZZN5kaldi12cuda_decoder27compute_lane_offsets_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+4624];setp.ge.s32 %p11, %r13, %r5;@%p11 bra BB6_9;ld.shared.v4.u32 {%r392, %r393, %r394, %r395}, [%r7+16];add.s32 %r399, %r392, %r408;ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r400, [%rd1+24];mul.lo.s32 %r401, %r400, %r13;ld.param.u64 %rd9, [%rd1+32];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r402, [%rd1+40];mul.lo.s32 %r403, %r402, %r13;mul.wide.s32 %rd11, %r401, 136;add.s64 %rd12, %rd8, %rd11;st.global.u32 [%rd12+100], %r399;mul.wide.s32 %rd13, %r403, 136;add.s64 %rd14, %rd10, %rd13;add.s32 %r404, %r394, %r410;add.s32 %r405, %r393, %r409;st.global.v2.u32 [%rd12+104], {%r405, %r404};st.global.u32 [%rd14+100], %r399;st.global.v2.u32 [%rd14+104], {%r405, %r404};BB6_9:bar.sync 0;add.s32 %r407, %r6, %r407;setp.lt.s32 %p12, %r407, %r5;add.s32 %r410, %r390, %r410;add.s32 %r409, %r389, %r409;add.s32 %r408, %r388, %r408;@%p12 bra BB6_2;BB6_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<23>;.reg .f32 %f<6>;.reg .b32 %r<269>;.reg .b64 %rd<73>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];.shared .align 8 .b8 _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset[8];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r257, %ctaid.y;setp.ge.s32 %p2, %r257, %r2;@%p2 bra BB7_20;mov.u64 %rd1, %rd8;mov.u32 %r43, %ntid.x;mov.u32 %r44, %ctaid.x;mul.lo.s32 %r3, %r43, %r44;mov.u32 %r5, %tid.x;shr.u32 %r45, %r5, 3;add.s32 %r46, %r45, %r5;mov.u32 %r47, %nctaid.x;mul.lo.s32 %r7, %r47, %r43;shl.b32 %r48, %r46, 3;mov.u32 %r49, _ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r49, %r48;mul.lo.s32 %r50, %r5, 9;shl.b32 %r51, %r50, 3;add.s32 %r9, %r49, %r51;add.s64 %rd3, %rd1, 304;mov.u32 %r63, %laneid;BB7_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r52, [%rd1+24];mul.lo.s32 %r53, %r52, %r257;cvt.s64.s32 %rd5, %r53;mul.wide.s32 %rd10, %r53, 136;add.s64 %rd11, %rd4, %rd10;add.s64 %rd6, %rd11, 36;ld.global.u32 %r13, [%rd11+36];setp.ge.s32 %p3, %r3, %r13;@%p3 bra BB7_19;ld.global.u32 %r14, [%rd6+44];mul.lo.s64 %rd12, %rd5, 136;add.s64 %rd13, %rd4, %rd12;add.s64 %rd7, %rd13, 24;mov.u32 %r262, %r3;BB7_4:ld.global.u32 %r18, [%rd6+-36];add.s32 %r19, %r262, %r5;mov.u32 %r264, -1;mov.u32 %r263, 0;setp.ge.s32 %p4, %r19, %r13;@%p4 bra BB7_7;add.s32 %r253, %r262, %r5;ld.param.u64 %rd14, [%rd1+128];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r58, [%rd1+136];mul.lo.s32 %r59, %r58, %r257;cvt.s64.s32 %rd16, %r59;cvt.s64.s32 %rd17, %r253;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 3;add.s64 %rd20, %rd15, %rd19;ld.global.v2.u32 {%r265, %r266}, [%rd20];setp.ge.s32 %p5, %r266, %r14;@%p5 bra BB7_7;ld.param.u64 %rd21, [%rd1+352];cvta.to.global.u64 %rd22, %rd21;mul.wide.s32 %rd23, %r265, 4;add.s64 %rd24, %rd22, %rd23;ld.global.u32 %r62, [%rd24+4];ld.global.u32 %r264, [%rd24];sub.s32 %r263, %r62, %r264;BB7_7:setp.ne.s32 %p6, %r264, -1;selp.u32 %r28, 1, 0, %p6;st.shared.v2.u32 [%r8+16], {%r263, %r28};bar.sync 0;setp.gt.u32 %p7, %r5, 31;@%p7 bra BB7_9;ld.shared.v2.u32 {%r124, %r125}, [%r9+24];ld.shared.v2.u32 {%r128, %r129}, [%r9+16];add.s32 %r132, %r124, %r128;add.s32 %r133, %r125, %r129;ld.shared.v2.u32 {%r134, %r135}, [%r9+32];add.s32 %r138, %r132, %r134;add.s32 %r139, %r133, %r135;ld.shared.v2.u32 {%r140, %r141}, [%r9+40];add.s32 %r144, %r138, %r140;add.s32 %r145, %r139, %r141;ld.shared.v2.u32 {%r146, %r147}, [%r9+48];add.s32 %r150, %r144, %r146;add.s32 %r151, %r145, %r147;ld.shared.v2.u32 {%r152, %r153}, [%r9+56];add.s32 %r156, %r150, %r152;add.s32 %r157, %r151, %r153;ld.shared.v2.u32 {%r158, %r159}, [%r9+64];add.s32 %r162, %r156, %r158;add.s32 %r163, %r157, %r159;ld.shared.v2.u32 {%r164, %r165}, [%r9+72];add.s32 %r65, %r162, %r164;add.s32 %r70, %r163, %r165;mov.u32 %r121, 1;mov.u32 %r122, 0;mov.u32 %r123, -1;shfl.sync.up.b32 %r64, %r65, %r121, %r122, %r123;shfl.sync.up.b32 %r69, %r70, %r121, %r122, %r123;setp.lt.s32 %p8, %r63, 1;selp.b32 %r168, 0, %r64, %p8;add.s32 %r75, %r168, %r65;selp.b32 %r169, 0, %r69, %p8;add.s32 %r80, %r169, %r70;mov.u32 %r81, 2;shfl.sync.up.b32 %r74, %r75, %r81, %r122, %r123;shfl.sync.up.b32 %r79, %r80, %r81, %r122, %r123;setp.lt.s32 %p9, %r63, 2;selp.b32 %r170, 0, %r74, %p9;add.s32 %r85, %r170, %r75;selp.b32 %r171, 0, %r79, %p9;add.s32 %r90, %r171, %r80;mov.u32 %r91, 4;shfl.sync.up.b32 %r84, %r85, %r91, %r122, %r123;shfl.sync.up.b32 %r89, %r90, %r91, %r122, %r123;setp.lt.s32 %p10, %r63, 4;selp.b32 %r172, 0, %r84, %p10;add.s32 %r95, %r172, %r85;selp.b32 %r173, 0, %r89, %p10;add.s32 %r100, %r173, %r90;mov.u32 %r101, 8;shfl.sync.up.b32 %r94, %r95, %r101, %r122, %r123;shfl.sync.up.b32 %r99, %r100, %r101, %r122, %r123;setp.lt.s32 %p11, %r63, 8;selp.b32 %r174, 0, %r94, %p11;add.s32 %r105, %r174, %r95;selp.b32 %r175, 0, %r99, %p11;add.s32 %r110, %r175, %r100;mov.u32 %r111, 16;shfl.sync.up.b32 %r104, %r105, %r111, %r122, %r123;shfl.sync.up.b32 %r109, %r110, %r111, %r122, %r123;setp.lt.s32 %p12, %r63, 16;selp.b32 %r176, 0, %r104, %p12;add.s32 %r115, %r176, %r105;selp.b32 %r177, 0, %r109, %p12;add.s32 %r120, %r177, %r110;shfl.sync.up.b32 %r114, %r115, %r121, %r122, %r123;shfl.sync.up.b32 %r119, %r120, %r121, %r122, %r123;setp.eq.s32 %p13, %r63, 0;ld.shared.v2.u32 {%r178, %r179}, [%r9+16];ld.shared.v2.u32 {%r182, %r183}, [%r9+24];ld.shared.v2.u32 {%r186, %r187}, [%r9+32];ld.shared.v2.u32 {%r190, %r191}, [%r9+40];ld.shared.v2.u32 {%r194, %r195}, [%r9+48];ld.shared.v2.u32 {%r198, %r199}, [%r9+56];ld.shared.v2.u32 {%r202, %r203}, [%r9+64];selp.b32 %r206, 0, %r114, %p13;selp.b32 %r207, 0, %r119, %p13;st.shared.v2.u32 [%r9+16], {%r206, %r207};add.s32 %r208, %r179, %r207;add.s32 %r209, %r178, %r206;st.shared.v2.u32 [%r9+24], {%r209, %r208};add.s32 %r210, %r183, %r208;add.s32 %r211, %r182, %r209;st.shared.v2.u32 [%r9+32], {%r211, %r210};add.s32 %r212, %r187, %r210;add.s32 %r213, %r186, %r211;st.shared.v2.u32 [%r9+40], {%r213, %r212};add.s32 %r214, %r191, %r212;add.s32 %r215, %r190, %r213;st.shared.v2.u32 [%r9+48], {%r215, %r214};add.s32 %r216, %r195, %r214;add.s32 %r217, %r194, %r215;st.shared.v2.u32 [%r9+56], {%r217, %r216};add.s32 %r218, %r199, %r216;add.s32 %r219, %r198, %r217;st.shared.v2.u32 [%r9+64], {%r219, %r218};add.s32 %r220, %r203, %r218;add.s32 %r221, %r202, %r219;st.shared.v2.u32 [%r9+72], {%r221, %r220};BB7_9:mov.u32 %r251, %ntid.x;add.s32 %r250, %r251, -1;setp.eq.s32 %p1, %r5, %r250;bar.sync 0;ld.shared.v2.u32 {%r222, %r223}, [%r8+16];@!%p1 bra BB7_13;bra.uni BB7_10;BB7_10:setp.ne.s32 %p22, %r264, -1;selp.u32 %r256, 1, 0, %p22;add.s32 %r31, %r223, %r256;atom.global.add.u32 %r224, [%rd7], %r31;add.s32 %r225, %r224, %r31;ld.param.u32 %r32, [%rd3+4];setp.lt.s32 %p14, %r225, %r32;@%p14 bra BB7_12;bra.uni BB7_11;BB7_12:add.s64 %rd25, %rd7, -8;add.s32 %r228, %r222, %r263;mov.b64 %rd26, {%r228, %r31};atom.global.add.u64 %rd27, [%rd25], %rd26;mov.b64 {%r229, %r230}, %rd27;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset], {%r229, %r230};bra.uni BB7_13;BB7_11:ld.global.u32 %r226, [%rd6+12];or.b32 %r227, %r226, 1;st.global.u32 [%rd6+12], %r227;st.shared.u32 [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4], %r32;BB7_13:bar.sync 0;ld.param.u32 %r231, [%rd3+4];ld.shared.u32 %r33, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset+4];setp.eq.s32 %p15, %r33, %r231;@%p15 bra BB7_19;setp.eq.s32 %p16, %r264, -1;@%p16 bra BB7_18;add.s32 %r252, %r262, %r5;ld.global.u32 %r232, [%rd6+16];setp.ne.s32 %p17, %r232, 0;ld.param.u64 %rd28, [%rd1+144];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r233, [%rd1+152];mul.lo.s32 %r234, %r233, %r257;cvt.s64.s32 %rd30, %r234;cvt.s64.s32 %rd31, %r252;add.s64 %rd32, %rd30, %rd31;shl.b64 %rd33, %rd32, 3;add.s64 %rd34, %rd29, %rd33;ld.global.v2.u32 {%r235, %r236}, [%rd34];add.s32 %r36, %r33, %r223;setp.eq.s32 %p18, %r236, -1;mov.f32 %f5, 0f00000000;or.pred %p19, %p17, %p18;@%p19 bra BB7_17;ld.param.u64 %rd35, [%rd1+336];cvta.to.global.u64 %rd36, %rd35;mul.wide.s32 %rd37, %r236, 4;add.s64 %rd38, %rd36, %rd37;ld.global.u32 %r237, [%rd38];ld.global.u64 %rd39, [%rd6+-28];mul.wide.s32 %rd40, %r237, 4;add.s64 %rd41, %rd39, %rd40;ld.f32 %f4, [%rd41];neg.f32 %f5, %f4;BB7_17:ld.param.u64 %rd42, [%rd1+112];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r238, [%rd1+120];mul.lo.s32 %r239, %r238, %r257;cvt.s64.s32 %rd44, %r239;cvt.s64.s32 %rd45, %r36;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 3;add.s64 %rd48, %rd43, %rd47;st.global.v2.u32 [%rd48], {%r235, %r236};ld.param.u64 %rd49, [%rd1+48];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r240, [%rd1+56];mul.lo.s32 %r241, %r240, %r18;cvt.s64.s32 %rd51, %r241;add.s64 %rd52, %rd51, %rd45;shl.b64 %rd53, %rd52, 3;add.s64 %rd54, %rd50, %rd53;st.global.v2.u32 [%rd54], {%r265, %r266};ld.param.u64 %rd55, [%rd1+96];cvta.to.global.u64 %rd56, %rd55;ld.param.u32 %r242, [%rd1+104];mul.lo.s32 %r243, %r242, %r257;cvt.s64.s32 %rd57, %r243;add.s64 %rd58, %rd57, %rd45;shl.b64 %rd59, %rd58, 2;add.s64 %rd60, %rd56, %rd59;st.global.f32 [%rd60], %f5;ld.shared.u32 %r244, [_ZZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsEE29sh_main_q_global_block_offset];add.s32 %r245, %r244, %r222;ld.param.u64 %rd61, [%rd1+64];cvta.to.global.u64 %rd62, %rd61;ld.param.u32 %r246, [%rd1+72];mul.lo.s32 %r247, %r246, %r18;cvt.s64.s32 %rd63, %r247;add.s64 %rd64, %rd63, %rd45;shl.b64 %rd65, %rd64, 2;add.s64 %rd66, %rd62, %rd65;st.global.u32 [%rd66], %r245;ld.param.u64 %rd67, [%rd1+80];cvta.to.global.u64 %rd68, %rd67;ld.param.u32 %r248, [%rd1+88];mul.lo.s32 %r249, %r248, %r18;cvt.s64.s32 %rd69, %r249;add.s64 %rd70, %rd69, %rd45;shl.b64 %rd71, %rd70, 2;add.s64 %rd72, %rd68, %rd71;st.global.u32 [%rd72], %r264;BB7_18:add.s32 %r262, %r7, %r262;setp.lt.s32 %p20, %r262, %r13;@%p20 bra BB7_4;BB7_19:ld.param.u32 %r255, [_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r254, %nctaid.y;add.s32 %r257, %r254, %r257;setp.lt.s32 %p21, %r257, %r255;@%p21 bra BB7_2;BB7_20:ret;}.visible .entry _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<35>;.reg .b16 %rs<2>;.reg .f32 %f<51>;.reg .b32 %r<100>;.reg .b64 %rd<39>;.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage[44];mov.b64 %rd8, _ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r98, %ctaid.y;setp.ge.s32 %p2, %r98, %r2;@%p2 bra BB8_26;mov.u64 %rd1, %rd8;ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd2, %rd9;ld.param.u32 %r3, [%rd1+24];ld.param.u32 %r4, [%rd1+8];ld.param.u64 %rd10, [%rd1+48];cvta.to.global.u64 %rd3, %rd10;ld.param.u32 %r5, [%rd1+56];ld.param.u64 %rd11, [%rd1+344];cvta.to.global.u64 %rd4, %rd11;mov.u32 %r26, %ntid.x;mov.u32 %r27, %ctaid.x;mov.u32 %r6, %tid.x;mad.lo.s32 %r7, %r26, %r27, %r6;shr.s32 %r28, %r6, 31;shr.u32 %r29, %r28, 27;add.s32 %r30, %r6, %r29;shr.s32 %r31, %r30, 5;shl.b32 %r32, %r31, 2;mov.u32 %r33, _ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage;add.s32 %r34, %r33, %r32;mov.u32 %r9, %nctaid.y;mov.u32 %r35, %nctaid.x;mul.lo.s32 %r10, %r35, %r26;mov.u32 %r57, %laneid;BB8_2:mul.lo.s32 %r36, %r3, %r98;mul.wide.s32 %rd12, %r36, 136;add.s64 %rd5, %rd2, %rd12;ld.global.u32 %r12, [%rd5];setp.ne.s32 %p3, %r6, 0;@%p3 bra BB8_4;ld.param.u64 %rd13, [%rd1];cvta.to.global.u64 %rd14, %rd13;ld.global.u32 %r37, [%rd5+68];setp.gt.s32 %p4, %r37, -1;xor.b32 %r38, %r37, 2147483647;selp.b32 %r39, %r37, %r38, %p4;mov.b32 %f15, %r39;mov.u32 %r40, 2147483647;st.global.u32 [%rd5+44], %r40;st.global.u32 [%rd5+80], %r40;mul.f32 %f16, %f15, 0f3F99999A;ld.param.f32 %f17, [%rd1+372];min.f32 %f18, %f17, %f16;mov.b32 %r41, %f18;setp.gt.s32 %p5, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r43, %r41, %r42, %p5;mov.u32 %r44, 0;st.global.v2.u32 [%rd5+24], {%r44, %r44};st.global.v2.u32 [%rd5+48], {%r44, %r44};st.global.v2.u32 [%rd5+64], {%r40, %r43};mov.u16 %rs1, 0;st.global.u8 [%rd5+96], %rs1;mul.lo.s32 %r45, %r4, %r12;mul.wide.s32 %rd15, %r45, 40;add.s64 %rd16, %rd14, %rd15;st.global.u32 [%rd16+24], %r40;BB8_4:mul.lo.s32 %r46, %r5, %r12;cvt.s64.s32 %rd17, %r46;ld.global.s32 %rd18, [%rd5+128];add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd3, %rd20;ld.global.v2.u32 {%r47, %r48}, [%rd21];mul.wide.s32 %rd22, %r47, 4;add.s64 %rd23, %rd4, %rd22;ld.global.u32 %r49, [%rd23+4];ld.global.u32 %r15, [%rd23];sub.s32 %r16, %r49, %r15;mov.f32 %f45, 0f7F7FFFFF;setp.ge.u32 %p6, %r6, %r16;@%p6 bra BB8_6;xor.b32 %r50, %r48, 2147483647;setp.gt.s32 %p7, %r48, -1;selp.b32 %r51, %r48, %r50, %p7;mov.b32 %f20, %r51;ld.param.u64 %rd24, [%rd1+320];cvta.to.global.u64 %rd25, %rd24;add.s32 %r52, %r15, %r6;mul.wide.s32 %rd26, %r52, 4;add.s64 %rd27, %rd25, %rd26;ld.param.u64 %rd28, [%rd1+336];cvta.to.global.u64 %rd29, %rd28;add.s64 %rd30, %rd29, %rd26;ld.global.u32 %r53, [%rd30];ld.global.u64 %rd31, [%rd5+8];mul.wide.s32 %rd32, %r53, 4;add.s64 %rd33, %rd31, %rd32;ld.global.f32 %f21, [%rd27];add.f32 %f22, %f20, %f21;ld.f32 %f23, [%rd33];sub.f32 %f45, %f22, %f23;BB8_6:setp.gt.s32 %p8, %r7, 254;@%p8 bra BB8_9;ld.param.u64 %rd34, [%rd1+208];cvta.to.global.u64 %rd6, %rd34;ld.param.u32 %r54, [%rd1+216];mul.lo.s32 %r55, %r54, %r98;cvt.s64.s32 %rd7, %r55;mov.u32 %r99, %r7;BB8_8:cvt.s64.s32 %rd35, %r99;add.s64 %rd36, %rd7, %rd35;shl.b64 %rd37, %rd36, 2;add.s64 %rd38, %rd6, %rd37;mov.u32 %r56, 0;st.global.u32 [%rd38], %r56;add.s32 %r99, %r10, %r99;setp.lt.s32 %p9, %r99, 255;@%p9 bra BB8_8;BB8_9:mov.b32 %r59, %f45;mov.u32 %r60, 1;mov.u32 %r61, 31;mov.u32 %r62, -1;shfl.sync.down.b32 %r58, %r59, %r60, %r61, %r62;add.s32 %r63, %r57, 1;setp.gt.u32 %p10, %r63, 31;@%p10 bra BB8_11;mov.b32 %f24, %r58;setp.lt.f32 %p11, %f24, %f45;selp.f32 %f45, %f24, %f45, %p11;BB8_11:mov.b32 %r65, %f45;mov.u32 %r66, 2;shfl.sync.down.b32 %r64, %r65, %r66, %r61, %r62;add.s32 %r69, %r57, 2;setp.gt.u32 %p12, %r69, 31;@%p12 bra BB8_13;mov.b32 %f25, %r64;setp.lt.f32 %p13, %f25, %f45;selp.f32 %f45, %f25, %f45, %p13;BB8_13:mov.b32 %r71, %f45;mov.u32 %r72, 4;shfl.sync.down.b32 %r70, %r71, %r72, %r61, %r62;add.s32 %r75, %r57, 4;setp.gt.u32 %p14, %r75, 31;@%p14 bra BB8_15;mov.b32 %f26, %r70;setp.lt.f32 %p15, %f26, %f45;selp.f32 %f45, %f26, %f45, %p15;BB8_15:mov.b32 %r77, %f45;mov.u32 %r78, 8;shfl.sync.down.b32 %r76, %r77, %r78, %r61, %r62;add.s32 %r81, %r57, 8;setp.gt.u32 %p16, %r81, 31;@%p16 bra BB8_17;mov.b32 %f27, %r76;setp.lt.f32 %p17, %f27, %f45;selp.f32 %f45, %f27, %f45, %p17;BB8_17:mov.b32 %r83, %f45;mov.u32 %r84, 16;shfl.sync.down.b32 %r82, %r83, %r84, %r61, %r62;add.s32 %r87, %r57, 16;setp.gt.u32 %p18, %r87, 31;@%p18 bra BB8_19;mov.b32 %f28, %r82;setp.lt.f32 %p19, %f28, %f45;selp.f32 %f45, %f28, %f45, %p19;BB8_19:setp.ne.s32 %p20, %r57, 0;@%p20 bra BB8_21;add.s32 %r97, %r34, 8;st.shared.f32 [%r97], %f45;BB8_21:setp.eq.s32 %p1, %r6, 0;bar.sync 0;@!%p1 bra BB8_23;bra.uni BB8_22;BB8_22:ld.shared.f32 %f29, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+12];setp.lt.f32 %p21, %f29, %f45;selp.f32 %f30, %f29, %f45, %p21;ld.shared.f32 %f31, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+16];setp.lt.f32 %p22, %f31, %f30;selp.f32 %f32, %f31, %f30, %p22;ld.shared.f32 %f33, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+20];setp.lt.f32 %p23, %f33, %f32;selp.f32 %f34, %f33, %f32, %p23;ld.shared.f32 %f35, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+24];setp.lt.f32 %p24, %f35, %f34;selp.f32 %f36, %f35, %f34, %p24;ld.shared.f32 %f37, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+28];setp.lt.f32 %p25, %f37, %f36;selp.f32 %f38, %f37, %f36, %p25;ld.shared.f32 %f39, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+32];setp.lt.f32 %p26, %f39, %f38;selp.f32 %f40, %f39, %f38, %p26;ld.shared.f32 %f41, [_ZZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsEE12temp_storage+36];setp.lt.f32 %p27, %f41, %f40;selp.f32 %f45, %f41, %f40, %p27;BB8_23:setp.gt.s32 %p28, %r16, 0;and.pred %p30, %p28, %p1;@!%p30 bra BB8_25;bra.uni BB8_24;BB8_24:ld.global.u32 %r88, [%rd5+68];setp.gt.s32 %p31, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p31;mov.b32 %f42, %r90;add.f32 %f43, %f45, %f42;mov.b32 %r91, %f43;setp.gt.s32 %p32, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p32;st.global.u32 [%rd5+80], %r93;mov.b32 %r94, %f45;setp.gt.s32 %p33, %r94, -1;xor.b32 %r95, %r94, 2147483647;selp.b32 %r96, %r94, %r95, %p33;st.global.u32 [%rd5+64], %r96;BB8_25:add.s32 %r98, %r9, %r98;setp.lt.s32 %p34, %r98, %r2;@%p34 bra BB8_2;BB8_26:ret;}.visible .entry _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<17>;.reg .b64 %rd<12>;mov.b64 %rd2, _ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r16, %ctaid.y;setp.ge.s32 %p1, %r16, %r2;@%p1 bra BB9_3;mov.u64 %rd1, %rd2;mov.u32 %r3, %nctaid.y;BB9_2:ld.param.u64 %rd3, [%rd1+16];cvta.to.global.u64 %rd4, %rd3;ld.param.u32 %r6, [%rd1+24];mul.lo.s32 %r7, %r6, %r16;ld.param.u64 %rd5, [%rd1+32];cvta.to.global.u64 %rd6, %rd5;ld.param.u32 %r8, [%rd1+40];mul.lo.s32 %r9, %r8, %r16;mul.wide.s32 %rd7, %r7, 136;add.s64 %rd8, %rd4, %rd7;ld.global.v2.u32 {%r10, %r11}, [%rd8+16];mul.wide.s32 %rd9, %r9, 136;add.s64 %rd10, %rd6, %rd9;ld.global.u32 %r14, [%rd8+48];st.global.v2.u32 [%rd10+16], {%r10, %r11};st.global.u32 [%rd10+48], %r14;add.s64 %rd11, %rd8, 44;atom.global.min.s32 %r15, [%rd11], %r11;add.s32 %r16, %r3, %r16;setp.lt.s32 %p2, %r16, %r2;@%p2 bra BB9_2;BB9_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]).maxntid 1024, 1, 1.minnctapersm 1{.reg .pred %p<37>;.reg .f32 %f<4>;.reg .b32 %r<875>;.reg .b64 %rd<112>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan[4256];.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan[8480];mov.b64 %rd6, _ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r831, %ctaid.y;setp.ge.s32 %p2, %r831, %r2;@%p2 bra BB10_37;mov.u64 %rd1, %rd6;mov.u32 %r90, %tid.x;shr.u32 %r91, %r90, 5;add.s32 %r92, %r91, %r90;shl.b32 %r93, %r92, 2;mov.u32 %r94, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;add.s32 %r3, %r94, %r93;shl.b32 %r95, %r92, 3;mov.u32 %r96, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;add.s32 %r4, %r96, %r95;mov.u32 %r327, %laneid;BB10_2:ld.param.u64 %rd2, [%rd1+16];cvta.to.global.u64 %rd7, %rd2;ld.param.u32 %r11, [%rd1+24];mul.lo.s32 %r97, %r11, %r831;mul.wide.s32 %rd8, %r97, 136;add.s64 %rd3, %rd7, %rd8;ld.global.u32 %r12, [%rd3];ld.global.v2.u32 {%r20, %r864}, [%rd3+16];setp.lt.s32 %p3, %r20, 1;@%p3 bra BB10_34;ld.global.u32 %r15, [%rd3+56];ld.global.u32 %r16, [%rd3+80];ld.global.u32 %r22, [%rd3+52];BB10_4:mov.u32 %r21, %r864;mov.u32 %r101, %ctaid.x;mov.u32 %r102, %ntid.x;mul.lo.s32 %r862, %r102, %r101;mov.u32 %r857, 0;setp.ge.s32 %p4, %r862, %r20;@%p4 bra BB10_22;mov.u32 %r825, %ntid.x;add.s32 %r26, %r21, -1;mul.lo.s32 %r847, %r825, %r101;mov.u32 %r845, 0;BB10_6:add.s32 %r34, %r847, %r90;mov.u32 %r852, 2147483647;setp.ge.s32 %p5, %r34, %r20;@%p5 bra BB10_14;setp.eq.s32 %p6, %r26, %r22;ld.param.u64 %rd9, [%rd1+64];cvta.to.global.u64 %rd4, %rd9;ld.param.u32 %r108, [%rd1+72];mul.lo.s32 %r109, %r108, %r12;cvt.s64.s32 %rd5, %r109;mov.u32 %r849, %r26;mov.u32 %r851, %r22;@%p6 bra BB10_11;BB10_8:add.s32 %r110, %r851, 1;setp.eq.s32 %p7, %r110, %r849;@%p7 bra BB10_10;sub.s32 %r111, %r849, %r851;shr.u32 %r112, %r111, 31;add.s32 %r113, %r111, %r112;shr.s32 %r114, %r113, 1;add.s32 %r115, %r114, %r851;cvt.s64.s32 %rd10, %r115;add.s64 %rd11, %rd10, %rd5;shl.b64 %rd12, %rd11, 2;add.s64 %rd13, %rd4, %rd12;ld.global.u32 %r116, [%rd13];setp.gt.s32 %p8, %r116, %r34;add.s32 %r117, %r115, -1;selp.b32 %r851, %r851, %r115, %p8;selp.b32 %r849, %r117, %r849, %p8;setp.eq.s32 %p9, %r849, %r851;@%p9 bra BB10_11;bra.uni BB10_8;BB10_10:cvt.s64.s32 %rd14, %r849;add.s64 %rd15, %rd14, %rd5;shl.b64 %rd16, %rd15, 2;add.s64 %rd17, %rd4, %rd16;ld.global.u32 %r118, [%rd17];setp.gt.s32 %p10, %r118, %r34;selp.b32 %r851, %r851, %r849, %p10;BB10_11:cvt.s64.s32 %rd18, %r851;add.s64 %rd19, %rd5, %rd18;shl.b64 %rd20, %rd19, 2;add.s64 %rd21, %rd4, %rd20;ld.param.u64 %rd22, [%rd1+80];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r119, [%rd1+88];mul.lo.s32 %r120, %r119, %r12;cvt.s64.s32 %rd24, %r120;add.s64 %rd25, %rd24, %rd18;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd23, %rd26;ld.global.u32 %r121, [%rd21];sub.s32 %r122, %r34, %r121;ld.global.u32 %r123, [%rd27];add.s32 %r853, %r123, %r122;ld.param.u64 %rd28, [%rd1+328];cvta.to.global.u64 %rd29, %rd28;mul.wide.s32 %rd30, %r853, 4;add.s64 %rd31, %rd29, %rd30;ld.global.u32 %r854, [%rd31];ld.param.u64 %rd32, [%rd1+320];cvta.to.global.u64 %rd33, %rd32;add.s64 %rd34, %rd33, %rd30;ld.param.u64 %rd35, [%rd1+48];cvta.to.global.u64 %rd36, %rd35;ld.param.u32 %r124, [%rd1+56];mul.lo.s32 %r125, %r124, %r12;cvt.s64.s32 %rd37, %r125;add.s64 %rd38, %rd37, %rd18;shl.b64 %rd39, %rd38, 3;add.s64 %rd40, %rd36, %rd39;ld.global.u32 %r126, [%rd40+4];setp.gt.s32 %p11, %r126, -1;xor.b32 %r127, %r126, 2147483647;selp.b32 %r128, %r126, %r127, %p11;mov.b32 %f1, %r128;ld.global.f32 %f2, [%rd34];add.f32 %f3, %f2, %f1;mov.b32 %r129, %f3;setp.gt.s32 %p12, %r129, -1;xor.b32 %r130, %r129, 2147483647;selp.b32 %r43, %r129, %r130, %p12;ld.global.u32 %r131, [%rd3+64];setp.ge.s32 %p13, %r43, %r131;@%p13 bra BB10_13;add.s64 %rd44, %rd3, 64;atom.global.min.s32 %r133, [%rd44], %r43;BB10_13:setp.lt.s32 %p14, %r43, %r16;selp.b32 %r852, %r43, 2147483647, %p14;BB10_14:setp.ne.s32 %p15, %r852, 2147483647;selp.u32 %r134, 1, 0, %p15;st.shared.u32 [%r3+16], %r134;bar.sync 0;setp.gt.u32 %p16, %r90, 31;@%p16 bra BB10_17;mov.u32 %r827, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan;mul.lo.s32 %r171, %r90, 33;shl.b32 %r172, %r171, 2;add.s32 %r174, %r827, %r172;ld.shared.u32 %r175, [%r174+20];ld.shared.u32 %r176, [%r174+16];add.s32 %r177, %r175, %r176;ld.shared.u32 %r178, [%r174+24];add.s32 %r179, %r177, %r178;ld.shared.u32 %r180, [%r174+28];add.s32 %r181, %r179, %r180;ld.shared.u32 %r182, [%r174+32];add.s32 %r183, %r181, %r182;ld.shared.u32 %r184, [%r174+36];add.s32 %r185, %r183, %r184;ld.shared.u32 %r186, [%r174+40];add.s32 %r187, %r185, %r186;ld.shared.u32 %r188, [%r174+44];add.s32 %r189, %r187, %r188;ld.shared.u32 %r190, [%r174+48];add.s32 %r191, %r189, %r190;ld.shared.u32 %r192, [%r174+52];add.s32 %r193, %r191, %r192;ld.shared.u32 %r194, [%r174+56];add.s32 %r195, %r193, %r194;ld.shared.u32 %r196, [%r174+60];add.s32 %r197, %r195, %r196;ld.shared.u32 %r198, [%r174+64];add.s32 %r199, %r197, %r198;ld.shared.u32 %r200, [%r174+68];add.s32 %r201, %r199, %r200;ld.shared.u32 %r202, [%r174+72];add.s32 %r203, %r201, %r202;ld.shared.u32 %r204, [%r174+76];add.s32 %r205, %r203, %r204;ld.shared.u32 %r206, [%r174+80];add.s32 %r207, %r205, %r206;ld.shared.u32 %r208, [%r174+84];add.s32 %r209, %r207, %r208;ld.shared.u32 %r210, [%r174+88];add.s32 %r211, %r209, %r210;ld.shared.u32 %r212, [%r174+92];add.s32 %r213, %r211, %r212;ld.shared.u32 %r214, [%r174+96];add.s32 %r215, %r213, %r214;ld.shared.u32 %r216, [%r174+100];add.s32 %r217, %r215, %r216;ld.shared.u32 %r218, [%r174+104];add.s32 %r219, %r217, %r218;ld.shared.u32 %r220, [%r174+108];add.s32 %r221, %r219, %r220;ld.shared.u32 %r222, [%r174+112];add.s32 %r223, %r221, %r222;ld.shared.u32 %r224, [%r174+116];add.s32 %r225, %r223, %r224;ld.shared.u32 %r226, [%r174+120];add.s32 %r227, %r225, %r226;ld.shared.u32 %r228, [%r174+124];add.s32 %r229, %r227, %r228;ld.shared.u32 %r230, [%r174+128];add.s32 %r231, %r229, %r230;ld.shared.u32 %r232, [%r174+132];add.s32 %r233, %r231, %r232;ld.shared.u32 %r234, [%r174+136];add.s32 %r235, %r233, %r234;ld.shared.u32 %r236, [%r174+140];add.s32 %r139, %r235, %r236;mov.u32 %r137, 1;mov.u32 %r162, 0;mov.u32 %r169, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r139, %r137, %r162, %r169; @p add.s32 r0, r0, %r139; mov.s32 %r135, r0;}mov.u32 %r143, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r135, %r143, %r162, %r169; @p add.s32 r0, r0, %r135; mov.s32 %r141, r0;}mov.u32 %r149, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r141, %r149, %r162, %r169; @p add.s32 r0, r0, %r141; mov.s32 %r147, r0;}mov.u32 %r155, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r147, %r155, %r162, %r169; @p add.s32 r0, r0, %r147; mov.s32 %r153, r0;}mov.u32 %r161, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r153, %r161, %r162, %r169; @p add.s32 r0, r0, %r153; mov.s32 %r159, r0;}mov.u32 %r168, 31;shfl.sync.idx.b32 %r165, %r159, %r168, %r168, %r169;sub.s32 %r237, %r159, %r139;ld.shared.u32 %r238, [%r174+16];add.s32 %r239, %r238, %r237;ld.shared.u32 %r240, [%r174+20];add.s32 %r241, %r240, %r239;ld.shared.u32 %r242, [%r174+24];add.s32 %r243, %r242, %r241;ld.shared.u32 %r244, [%r174+28];add.s32 %r245, %r244, %r243;ld.shared.u32 %r246, [%r174+32];add.s32 %r247, %r246, %r245;ld.shared.u32 %r248, [%r174+36];add.s32 %r249, %r248, %r247;ld.shared.u32 %r250, [%r174+40];add.s32 %r251, %r250, %r249;ld.shared.u32 %r252, [%r174+44];add.s32 %r253, %r252, %r251;ld.shared.u32 %r254, [%r174+48];add.s32 %r255, %r254, %r253;ld.shared.u32 %r256, [%r174+52];add.s32 %r257, %r256, %r255;ld.shared.u32 %r258, [%r174+56];add.s32 %r259, %r258, %r257;ld.shared.u32 %r260, [%r174+60];add.s32 %r261, %r260, %r259;ld.shared.u32 %r262, [%r174+64];add.s32 %r263, %r262, %r261;ld.shared.u32 %r264, [%r174+68];add.s32 %r265, %r264, %r263;ld.shared.u32 %r266, [%r174+72];add.s32 %r267, %r266, %r265;ld.shared.u32 %r268, [%r174+76];add.s32 %r269, %r268, %r267;ld.shared.u32 %r270, [%r174+80];add.s32 %r271, %r270, %r269;ld.shared.u32 %r272, [%r174+84];add.s32 %r273, %r272, %r271;ld.shared.u32 %r274, [%r174+88];add.s32 %r275, %r274, %r273;ld.shared.u32 %r276, [%r174+92];add.s32 %r277, %r276, %r275;ld.shared.u32 %r278, [%r174+96];add.s32 %r279, %r278, %r277;ld.shared.u32 %r280, [%r174+100];add.s32 %r281, %r280, %r279;ld.shared.u32 %r282, [%r174+104];add.s32 %r283, %r282, %r281;ld.shared.u32 %r284, [%r174+108];add.s32 %r285, %r284, %r283;ld.shared.u32 %r286, [%r174+112];add.s32 %r287, %r286, %r285;ld.shared.u32 %r288, [%r174+116];add.s32 %r289, %r288, %r287;ld.shared.u32 %r290, [%r174+120];add.s32 %r291, %r290, %r289;ld.shared.u32 %r292, [%r174+124];add.s32 %r293, %r292, %r291;ld.shared.u32 %r294, [%r174+128];add.s32 %r295, %r294, %r293;ld.shared.u32 %r296, [%r174+132];add.s32 %r297, %r296, %r295;ld.shared.u32 %r298, [%r174+136];add.s32 %r299, %r298, %r297;st.shared.u32 [%r174+16], %r237;st.shared.u32 [%r174+20], %r239;st.shared.u32 [%r174+24], %r241;st.shared.u32 [%r174+28], %r243;st.shared.u32 [%r174+32], %r245;st.shared.u32 [%r174+36], %r247;st.shared.u32 [%r174+40], %r249;st.shared.u32 [%r174+44], %r251;st.shared.u32 [%r174+48], %r253;st.shared.u32 [%r174+52], %r255;st.shared.u32 [%r174+56], %r257;st.shared.u32 [%r174+60], %r259;st.shared.u32 [%r174+64], %r261;st.shared.u32 [%r174+68], %r263;st.shared.u32 [%r174+72], %r265;st.shared.u32 [%r174+76], %r267;st.shared.u32 [%r174+80], %r269;st.shared.u32 [%r174+84], %r271;st.shared.u32 [%r174+88], %r273;st.shared.u32 [%r174+92], %r275;st.shared.u32 [%r174+96], %r277;st.shared.u32 [%r174+100], %r279;st.shared.u32 [%r174+104], %r281;st.shared.u32 [%r174+108], %r283;st.shared.u32 [%r174+112], %r285;st.shared.u32 [%r174+116], %r287;st.shared.u32 [%r174+120], %r289;st.shared.u32 [%r174+124], %r291;st.shared.u32 [%r174+128], %r293;st.shared.u32 [%r174+132], %r295;st.shared.u32 [%r174+136], %r297;st.shared.u32 [%r174+140], %r299;setp.ne.s32 %p17, %r90, 0;@%p17 bra BB10_17;st.shared.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240], %r165;BB10_17:bar.sync 0;ld.shared.u32 %r300, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE24sh_temp_storage_int_scan+4240];add.s32 %r857, %r300, %r845;ld.param.u32 %r301, [%rd1+312];setp.lt.s32 %p18, %r857, %r301;@%p18 bra BB10_19;bra.uni BB10_18;BB10_19:setp.eq.s32 %p19, %r852, 2147483647;@%p19 bra BB10_21;ld.shared.u32 %r304, [%r3+16];add.s32 %r305, %r304, %r845;ld.param.u64 %rd45, [%rd1+128];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r306, [%rd1+136];mul.lo.s32 %r307, %r306, %r831;cvt.s64.s32 %rd47, %r307;cvt.s64.s32 %rd48, %r305;add.s64 %rd49, %rd47, %rd48;shl.b64 %rd50, %rd49, 3;add.s64 %rd51, %rd46, %rd50;st.global.v2.u32 [%rd51], {%r854, %r852};ld.param.u64 %rd52, [%rd1+144];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r308, [%rd1+152];mul.lo.s32 %r309, %r308, %r831;cvt.s64.s32 %rd54, %r309;add.s64 %rd55, %rd54, %rd48;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;add.s32 %r310, %r851, %r15;st.global.v2.u32 [%rd57], {%r310, %r853};BB10_21:bar.sync 0;mov.u32 %r826, %ntid.x;mov.u32 %r312, %nctaid.x;mad.lo.s32 %r847, %r312, %r826, %r847;setp.lt.s32 %p20, %r847, %r20;mov.u32 %r845, %r857;@%p20 bra BB10_6;BB10_22:mov.u32 %r20, 0;setp.ge.s32 %p21, %r862, %r857;mov.u32 %r864, %r21;@%p21 bra BB10_33;BB10_23:mov.u32 %r865, 0;add.s32 %r62, %r862, %r90;mov.u32 %r866, -1;setp.ge.s32 %p22, %r62, %r857;@%p22 bra BB10_25;add.s32 %r824, %r862, %r90;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r320, [%rd1+136];mul.lo.s32 %r321, %r320, %r831;cvt.s64.s32 %rd60, %r321;cvt.s64.s32 %rd61, %r824;add.s64 %rd62, %rd60, %rd61;shl.b64 %rd63, %rd62, 3;add.s64 %rd64, %rd59, %rd63;ld.global.v2.u32 {%r861, %r860}, [%rd64];ld.param.u64 %rd65, [%rd1+352];cvta.to.global.u64 %rd66, %rd65;mul.wide.s32 %rd67, %r861, 4;add.s64 %rd68, %rd66, %rd67;ld.global.u32 %r324, [%rd68+4];ld.global.u32 %r866, [%rd68];sub.s32 %r865, %r324, %r866;BB10_25:setp.lt.u32 %p1, %r90, 32;setp.ne.s32 %p23, %r866, -1;selp.u32 %r326, 1, 0, %p23;st.shared.v2.u32 [%r4+16], {%r865, %r326};bar.sync 0;@!%p1 bra BB10_28;bra.uni BB10_26;BB10_26:mov.u32 %r823, _ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan;mul.lo.s32 %r399, %r90, 33;shl.b32 %r400, %r399, 3;add.s32 %r402, %r823, %r400;ld.shared.v2.u32 {%r403, %r404}, [%r402+24];ld.shared.v2.u32 {%r407, %r408}, [%r402+16];add.s32 %r411, %r403, %r407;add.s32 %r412, %r404, %r408;ld.shared.v2.u32 {%r413, %r414}, [%r402+32];add.s32 %r417, %r411, %r413;add.s32 %r418, %r412, %r414;ld.shared.v2.u32 {%r419, %r420}, [%r402+40];add.s32 %r423, %r417, %r419;add.s32 %r424, %r418, %r420;ld.shared.v2.u32 {%r425, %r426}, [%r402+48];add.s32 %r429, %r423, %r425;add.s32 %r430, %r424, %r426;ld.shared.v2.u32 {%r431, %r432}, [%r402+56];add.s32 %r435, %r429, %r431;add.s32 %r436, %r430, %r432;ld.shared.v2.u32 {%r437, %r438}, [%r402+64];add.s32 %r441, %r435, %r437;add.s32 %r442, %r436, %r438;ld.shared.v2.u32 {%r443, %r444}, [%r402+72];add.s32 %r447, %r441, %r443;add.s32 %r448, %r442, %r444;ld.shared.v2.u32 {%r449, %r450}, [%r402+80];add.s32 %r453, %r447, %r449;add.s32 %r454, %r448, %r450;ld.shared.v2.u32 {%r455, %r456}, [%r402+88];add.s32 %r459, %r453, %r455;add.s32 %r460, %r454, %r456;ld.shared.v2.u32 {%r461, %r462}, [%r402+96];add.s32 %r465, %r459, %r461;add.s32 %r466, %r460, %r462;ld.shared.v2.u32 {%r467, %r468}, [%r402+104];add.s32 %r471, %r465, %r467;add.s32 %r472, %r466, %r468;ld.shared.v2.u32 {%r473, %r474}, [%r402+112];add.s32 %r477, %r471, %r473;add.s32 %r478, %r472, %r474;ld.shared.v2.u32 {%r479, %r480}, [%r402+120];add.s32 %r483, %r477, %r479;add.s32 %r484, %r478, %r480;ld.shared.v2.u32 {%r485, %r486}, [%r402+128];add.s32 %r489, %r483, %r485;add.s32 %r490, %r484, %r486;ld.shared.v2.u32 {%r491, %r492}, [%r402+136];add.s32 %r495, %r489, %r491;add.s32 %r496, %r490, %r492;ld.shared.v2.u32 {%r497, %r498}, [%r402+144];add.s32 %r501, %r495, %r497;add.s32 %r502, %r496, %r498;ld.shared.v2.u32 {%r503, %r504}, [%r402+152];add.s32 %r507, %r501, %r503;add.s32 %r508, %r502, %r504;ld.shared.v2.u32 {%r509, %r510}, [%r402+160];add.s32 %r513, %r507, %r509;add.s32 %r514, %r508, %r510;ld.shared.v2.u32 {%r515, %r516}, [%r402+168];add.s32 %r519, %r513, %r515;add.s32 %r520, %r514, %r516;ld.shared.v2.u32 {%r521, %r522}, [%r402+176];add.s32 %r525, %r519, %r521;add.s32 %r526, %r520, %r522;ld.shared.v2.u32 {%r527, %r528}, [%r402+184];add.s32 %r531, %r525, %r527;add.s32 %r532, %r526, %r528;ld.shared.v2.u32 {%r533, %r534}, [%r402+192];add.s32 %r537, %r531, %r533;add.s32 %r538, %r532, %r534;ld.shared.v2.u32 {%r539, %r540}, [%r402+200];add.s32 %r543, %r537, %r539;add.s32 %r544, %r538, %r540;ld.shared.v2.u32 {%r545, %r546}, [%r402+208];add.s32 %r549, %r543, %r545;add.s32 %r550, %r544, %r546;ld.shared.v2.u32 {%r551, %r552}, [%r402+216];add.s32 %r555, %r549, %r551;add.s32 %r556, %r550, %r552;ld.shared.v2.u32 {%r557, %r558}, [%r402+224];add.s32 %r561, %r555, %r557;add.s32 %r562, %r556, %r558;ld.shared.v2.u32 {%r563, %r564}, [%r402+232];add.s32 %r567, %r561, %r563;add.s32 %r568, %r562, %r564;ld.shared.v2.u32 {%r569, %r570}, [%r402+240];add.s32 %r573, %r567, %r569;add.s32 %r574, %r568, %r570;ld.shared.v2.u32 {%r575, %r576}, [%r402+248];add.s32 %r579, %r573, %r575;add.s32 %r580, %r574, %r576;ld.shared.v2.u32 {%r581, %r582}, [%r402+256];add.s32 %r585, %r579, %r581;add.s32 %r586, %r580, %r582;ld.shared.v2.u32 {%r587, %r588}, [%r402+264];add.s32 %r329, %r585, %r587;add.s32 %r334, %r586, %r588;mov.u32 %r395, 1;mov.u32 %r396, 0;mov.u32 %r397, -1;shfl.sync.up.b32 %r328, %r329, %r395, %r396, %r397;shfl.sync.up.b32 %r333, %r334, %r395, %r396, %r397;setp.lt.s32 %p24, %r327, 1;selp.b32 %r591, 0, %r328, %p24;add.s32 %r339, %r591, %r329;selp.b32 %r592, 0, %r333, %p24;add.s32 %r344, %r592, %r334;mov.u32 %r345, 2;shfl.sync.up.b32 %r338, %r339, %r345, %r396, %r397;shfl.sync.up.b32 %r343, %r344, %r345, %r396, %r397;setp.lt.s32 %p25, %r327, 2;selp.b32 %r593, 0, %r338, %p25;add.s32 %r349, %r593, %r339;selp.b32 %r594, 0, %r343, %p25;add.s32 %r354, %r594, %r344;mov.u32 %r355, 4;shfl.sync.up.b32 %r348, %r349, %r355, %r396, %r397;shfl.sync.up.b32 %r353, %r354, %r355, %r396, %r397;setp.lt.s32 %p26, %r327, 4;selp.b32 %r595, 0, %r348, %p26;add.s32 %r359, %r595, %r349;selp.b32 %r596, 0, %r353, %p26;add.s32 %r364, %r596, %r354;mov.u32 %r365, 8;shfl.sync.up.b32 %r358, %r359, %r365, %r396, %r397;shfl.sync.up.b32 %r363, %r364, %r365, %r396, %r397;setp.lt.s32 %p27, %r327, 8;selp.b32 %r597, 0, %r358, %p27;add.s32 %r369, %r597, %r359;selp.b32 %r598, 0, %r363, %p27;add.s32 %r374, %r598, %r364;mov.u32 %r375, 16;shfl.sync.up.b32 %r368, %r369, %r375, %r396, %r397;shfl.sync.up.b32 %r373, %r374, %r375, %r396, %r397;setp.lt.s32 %p28, %r327, 16;selp.b32 %r599, 0, %r368, %p28;add.s32 %r389, %r599, %r369;selp.b32 %r600, 0, %r373, %p28;add.s32 %r394, %r600, %r374;mov.u32 %r386, 31;shfl.sync.idx.b32 %r378, %r389, %r386, %r386, %r397;shfl.sync.idx.b32 %r383, %r394, %r386, %r386, %r397;shfl.sync.up.b32 %r388, %r389, %r395, %r396, %r397;shfl.sync.up.b32 %r393, %r394, %r395, %r396, %r397;setp.eq.s32 %p29, %r327, 0;ld.shared.v2.u32 {%r601, %r602}, [%r402+16];ld.shared.v2.u32 {%r605, %r606}, [%r402+24];ld.shared.v2.u32 {%r609, %r610}, [%r402+32];ld.shared.v2.u32 {%r613, %r614}, [%r402+40];ld.shared.v2.u32 {%r617, %r618}, [%r402+48];ld.shared.v2.u32 {%r621, %r622}, [%r402+56];ld.shared.v2.u32 {%r625, %r626}, [%r402+64];ld.shared.v2.u32 {%r629, %r630}, [%r402+72];ld.shared.v2.u32 {%r633, %r634}, [%r402+80];ld.shared.v2.u32 {%r637, %r638}, [%r402+88];ld.shared.v2.u32 {%r641, %r642}, [%r402+96];ld.shared.v2.u32 {%r645, %r646}, [%r402+104];ld.shared.v2.u32 {%r649, %r650}, [%r402+112];ld.shared.v2.u32 {%r653, %r654}, [%r402+120];ld.shared.v2.u32 {%r657, %r658}, [%r402+128];ld.shared.v2.u32 {%r661, %r662}, [%r402+136];ld.shared.v2.u32 {%r665, %r666}, [%r402+144];ld.shared.v2.u32 {%r669, %r670}, [%r402+152];ld.shared.v2.u32 {%r673, %r674}, [%r402+160];ld.shared.v2.u32 {%r677, %r678}, [%r402+168];ld.shared.v2.u32 {%r681, %r682}, [%r402+176];ld.shared.v2.u32 {%r685, %r686}, [%r402+184];ld.shared.v2.u32 {%r689, %r690}, [%r402+192];ld.shared.v2.u32 {%r693, %r694}, [%r402+200];ld.shared.v2.u32 {%r697, %r698}, [%r402+208];ld.shared.v2.u32 {%r701, %r702}, [%r402+216];ld.shared.v2.u32 {%r705, %r706}, [%r402+224];ld.shared.v2.u32 {%r709, %r710}, [%r402+232];ld.shared.v2.u32 {%r713, %r714}, [%r402+240];ld.shared.v2.u32 {%r717, %r718}, [%r402+248];ld.shared.v2.u32 {%r721, %r722}, [%r402+256];selp.b32 %r725, 0, %r388, %p29;selp.b32 %r726, 0, %r393, %p29;st.shared.v2.u32 [%r402+16], {%r725, %r726};add.s32 %r727, %r602, %r726;add.s32 %r728, %r601, %r725;st.shared.v2.u32 [%r402+24], {%r728, %r727};add.s32 %r729, %r606, %r727;add.s32 %r730, %r605, %r728;st.shared.v2.u32 [%r402+32], {%r730, %r729};add.s32 %r731, %r610, %r729;add.s32 %r732, %r609, %r730;st.shared.v2.u32 [%r402+40], {%r732, %r731};add.s32 %r733, %r614, %r731;add.s32 %r734, %r613, %r732;st.shared.v2.u32 [%r402+48], {%r734, %r733};add.s32 %r735, %r618, %r733;add.s32 %r736, %r617, %r734;st.shared.v2.u32 [%r402+56], {%r736, %r735};add.s32 %r737, %r622, %r735;add.s32 %r738, %r621, %r736;st.shared.v2.u32 [%r402+64], {%r738, %r737};add.s32 %r739, %r626, %r737;add.s32 %r740, %r625, %r738;st.shared.v2.u32 [%r402+72], {%r740, %r739};add.s32 %r741, %r630, %r739;add.s32 %r742, %r629, %r740;st.shared.v2.u32 [%r402+80], {%r742, %r741};add.s32 %r743, %r634, %r741;add.s32 %r744, %r633, %r742;st.shared.v2.u32 [%r402+88], {%r744, %r743};add.s32 %r745, %r638, %r743;add.s32 %r746, %r637, %r744;st.shared.v2.u32 [%r402+96], {%r746, %r745};add.s32 %r747, %r642, %r745;add.s32 %r748, %r641, %r746;st.shared.v2.u32 [%r402+104], {%r748, %r747};add.s32 %r749, %r646, %r747;add.s32 %r750, %r645, %r748;st.shared.v2.u32 [%r402+112], {%r750, %r749};add.s32 %r751, %r650, %r749;add.s32 %r752, %r649, %r750;st.shared.v2.u32 [%r402+120], {%r752, %r751};add.s32 %r753, %r654, %r751;add.s32 %r754, %r653, %r752;st.shared.v2.u32 [%r402+128], {%r754, %r753};add.s32 %r755, %r658, %r753;add.s32 %r756, %r657, %r754;st.shared.v2.u32 [%r402+136], {%r756, %r755};add.s32 %r757, %r662, %r755;add.s32 %r758, %r661, %r756;st.shared.v2.u32 [%r402+144], {%r758, %r757};add.s32 %r759, %r666, %r757;add.s32 %r760, %r665, %r758;st.shared.v2.u32 [%r402+152], {%r760, %r759};add.s32 %r761, %r670, %r759;add.s32 %r762, %r669, %r760;st.shared.v2.u32 [%r402+160], {%r762, %r761};add.s32 %r763, %r674, %r761;add.s32 %r764, %r673, %r762;st.shared.v2.u32 [%r402+168], {%r764, %r763};add.s32 %r765, %r678, %r763;add.s32 %r766, %r677, %r764;st.shared.v2.u32 [%r402+176], {%r766, %r765};add.s32 %r767, %r682, %r765;add.s32 %r768, %r681, %r766;st.shared.v2.u32 [%r402+184], {%r768, %r767};add.s32 %r769, %r686, %r767;add.s32 %r770, %r685, %r768;st.shared.v2.u32 [%r402+192], {%r770, %r769};add.s32 %r771, %r690, %r769;add.s32 %r772, %r689, %r770;st.shared.v2.u32 [%r402+200], {%r772, %r771};add.s32 %r773, %r694, %r771;add.s32 %r774, %r693, %r772;st.shared.v2.u32 [%r402+208], {%r774, %r773};add.s32 %r775, %r698, %r773;add.s32 %r776, %r697, %r774;st.shared.v2.u32 [%r402+216], {%r776, %r775};add.s32 %r777, %r702, %r775;add.s32 %r778, %r701, %r776;st.shared.v2.u32 [%r402+224], {%r778, %r777};add.s32 %r779, %r706, %r777;add.s32 %r780, %r705, %r778;st.shared.v2.u32 [%r402+232], {%r780, %r779};add.s32 %r781, %r710, %r779;add.s32 %r782, %r709, %r780;st.shared.v2.u32 [%r402+240], {%r782, %r781};add.s32 %r783, %r714, %r781;add.s32 %r784, %r713, %r782;st.shared.v2.u32 [%r402+248], {%r784, %r783};add.s32 %r785, %r718, %r783;add.s32 %r786, %r717, %r784;st.shared.v2.u32 [%r402+256], {%r786, %r785};add.s32 %r787, %r722, %r785;add.s32 %r788, %r721, %r786;st.shared.v2.u32 [%r402+264], {%r788, %r787};setp.ne.s32 %p30, %r90, 0;@%p30 bra BB10_28;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464], {%r378, %r383};BB10_28:bar.sync 0;ld.shared.v2.u32 {%r789, %r790}, [_ZZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsEE25sh_temp_storage_int2_scan+8464];add.s32 %r75, %r790, %r864;ld.param.u32 %r791, [%rd1+308];setp.lt.s32 %p31, %r75, %r791;@%p31 bra BB10_30;bra.uni BB10_29;BB10_30:add.s32 %r76, %r789, %r20;setp.eq.s32 %p32, %r866, -1;@%p32 bra BB10_32;add.s32 %r829, %r862, %r90;ld.shared.v2.u32 {%r794, %r795}, [%r4+16];add.s32 %r798, %r795, %r864;ld.param.u64 %rd69, [%rd1+80];cvta.to.global.u64 %rd70, %rd69;ld.param.u32 %r799, [%rd1+88];mul.lo.s32 %r800, %r799, %r12;cvt.s64.s32 %rd71, %r800;cvt.s64.s32 %rd72, %r798;add.s64 %rd73, %rd71, %rd72;shl.b64 %rd74, %rd73, 2;add.s64 %rd75, %rd70, %rd74;st.global.u32 [%rd75], %r866;ld.param.u64 %rd76, [%rd1+64];cvta.to.global.u64 %rd77, %rd76;ld.param.u32 %r801, [%rd1+72];mul.lo.s32 %r802, %r801, %r12;cvt.s64.s32 %rd78, %r802;add.s64 %rd79, %rd78, %rd72;shl.b64 %rd80, %rd79, 2;add.s64 %rd81, %rd77, %rd80;add.s32 %r803, %r794, %r20;st.global.u32 [%rd81], %r803;ld.param.u64 %rd82, [%rd1+48];cvta.to.global.u64 %rd83, %rd82;ld.param.u32 %r804, [%rd1+56];mul.lo.s32 %r805, %r804, %r12;cvt.s64.s32 %rd84, %r805;add.s64 %rd85, %rd84, %rd72;shl.b64 %rd86, %rd85, 3;add.s64 %rd87, %rd83, %rd86;st.global.v2.u32 [%rd87], {%r861, %r860};ld.param.u64 %rd88, [%rd1+112];cvta.to.global.u64 %rd89, %rd88;ld.param.u32 %r806, [%rd1+120];mul.lo.s32 %r807, %r806, %r831;cvt.s64.s32 %rd90, %r807;add.s64 %rd91, %rd90, %rd72;shl.b64 %rd92, %rd91, 3;add.s64 %rd93, %rd89, %rd92;ld.param.u64 %rd94, [%rd1+144];cvta.to.global.u64 %rd95, %rd94;ld.param.u32 %r808, [%rd1+152];mul.lo.s32 %r809, %r808, %r831;cvt.s64.s32 %rd96, %r809;cvt.s64.s32 %rd97, %r829;add.s64 %rd98, %rd96, %rd97;shl.b64 %rd99, %rd98, 3;add.s64 %rd100, %rd95, %rd99;ld.global.u64 %rd101, [%rd100];st.global.u64 [%rd93], %rd101;ld.param.u64 %rd102, [%rd1+96];cvta.to.global.u64 %rd103, %rd102;ld.param.u32 %r810, [%rd1+104];mul.lo.s32 %r811, %r810, %r831;cvt.s64.s32 %rd104, %r811;add.s64 %rd105, %rd104, %rd72;shl.b64 %rd106, %rd105, 2;add.s64 %rd107, %rd103, %rd106;mov.u32 %r812, 0;st.global.u32 [%rd107], %r812;BB10_32:bar.sync 0;mov.u32 %r828, %ntid.x;mov.u32 %r814, %nctaid.x;mad.lo.s32 %r862, %r814, %r828, %r862;setp.lt.s32 %p33, %r862, %r857;mov.u32 %r20, %r76;mov.u32 %r864, %r75;@%p33 bra BB10_23;BB10_33:setp.gt.s32 %p34, %r20, 0;mov.u32 %r22, %r21;@%p34 bra BB10_4;bra.uni BB10_34;BB10_18:ld.global.u32 %r302, [%rd3+48];or.b32 %r303, %r302, 2;st.global.u32 [%rd3+48], %r303;mov.u32 %r864, %r21;bra.uni BB10_34;BB10_29:ld.global.u32 %r792, [%rd3+48];or.b32 %r793, %r792, 1;st.global.u32 [%rd3+48], %r793;BB10_34:setp.ne.s32 %p35, %r90, 0;@%p35 bra BB10_36;mov.u32 %r816, 0;ld.param.u64 %rd108, [%rd1+32];cvta.to.global.u64 %rd109, %rd108;ld.param.u32 %r817, [%rd1+40];mul.lo.s32 %r818, %r817, %r831;mul.wide.s32 %rd110, %r818, 136;add.s64 %rd111, %rd109, %rd110;st.global.v2.u32 [%rd3+16], {%r816, %r864};st.global.v2.u32 [%rd111+16], {%r816, %r864};BB10_36:ld.param.u32 %r820, [_ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r819, %nctaid.y;add.s32 %r831, %r819, %r831;setp.lt.s32 %p36, %r831, %r820;@%p36 bra BB10_2;BB10_37:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<16>;.reg .b16 %rs<3>;.reg .f32 %f<5>;.reg .b32 %r<52>;.reg .b64 %rd<30>;mov.b64 %rd8, _ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r47, %ctaid.y;setp.ge.s32 %p1, %r47, %r2;@%p1 bra BB11_15;mov.u64 %rd1, %rd8;mov.u32 %r24, %ntid.x;mov.u32 %r25, %ctaid.x;mov.u32 %r26, %tid.x;mad.lo.s32 %r3, %r24, %r25, %r26;mov.u32 %r4, %nctaid.y;mov.u32 %r27, %nctaid.x;mul.lo.s32 %r5, %r27, %r24;and.b16 %rs2, %rs1, 255;BB11_2:ld.param.u64 %rd9, [%rd1+16];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r28, [%rd1+24];mul.lo.s32 %r29, %r28, %r47;mul.wide.s32 %rd11, %r29, 136;add.s64 %rd2, %rd10, %rd11;ld.param.u64 %rd12, [%rd1];cvta.to.global.u64 %rd3, %rd12;ld.param.u32 %r30, [%rd1+8];ld.global.u32 %r7, [%rd2];mul.lo.s32 %r31, %r30, %r7;cvt.s64.s32 %rd4, %r31;mul.wide.s32 %rd13, %r31, 40;add.s64 %rd14, %rd3, %rd13;add.s64 %rd5, %rd14, 4;ld.global.u32 %r8, [%rd14+4];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB11_14;ld.global.u32 %r9, [%rd5+8];setp.eq.s16 %p3, %rs2, 0;mul.lo.s64 %rd15, %rd4, 40;add.s64 %rd16, %rd3, %rd15;add.s64 %rd6, %rd16, 24;mov.u32 %r48, %r3;mov.u32 %r51, %r3;@%p3 bra BB11_11;bra.uni BB11_4;BB11_11:setp.ne.s32 %p13, %r51, 0;@%p13 bra BB11_13;mov.u32 %r46, 0;st.global.u32 [%rd2+120], %r46;BB11_13:add.s32 %r51, %r5, %r51;setp.lt.s32 %p14, %r51, %r8;@%p14 bra BB11_11;bra.uni BB11_14;BB11_4:setp.ne.s32 %p4, %r48, 0;@%p4 bra BB11_6;mov.u32 %r32, 0;st.global.u32 [%rd2+120], %r32;BB11_6:ld.param.u64 %rd17, [%rd1+48];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r33, [%rd1+56];mul.lo.s32 %r34, %r33, %r7;cvt.s64.s32 %rd19, %r34;cvt.s64.s32 %rd20, %r48;add.s64 %rd21, %rd19, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd18, %rd22;ld.global.v2.u32 {%r35, %r36}, [%rd23];setp.gt.s32 %p5, %r36, -1;xor.b32 %r39, %r36, 2147483647;selp.b32 %r40, %r36, %r39, %p5;mov.b32 %f2, %r40;ld.param.u64 %rd24, [%rd1+360];cvta.to.global.u64 %rd25, %rd24;mul.wide.s32 %rd26, %r35, 4;add.s64 %rd27, %rd25, %rd26;ld.global.f32 %f3, [%rd27];add.f32 %f4, %f2, %f3;mov.b32 %r41, %f4;setp.gt.s32 %p6, %r41, -1;xor.b32 %r42, %r41, 2147483647;selp.b32 %r11, %r41, %r42, %p6;setp.eq.f32 %p7, %f3, %f1;@%p7 bra BB11_10;ld.global.v2.u32 {%r49, %r50}, [%rd5+20];setp.le.s32 %p8, %r49, %r11;@%p8 bra BB11_10;add.s32 %r45, %r48, %r9;mov.b64 %rd7, {%r11, %r45};BB11_9:mov.b64 %rd28, {%r49, %r50};atom.global.cas.b64 %rd29, [%rd6], %rd28, %rd7;mov.b64 {%r49, %r50}, %rd29;setp.gt.s32 %p9, %r49, %r11;setp.ne.s64 %p10, %rd29, %rd28;and.pred %p11, %p9, %p10;@%p11 bra BB11_9;BB11_10:add.s32 %r48, %r5, %r48;setp.lt.s32 %p12, %r48, %r8;@%p12 bra BB11_4;BB11_14:add.s32 %r47, %r4, %r47;setp.lt.s32 %p15, %r47, %r2;@%p15 bra BB11_2;BB11_15:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2,.param .f32 _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3){.reg .pred %p<19>;.reg .b16 %rs<3>;.reg .f32 %f<8>;.reg .b32 %r<68>;.reg .b64 %rd<47>;mov.b64 %rd6, _ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_1];ld.param.f32 %f2, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_3];ld.param.s8 %rs1, [_ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_param_2];mov.u32 %r64, %ctaid.y;setp.ge.s32 %p2, %r64, %r2;@%p2 bra BB12_17;mov.u64 %rd1, %rd6;mov.u32 %r29, %ntid.x;mov.u32 %r30, %ctaid.x;mov.u32 %r31, %tid.x;mad.lo.s32 %r3, %r29, %r30, %r31;mov.u32 %r4, %nctaid.y;mov.u32 %r32, %nctaid.x;mul.lo.s32 %r5, %r32, %r29;and.b16 %rs2, %rs1, 255;BB12_2:ld.param.u64 %rd7, [%rd1+16];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r33, [%rd1+24];mul.lo.s32 %r34, %r33, %r64;cvt.s64.s32 %rd3, %r34;mul.wide.s32 %rd8, %r34, 136;add.s64 %rd4, %rd2, %rd8;ld.param.u64 %rd9, [%rd1];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r35, [%rd1+8];ld.global.u32 %r7, [%rd4];mul.lo.s32 %r36, %r35, %r7;mul.wide.s32 %rd11, %r36, 40;add.s64 %rd12, %rd10, %rd11;ld.global.u32 %r8, [%rd12+12];ld.global.v2.u32 {%r37, %r38}, [%rd12+24];setp.ne.s32 %p3, %r37, 2147483647;setp.ne.s16 %p4, %rs2, 0;and.pred %p1, %p3, %p4;ld.global.v2.u32 {%r39, %r40}, [%rd12+32];selp.b32 %r14, %r37, %r39, %p1;setp.gt.s32 %p5, %r14, -1;xor.b32 %r41, %r14, 2147483647;selp.b32 %r42, %r14, %r41, %p5;mov.b32 %f3, %r42;ld.param.f32 %f4, [%rd1+376];add.f32 %f5, %f4, %f3;mov.b32 %r43, %f5;setp.gt.s32 %p6, %r43, -1;xor.b32 %r44, %r43, 2147483647;selp.b32 %r15, %r43, %r44, %p6;ld.global.u32 %r16, [%rd12+4];setp.ge.s32 %p7, %r3, %r16;@%p7 bra BB12_16;selp.b32 %r17, %r38, %r40, %p1;selp.u32 %r18, 1, 0, %p3;mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 120;mov.u32 %r65, %r3;mov.u32 %r66, %r3;@%p1 bra BB12_9;bra.uni BB12_4;BB12_9:setp.ne.s32 %p12, %r66, 0;@%p12 bra BB12_11;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_11:ld.param.u64 %rd29, [%rd1+48];cvta.to.global.u64 %rd30, %rd29;ld.param.u32 %r52, [%rd1+56];mul.lo.s32 %r53, %r52, %r7;cvt.s64.s32 %rd31, %r53;cvt.s64.s32 %rd32, %r66;add.s64 %rd33, %rd31, %rd32;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd30, %rd34;ld.param.u64 %rd36, [%rd1+360];cvta.to.global.u64 %rd37, %rd36;ld.global.v2.u32 {%r54, %r55}, [%rd35];mul.wide.s32 %rd38, %r54, 4;add.s64 %rd39, %rd37, %rd38;ld.global.f32 %f1, [%rd39];mov.u32 %r67, 2147483647;setp.eq.f32 %p13, %f1, %f2;@%p13 bra BB12_13;xor.b32 %r56, %r55, 2147483647;setp.gt.s32 %p14, %r55, -1;selp.b32 %r57, %r55, %r56, %p14;mov.b32 %f6, %r57;add.f32 %f7, %f6, %f1;mov.b32 %r58, %f7;setp.gt.s32 %p15, %r58, -1;xor.b32 %r59, %r58, 2147483647;selp.b32 %r67, %r58, %r59, %p15;BB12_13:setp.ge.s32 %p16, %r67, %r15;@%p16 bra BB12_15;atom.global.add.u32 %r60, [%rd5], 1;ld.param.u64 %rd40, [%rd1+176];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r61, [%rd1+184];mul.lo.s32 %r62, %r61, %r64;cvt.s64.s32 %rd42, %r62;cvt.s64.s32 %rd43, %r60;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd41, %rd45;add.s32 %r63, %r66, %r8;st.global.v2.u32 [%rd46], {%r63, %r67};BB12_15:add.s32 %r66, %r5, %r66;setp.lt.s32 %p17, %r66, %r16;@%p17 bra BB12_9;bra.uni BB12_16;BB12_4:setp.ne.s32 %p9, %r65, 0;@%p9 bra BB12_6;st.global.v2.u32 [%rd4+112], {%r14, %r17};st.global.u32 [%rd4+124], %r18;BB12_6:ld.param.u64 %rd15, [%rd1+48];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r45, [%rd1+56];mul.lo.s32 %r46, %r45, %r7;cvt.s64.s32 %rd17, %r46;cvt.s64.s32 %rd18, %r65;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;ld.global.u32 %r20, [%rd21+4];setp.ge.s32 %p10, %r20, %r15;@%p10 bra BB12_8;atom.global.add.u32 %r47, [%rd5], 1;ld.param.u64 %rd22, [%rd1+176];cvta.to.global.u64 %rd23, %rd22;ld.param.u32 %r48, [%rd1+184];mul.lo.s32 %r49, %r48, %r64;cvt.s64.s32 %rd24, %r49;cvt.s64.s32 %rd25, %r47;add.s64 %rd26, %rd24, %rd25;shl.b64 %rd27, %rd26, 3;add.s64 %rd28, %rd23, %rd27;add.s32 %r50, %r65, %r8;st.global.v2.u32 [%rd28], {%r50, %r20};BB12_8:add.s32 %r65, %r5, %r65;setp.lt.s32 %p11, %r65, %r16;@%p11 bra BB12_4;BB12_16:add.s32 %r64, %r4, %r64;setp.lt.s32 %p18, %r64, %r2;@%p18 bra BB12_2;BB12_17:ret;}.visible .entry _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<3>;.reg .b32 %r<15>;.reg .b64 %rd<12>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r14, %ctaid.y;setp.ge.s32 %p1, %r14, %r2;@%p1 bra BB13_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];mov.u32 %r5, %nctaid.y;BB13_2:mul.lo.s32 %r8, %r3, %r14;mul.lo.s32 %r9, %r4, %r14;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd2, %rd7;mul.wide.s32 %rd9, %r8, 136;add.s64 %rd10, %rd1, %rd9;ld.global.u64 %rd11, [%rd10+112];st.global.u64 [%rd8+112], %rd11;ld.global.v2.u32 {%r10, %r11}, [%rd10+120];st.global.v2.u32 [%rd8+120], {%r10, %r11};add.s32 %r14, %r5, %r14;setp.lt.s32 %p2, %r14, %r2;@%p2 bra BB13_2;BB13_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<35>;.reg .b16 %rs<18>;.reg .f32 %f<9>;.reg .b32 %r<251>;.reg .b64 %rd<68>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[9280];.shared .align 4 .b8 _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram[1024];mov.b64 %rd17, _ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p3, %r240, %r2;@%p3 bra BB14_44;mov.u64 %rd1, %rd17;mov.u32 %r61, %ntid.x;mov.u32 %r62, %ctaid.x;mul.lo.s32 %r3, %r61, %r62;mov.u32 %r4, %tid.x;shr.u32 %r5, %r4, 5;mov.u32 %r63, %nctaid.x;mul.lo.s32 %r6, %r63, %r61;mov.u32 %r7, %nctaid.y;mov.u32 %r64, 254;sub.s32 %r65, %r64, %r4;shr.u32 %r66, %r65, 8;add.s32 %r8, %r66, 1;shl.b32 %r67, %r4, 2;mov.u32 %r68, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE14smem_histogram;add.s32 %r9, %r68, %r67;mov.u32 %r69, _ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r10, %r69, %r4;add.s32 %r11, %r69, %r67;mad.lo.s32 %r12, %r4, 36, %r69;shl.b32 %r70, %r5, 2;add.s32 %r71, %r69, %r70;and.b32 %r14, %r8, 3;cvt.s64.s32 %rd2, %r4;mov.u32 %r109, %laneid;BB14_2:ld.param.s8 %rs15, [_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2];ld.param.u64 %rd18, [%rd1+16];cvta.to.global.u64 %rd4, %rd18;ld.param.u32 %r72, [%rd1+24];mul.lo.s32 %r73, %r72, %r240;cvt.s64.s32 %rd5, %r73;mul.wide.s32 %rd19, %r73, 136;add.s64 %rd6, %rd4, %rd19;ld.global.u32 %r17, [%rd6];and.b16 %rs6, %rs15, 255;setp.eq.s16 %p4, %rs6, 0;@%p4 bra BB14_4;bra.uni BB14_3;BB14_4:mul.lo.s64 %rd22, %rd5, 136;add.s64 %rd23, %rd4, %rd22;add.s64 %rd65, %rd23, 20;bra.uni BB14_5;BB14_3:mul.lo.s64 %rd20, %rd5, 136;add.s64 %rd21, %rd4, %rd20;add.s64 %rd65, %rd21, 36;BB14_5:ld.global.u32 %r18, [%rd65];ld.global.u8 %rs7, [%rd6+96];setp.ne.s16 %p5, %rs7, 0;@%p5 bra BB14_8;add.s64 %rd64, %rd1, 392;ld.param.u32 %r74, [%rd64+4];setp.le.s32 %p6, %r18, %r74;@%p6 bra BB14_43;mov.u16 %rs8, 1;st.global.u8 [%rd6+96], %rs8;BB14_8:mov.u32 %r75, 0;st.shared.u32 [%r9], %r75;ld.global.f32 %f1, [%rd6+84];ld.global.v2.f32 {%f5, %f6}, [%rd6+88];setp.ge.s32 %p7, %r3, %r18;mov.u32 %r241, %r3;@%p7 bra BB14_32;BB14_9:add.s32 %r20, %r241, %r4;mov.u16 %rs17, 255;mov.u32 %r242, 8;setp.ge.s32 %p8, %r20, %r18;@%p8 bra BB14_17;and.b16 %rs16, %rs15, 255;setp.eq.s16 %p34, %rs16, 0;cvt.s64.s32 %rd10, %r20;@%p34 bra BB14_12;bra.uni BB14_11;BB14_12:ld.param.u64 %rd30, [%rd1+48];cvta.to.global.u64 %rd31, %rd30;ld.param.u32 %r80, [%rd1+56];mul.lo.s32 %r81, %r80, %r17;cvt.s64.s32 %rd32, %r81;add.s64 %rd33, %rd32, %rd10;shl.b64 %rd34, %rd33, 3;add.s64 %rd35, %rd31, %rd34;add.s64 %rd66, %rd35, 4;bra.uni BB14_13;BB14_11:ld.param.u64 %rd24, [%rd1+128];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r78, [%rd1+136];mul.lo.s32 %r79, %r78, %r240;cvt.s64.s32 %rd26, %r79;add.s64 %rd27, %rd26, %rd10;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;add.s64 %rd66, %rd29, 4;BB14_13:ld.global.u32 %r84, [%rd66];setp.gt.s32 %p10, %r84, -1;xor.b32 %r85, %r84, 2147483647;selp.b32 %r86, %r84, %r85, %p10;mov.b32 %f7, %r86;sub.f32 %f4, %f7, %f1;mov.u16 %rs11, 0;setp.le.f32 %p11, %f4, 0f00000000;@%p11 bra BB14_14;setp.geu.f32 %p12, %f4, %f5;@%p12 bra BB14_17;div.rm.f32 %f8, %f4, %f6;cvt.rzi.u32.f32 %r91, %f8;add.s32 %r92, %r91, 1;cvt.u16.u32 %rs17, %r92;bra.uni BB14_17;BB14_14:mov.u16 %rs17, %rs11;BB14_17:mov.u32 %r243, %r75;bra.uni BB14_18;BB14_45:bar.sync 0;add.s32 %r242, %r242, -4;BB14_18:shl.b32 %r238, %r4, 2;st.shared.u32 [%r11], %r75;st.shared.u32 [%r11+1024], %r75;st.shared.u32 [%r11+2048], %r75;st.shared.u32 [%r11+3072], %r75;st.shared.u32 [%r11+4096], %r75;st.shared.u32 [%r11+5120], %r75;st.shared.u32 [%r11+6144], %r75;st.shared.u32 [%r11+7168], %r75;st.shared.u32 [%r11+8192], %r75;cvt.u32.u16 %r98, %rs17;and.b32 %r94, %r98, 255;mov.u32 %r99, 4;min.s32 %r96, %r242, %r99;bfe.u32 %r93, %r94, %r243, %r96;and.b32 %r100, %r93, 7;shl.b32 %r101, %r100, 10;add.s32 %r103, %r69, %r101;add.s32 %r105, %r103, %r238;shr.u32 %r106, %r93, 2;and.b32 %r107, %r106, 1073741822;add.s32 %r24, %r105, %r107;ld.shared.u16 %r25, [%r24];add.s32 %r108, %r25, 1;st.shared.u16 [%r24], %r108;bar.sync 0;ld.shared.u32 %r26, [%r12+4];ld.shared.u32 %r27, [%r12];add.s32 %r140, %r26, %r27;ld.shared.u32 %r28, [%r12+8];add.s32 %r141, %r28, %r140;ld.shared.u32 %r29, [%r12+12];add.s32 %r142, %r29, %r141;ld.shared.u32 %r30, [%r12+16];add.s32 %r143, %r30, %r142;ld.shared.u32 %r31, [%r12+20];add.s32 %r144, %r31, %r143;ld.shared.u32 %r32, [%r12+24];add.s32 %r145, %r32, %r144;ld.shared.u32 %r33, [%r12+28];add.s32 %r146, %r33, %r145;ld.shared.u32 %r147, [%r12+32];add.s32 %r114, %r147, %r146;mov.u32 %r112, 1;mov.u32 %r137, 0;mov.u32 %r139, -1;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r114, %r112, %r137, %r139; @p add.u32 r0, r0, %r114; mov.u32 %r110, r0;}mov.u32 %r118, 2;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r110, %r118, %r137, %r139; @p add.u32 r0, r0, %r110; mov.u32 %r116, r0;}{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r116, %r99, %r137, %r139; @p add.u32 r0, r0, %r116; mov.u32 %r122, r0;}mov.u32 %r130, 8;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r122, %r130, %r137, %r139; @p add.u32 r0, r0, %r122; mov.u32 %r128, r0;}mov.u32 %r136, 16;{ .reg .u32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r128, %r136, %r137, %r139; @p add.u32 r0, r0, %r128; mov.u32 %r134, r0;}setp.ne.s32 %p13, %r109, 31;@%p13 bra BB14_20;add.s32 %r234, %r71, 9216;st.shared.u32 [%r234], %r134;BB14_20:sub.s32 %r37, %r134, %r114;setp.eq.s32 %p1, %r5, 0;bar.sync 0;ld.shared.v4.u32 {%r148, %r149, %r150, %r151}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9216];add.s32 %r154, %r149, %r148;setp.eq.s32 %p14, %r5, 2;selp.b32 %r155, %r154, %r148, %p14;add.s32 %r157, %r154, %r150;setp.eq.s32 %p15, %r5, 3;selp.b32 %r158, %r157, %r155, %p15;add.s32 %r160, %r157, %r151;setp.eq.s32 %p16, %r5, 4;selp.b32 %r161, %r160, %r158, %p16;ld.shared.v4.u32 {%r162, %r163, %r164, %r165}, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9232];add.s32 %r167, %r160, %r162;setp.eq.s32 %p17, %r5, 5;selp.b32 %r168, %r167, %r161, %p17;add.s32 %r170, %r167, %r163;setp.eq.s32 %p18, %r5, 6;selp.b32 %r171, %r170, %r168, %p18;add.s32 %r38, %r170, %r164;setp.eq.s32 %p19, %r5, 7;selp.b32 %r173, %r38, %r171, %p19;setp.eq.s32 %p20, %r109, 0;selp.b32 %r174, 0, %r37, %p20;add.s32 %r175, %r173, %r174;selp.b32 %r244, %r37, %r175, %p1;@!%p1 bra BB14_23;bra.uni BB14_21;BB14_21:ld.shared.u32 %r176, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9244];add.s32 %r177, %r38, %r176;shl.b32 %r40, %r177, 16;setp.ne.s32 %p21, %r109, 0;@%p21 bra BB14_23;st.shared.u32 [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256], %r40;mov.u32 %r244, %r40;BB14_23:bar.sync 0;setp.eq.s32 %p22, %r4, 0;@%p22 bra BB14_25;ld.shared.u32 %r178, [_ZZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage+9256];add.s32 %r244, %r178, %r244;BB14_25:add.s32 %r179, %r27, %r244;add.s32 %r180, %r26, %r179;add.s32 %r181, %r28, %r180;add.s32 %r182, %r29, %r181;add.s32 %r183, %r30, %r182;add.s32 %r184, %r31, %r183;add.s32 %r185, %r32, %r184;add.s32 %r186, %r33, %r185;st.shared.u32 [%r12], %r244;st.shared.u32 [%r12+4], %r179;st.shared.u32 [%r12+8], %r180;st.shared.u32 [%r12+12], %r181;st.shared.u32 [%r12+16], %r182;st.shared.u32 [%r12+20], %r183;st.shared.u32 [%r12+24], %r184;st.shared.u32 [%r12+28], %r185;st.shared.u32 [%r12+32], %r186;bar.sync 0;ld.shared.u16 %r187, [%r24];add.s32 %r44, %r187, %r25;bar.sync 0;add.s32 %r189, %r69, %r44;st.shared.u8 [%r189], %rs17;bar.sync 0;ld.shared.u8 %rs17, [%r10];add.s32 %r243, %r243, 4;setp.lt.s32 %p23, %r243, 8;@%p23 bra BB14_45;bar.sync 0;mov.u32 %r190, 256;st.shared.u32 [%r11+512], %r190;st.shared.u32 [%r11+1536], %r190;bar.sync 0;st.shared.u8 [%r10+256], %rs17;bar.sync 0;mul.wide.u16 %r191, %rs17, 4;add.s32 %r193, %r69, %r191;@%p22 bra BB14_29;ld.shared.u8 %rs4, [%r10+255];setp.eq.s16 %p24, %rs4, %rs17;@%p24 bra BB14_29;add.s32 %r235, %r193, 512;st.shared.u32 [%r235], %r4;mul.wide.u16 %r194, %rs4, 4;add.s32 %r196, %r69, %r194;st.shared.u32 [%r196+1536], %r4;BB14_29:setp.ne.s32 %p25, %r4, 0;@%p25 bra BB14_31;mov.u32 %r239, 0;add.s32 %r236, %r193, 512;st.shared.u32 [%r236], %r239;BB14_31:bar.sync 0;ld.shared.u32 %r198, [%r11+512];ld.shared.u32 %r199, [%r11+1536];sub.s32 %r200, %r199, %r198;ld.shared.u32 %r201, [%r9];add.s32 %r202, %r200, %r201;st.shared.u32 [%r9], %r202;bar.sync 0;add.s32 %r241, %r6, %r241;setp.lt.s32 %p26, %r241, %r18;@%p26 bra BB14_9;BB14_32:setp.gt.s32 %p27, %r4, 254;@%p27 bra BB14_42;setp.eq.s32 %p28, %r14, 0;mov.u32 %r250, %r4;@%p28 bra BB14_39;setp.eq.s32 %p29, %r14, 1;mov.u32 %r247, %r4;@%p29 bra BB14_38;setp.eq.s32 %p30, %r14, 2;mov.u32 %r246, %r4;@%p30 bra BB14_37;add.s32 %r246, %r4, 256;ld.shared.u32 %r203, [%r9];ld.param.u64 %rd36, [%rd1+208];cvta.to.global.u64 %rd37, %rd36;ld.param.u32 %r204, [%rd1+216];mul.lo.s32 %r205, %r204, %r240;cvt.s64.s32 %rd38, %r205;add.s64 %rd39, %rd38, %rd2;shl.b64 %rd40, %rd39, 2;add.s64 %rd41, %rd37, %rd40;atom.global.add.u32 %r206, [%rd41], %r203;BB14_37:shl.b32 %r207, %r246, 2;add.s32 %r209, %r68, %r207;ld.shared.u32 %r210, [%r209];ld.param.u64 %rd42, [%rd1+208];cvta.to.global.u64 %rd43, %rd42;ld.param.u32 %r211, [%rd1+216];mul.lo.s32 %r212, %r211, %r240;cvt.s64.s32 %rd44, %r212;cvt.s64.s32 %rd45, %r246;add.s64 %rd46, %rd44, %rd45;shl.b64 %rd47, %rd46, 2;add.s64 %rd48, %rd43, %rd47;atom.global.add.u32 %r213, [%rd48], %r210;add.s32 %r247, %r246, 256;BB14_38:shl.b32 %r214, %r247, 2;add.s32 %r216, %r68, %r214;ld.shared.u32 %r217, [%r216];ld.param.u64 %rd49, [%rd1+208];cvta.to.global.u64 %rd50, %rd49;ld.param.u32 %r218, [%rd1+216];mul.lo.s32 %r219, %r218, %r240;cvt.s64.s32 %rd51, %r219;cvt.s64.s32 %rd52, %r247;add.s64 %rd53, %rd51, %rd52;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd50, %rd54;atom.global.add.u32 %r220, [%rd55], %r217;add.s32 %r250, %r247, 256;BB14_39:setp.lt.u32 %p31, %r8, 4;@%p31 bra BB14_42;mul.wide.s32 %rd67, %r250, 4;shl.b32 %r221, %r250, 2;add.s32 %r249, %r68, %r221;BB14_41:ld.shared.u32 %r223, [%r249];ld.param.u64 %rd56, [%rd1+208];ld.param.u32 %r224, [%rd1+216];mul.lo.s32 %r225, %r240, %r224;mul.wide.s32 %rd57, %r225, 4;ld.shared.u32 %r226, [%r249+1024];ld.shared.u32 %r227, [%r249+2048];ld.shared.u32 %r228, [%r249+3072];cvta.to.global.u64 %rd58, %rd56;add.s64 %rd59, %rd58, %rd57;add.s64 %rd60, %rd59, %rd67;atom.global.add.u32 %r229, [%rd60], %r223;add.s64 %rd61, %rd60, 1024;atom.global.add.u32 %r230, [%rd61], %r226;add.s64 %rd62, %rd60, 2048;atom.global.add.u32 %r231, [%rd62], %r227;add.s64 %rd63, %rd60, 3072;atom.global.add.u32 %r232, [%rd63], %r228;add.s64 %rd67, %rd67, 4096;add.s32 %r249, %r249, 4096;add.s32 %r250, %r250, 1024;setp.lt.s32 %p32, %r250, 255;@%p32 bra BB14_41;BB14_42:bar.sync 0;BB14_43:add.s32 %r240, %r7, %r240;setp.lt.s32 %p33, %r240, %r2;@%p33 bra BB14_2;BB14_44:ret;}.visible .entry _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb(.param .align 8 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1[4],.param .u8 _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_2){.reg .pred %p<12>;.reg .b16 %rs<2>;.reg .f32 %f<8>;.reg .b32 %r<96>;.reg .b64 %rd<15>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage[1184];mov.b64 %rd5, _ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_param_1];mov.u64 %rd1, %rd5;mov.u32 %r94, %ctaid.y;setp.ge.s32 %p1, %r94, %r2;@%p1 bra BB15_10;ld.param.u32 %r3, [%rd1+396];ld.param.u64 %rd6, [%rd1+16];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd1+24];mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;cvt.s64.s32 %rd3, %r6;shr.u32 %r13, %r6, 3;add.s32 %r14, %r13, %r6;cvt.rn.f32.s32 %f1, %r6;shl.b32 %r15, %r14, 2;mov.u32 %r16, _ZZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbE12temp_storage;add.s32 %r7, %r16, %r15;mul.lo.s32 %r17, %r6, 9;shl.b32 %r18, %r17, 2;add.s32 %r8, %r16, %r18;BB15_2:mul.lo.s32 %r19, %r4, %r94;mul.wide.s32 %rd7, %r19, 136;add.s64 %rd8, %rd2, %rd7;add.s64 %rd4, %rd8, 96;ld.global.u8 %rs1, [%rd8+96];setp.eq.s16 %p2, %rs1, 0;@%p2 bra BB15_9;cvt.u32.u64 %r21, %rd3;ld.global.f32 %f2, [%rd4+-12];ld.global.f32 %f3, [%rd4+-4];mov.u32 %r95, 0;setp.gt.s32 %p3, %r21, 254;@%p3 bra BB15_5;ld.param.u64 %rd9, [%rd1+208];cvta.to.global.u64 %rd10, %rd9;ld.param.u32 %r22, [%rd1+216];mul.lo.s32 %r23, %r22, %r94;cvt.s64.s32 %rd11, %r23;add.s64 %rd12, %rd11, %rd3;shl.b64 %rd13, %rd12, 2;add.s64 %rd14, %rd10, %rd13;ld.global.u32 %r95, [%rd14];BB15_5:st.shared.u32 [%r7+16], %r95;bar.sync 0;setp.gt.u32 %p4, %r6, 31;@%p4 bra BB15_7;ld.shared.u32 %r54, [%r8+20];ld.shared.u32 %r55, [%r8+16];add.s32 %r56, %r54, %r55;ld.shared.u32 %r57, [%r8+24];add.s32 %r58, %r56, %r57;ld.shared.u32 %r59, [%r8+28];add.s32 %r60, %r58, %r59;ld.shared.u32 %r61, [%r8+32];add.s32 %r62, %r60, %r61;ld.shared.u32 %r63, [%r8+36];add.s32 %r64, %r62, %r63;ld.shared.u32 %r65, [%r8+40];add.s32 %r66, %r64, %r65;ld.shared.u32 %r67, [%r8+44];add.s32 %r28, %r66, %r67;mov.u32 %r26, 1;mov.u32 %r51, 0;mov.u32 %r53, -1;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r28, %r26, %r51, %r53; @p add.s32 r0, r0, %r28; mov.s32 %r24, r0;}mov.u32 %r32, 2;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r24, %r32, %r51, %r53; @p add.s32 r0, r0, %r24; mov.s32 %r30, r0;}mov.u32 %r38, 4;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r30, %r38, %r51, %r53; @p add.s32 r0, r0, %r30; mov.s32 %r36, r0;}mov.u32 %r44, 8;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r36, %r44, %r51, %r53; @p add.s32 r0, r0, %r36; mov.s32 %r42, r0;}mov.u32 %r50, 16;{ .reg .s32 r0; .reg .pred p; shfl.sync.up.b32 r0|p, %r42, %r50, %r51, %r53; @p add.s32 r0, r0, %r42; mov.s32 %r48, r0;}sub.s32 %r68, %r48, %r28;ld.shared.u32 %r69, [%r8+16];add.s32 %r70, %r69, %r68;ld.shared.u32 %r71, [%r8+20];add.s32 %r72, %r71, %r70;ld.shared.u32 %r73, [%r8+24];add.s32 %r74, %r73, %r72;ld.shared.u32 %r75, [%r8+28];add.s32 %r76, %r75, %r74;ld.shared.u32 %r77, [%r8+32];add.s32 %r78, %r77, %r76;ld.shared.u32 %r79, [%r8+36];add.s32 %r80, %r79, %r78;ld.shared.u32 %r81, [%r8+40];add.s32 %r82, %r81, %r80;st.shared.u32 [%r8+16], %r68;st.shared.u32 [%r8+20], %r70;st.shared.u32 [%r8+24], %r72;st.shared.u32 [%r8+28], %r74;st.shared.u32 [%r8+32], %r76;st.shared.u32 [%r8+36], %r78;st.shared.u32 [%r8+40], %r80;st.shared.u32 [%r8+44], %r82;BB15_7:bar.sync 0;ld.shared.u32 %r83, [%r7+16];setp.lt.s32 %p5, %r83, %r3;add.s32 %r84, %r83, %r95;setp.ge.s32 %p6, %r84, %r3;and.pred %p7, %p5, %p6;@!%p7 bra BB15_9;bra.uni BB15_8;BB15_8:ld.global.u32 %r85, [%rd4+-32];setp.gt.s32 %p8, %r85, -1;xor.b32 %r86, %r85, 2147483647;selp.b32 %r87, %r85, %r86, %p8;mov.b32 %f4, %r87;sub.f32 %f5, %f2, %f4;fma.rn.f32 %f6, %f3, %f1, %f5;mov.b32 %r88, %f6;setp.gt.s32 %p9, %r88, -1;xor.b32 %r89, %r88, 2147483647;selp.b32 %r90, %r88, %r89, %p9;st.global.u32 [%rd4+-28], %r90;st.global.u32 [%rd4+-24], %r90;add.f32 %f7, %f4, %f6;mov.b32 %r91, %f7;setp.gt.s32 %p10, %r91, -1;xor.b32 %r92, %r91, 2147483647;selp.b32 %r93, %r91, %r92, %p10;st.global.u32 [%rd4+-16], %r93;BB15_9:add.s32 %r94, %r5, %r94;setp.lt.s32 %p11, %r94, %r2;@%p11 bra BB15_2;BB15_10:ret;}.visible .entry _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<17>;.reg .f32 %f<6>;.reg .b32 %r<75>;.reg .b64 %rd<63>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r68, %ctaid.y;setp.ge.s32 %p1, %r68, %r2;@%p1 bra BB16_16;mov.u64 %rd1, %rd12;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mov.u32 %r32, %tid.x;mad.lo.s32 %r3, %r30, %r31, %r32;mov.u32 %r4, %nctaid.y;mov.u32 %r33, %nctaid.x;mul.lo.s32 %r5, %r33, %r30;BB16_2:ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd14, %rd13;ld.param.u32 %r34, [%rd1+24];mul.lo.s32 %r35, %r34, %r68;mul.wide.s32 %rd15, %r35, 136;add.s64 %rd2, %rd14, %rd15;ld.global.u32 %r7, [%rd2];ld.global.u32 %r8, [%rd2+64];setp.gt.s32 %p2, %r8, -1;xor.b32 %r36, %r8, 2147483647;selp.b32 %r37, %r8, %r36, %p2;mov.b32 %f1, %r37;ld.global.u32 %r9, [%rd2+20];setp.ge.s32 %p3, %r3, %r9;@%p3 bra BB16_15;ld.param.u64 %rd16, [%rd1];ld.param.u32 %r38, [%rd1+8];mul.lo.s32 %r39, %r38, %r7;cvta.to.global.u64 %rd17, %rd16;mul.wide.s32 %rd18, %r39, 40;add.s64 %rd19, %rd17, %rd18;add.s64 %rd3, %rd19, 12;ld.global.u32 %r10, [%rd19+12];ld.param.u64 %rd62, [%rd1+48];ld.param.u32 %r69, [%rd1+56];mov.u32 %r70, %r3;BB16_4:mul.lo.s32 %r40, %r69, %r7;cvt.s64.s32 %rd20, %r40;cvt.s64.s32 %rd6, %r70;add.s64 %rd21, %rd20, %rd6;cvta.to.global.u64 %rd22, %rd62;shl.b64 %rd23, %rd21, 3;add.s64 %rd24, %rd22, %rd23;ld.global.v2.u32 {%r41, %r42}, [%rd24];setp.eq.s32 %p4, %r8, %r42;@%p4 bra BB16_6;bra.uni BB16_5;BB16_6:add.s32 %r48, %r70, %r10;mov.u32 %r71, 0;st.global.v2.u32 [%rd3+20], {%r71, %r48};st.global.u32 [%rd2+128], %r70;bra.uni BB16_7;BB16_5:setp.gt.s32 %p5, %r42, -1;xor.b32 %r43, %r42, 2147483647;selp.b32 %r44, %r42, %r43, %p5;mov.b32 %f2, %r44;sub.f32 %f3, %f2, %f1;mov.b32 %r45, %f3;setp.gt.s32 %p6, %r45, -1;xor.b32 %r46, %r45, 2147483647;selp.b32 %r71, %r45, %r46, %p6;BB16_7:ld.param.u64 %rd7, [%rd1+160];cvta.to.global.u64 %rd8, %rd7;ld.param.u32 %r50, [%rd1+168];mul.lo.s32 %r51, %r50, %r68;cvt.s64.s32 %rd9, %r51;ld.param.u32 %r20, [%rd1+392];rem.s32 %r72, %r41, %r20;mov.u32 %r73, 0;BB16_8:cvt.s64.s32 %rd25, %r72;add.s64 %rd10, %rd25, %rd9;shl.b64 %rd26, %rd10, 4;add.s64 %rd27, %rd8, %rd26;mov.u32 %r52, -1;atom.global.cas.b32 %r53, [%rd27], %r52, %r41;setp.eq.s32 %p7, %r53, -1;setp.eq.s32 %p8, %r53, %r41;or.pred %p9, %p7, %p8;@%p9 bra BB16_10;add.s32 %r54, %r72, 1;rem.s32 %r72, %r54, %r20;add.s32 %r73, %r73, 1;setp.lt.s32 %p10, %r73, %r20;@%p10 bra BB16_8;BB16_10:add.s64 %rd29, %rd7, %rd26;setp.ne.s64 %p11, %rd29, 0;@%p11 bra BB16_12;mov.u64 %rd30, $str5;cvta.global.u64 %rd31, %rd30;mov.u64 %rd32, $str6;cvta.global.u64 %rd33, %rd32;mov.u64 %rd34, __unnamed_1;cvta.global.u64 %rd35, %rd34;mov.u32 %r55, 231;mov.u64 %rd36, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd31;.param .b64 param1;st.param.b64 [param1+0], %rd33;.param .b32 param2;st.param.b32 [param2+0], %r55;.param .b64 param3;st.param.b64 [param3+0], %rd35;.param .b64 param4;st.param.b64 [param4+0], %rd36;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 0BB16_12:add.s64 %rd39, %rd27, 4;atom.global.add.u32 %r56, [%rd39], 1;cvt.u64.u32 %rd40, %r71;cvt.u64.u32 %rd41, %r70;bfi.b64 %rd42, %rd40, %rd41, 32, 32;add.s64 %rd43, %rd27, 8;atom.global.min.u64 %rd44, [%rd43], %rd42;ld.param.u64 %rd45, [%rd1+272];cvta.to.global.u64 %rd46, %rd45;ld.param.u32 %r57, [%rd1+280];mul.lo.s32 %r58, %r57, %r68;cvt.s64.s32 %rd47, %r58;add.s64 %rd48, %rd47, %rd6;shl.b64 %rd49, %rd48, 2;add.s64 %rd50, %rd46, %rd49;st.global.u32 [%rd50], %r56;ld.param.u64 %rd62, [%rd1+48];cvta.to.global.u64 %rd51, %rd62;ld.param.u32 %r69, [%rd1+56];mul.lo.s32 %r59, %r69, %r7;cvt.s64.s32 %rd52, %r59;add.s64 %rd53, %rd52, %rd6;shl.b64 %rd54, %rd53, 3;add.s64 %rd55, %rd51, %rd54;st.global.u32 [%rd55+4], %r71;ld.param.u64 %rd56, [%rd1+240];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r60, [%rd1+248];mul.lo.s32 %r61, %r60, %r68;cvt.s64.s32 %rd58, %r61;add.s64 %rd59, %rd58, %rd6;shl.b64 %rd60, %rd59, 2;add.s64 %rd61, %rd57, %rd60;st.global.u32 [%rd61], %r72;setp.ne.s32 %p12, %r70, 0;@%p12 bra BB16_14;ld.global.u32 %r62, [%rd2+80];setp.gt.s32 %p13, %r62, -1;xor.b32 %r63, %r62, 2147483647;selp.b32 %r64, %r62, %r63, %p13;mov.b32 %f4, %r64;sub.f32 %f5, %f4, %f1;mov.b32 %r65, %f5;setp.gt.s32 %p14, %r65, -1;xor.b32 %r66, %r65, 2147483647;selp.b32 %r67, %r65, %r66, %p14;st.global.u32 [%rd2+80], %r67;BB16_14:add.s32 %r70, %r5, %r70;setp.lt.s32 %p15, %r70, %r9;@%p15 bra BB16_4;BB16_15:add.s32 %r68, %r4, %r68;setp.lt.s32 %p16, %r68, %r2;@%p16 bra BB16_2;BB16_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<245>;.reg .b64 %rd<67>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd7, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %ctaid.y;setp.ge.s32 %p2, %r240, %r2;@%p2 bra BB17_18;mov.u64 %rd1, %rd7;ld.param.u64 %rd8, [%rd1+16];cvta.to.global.u64 %rd2, %rd8;ld.param.u32 %r3, [%rd1+24];mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r4, %r30, %r31;mov.u32 %r5, %nctaid.y;mov.u32 %r6, %tid.x;shr.u32 %r32, %r6, 3;add.s32 %r33, %r32, %r6;add.s32 %r7, %r30, -1;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r8, %r34, %r30;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r9, %r36, %r35;mul.lo.s32 %r37, %r6, 9;shl.b32 %r38, %r37, 3;add.s32 %r10, %r36, %r38;mov.u32 %r65, %laneid;BB17_2:mul.lo.s32 %r39, %r3, %r240;mul.wide.s32 %rd9, %r39, 136;add.s64 %rd10, %rd2, %rd9;add.s64 %rd4, %rd10, 80;ld.global.u32 %r12, [%rd10+20];setp.ge.s32 %p3, %r4, %r12;@%p3 bra BB17_17;ld.global.u32 %r13, [%rd4];mov.u32 %r241, %r4;BB17_4:mov.b64 %rd66, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;mov.u64 %rd65, %rd66;ld.param.u64 %rd64, [%rd65+16];ld.param.u32 %r239, [%rd65+24];mul.lo.s32 %r238, %r239, %r240;mul.wide.s32 %rd63, %r238, 136;cvta.to.global.u64 %rd62, %rd64;add.s64 %rd61, %rd62, %rd63;add.s64 %rd60, %rd61, 20;ld.global.u32 %r15, [%rd60+-20];add.s32 %r16, %r241, %r6;mov.u32 %r243, 0;setp.ge.s32 %p4, %r16, %r12;@%p4 bra BB17_5;ld.param.u64 %rd11, [%rd1+48];cvta.to.global.u64 %rd12, %rd11;ld.param.u32 %r44, [%rd1+56];mul.lo.s32 %r45, %r44, %r15;cvt.s64.s32 %rd13, %r45;cvt.s64.s32 %rd5, %r16;add.s64 %rd14, %rd13, %rd5;shl.b64 %rd15, %rd14, 3;add.s64 %rd16, %rd12, %rd15;ld.global.v2.u32 {%r46, %r47}, [%rd16];ld.param.u64 %rd17, [%rd1+240];cvta.to.global.u64 %rd18, %rd17;ld.param.u32 %r48, [%rd1+248];mul.lo.s32 %r49, %r48, %r240;cvt.s64.s32 %rd19, %r49;add.s64 %rd20, %rd19, %rd5;shl.b64 %rd21, %rd20, 2;add.s64 %rd22, %rd18, %rd21;ld.global.u32 %r50, [%rd22];shr.s32 %r51, %r50, 31;xor.b32 %r52, %r51, %r50;ld.param.u64 %rd23, [%rd1+160];cvta.to.global.u64 %rd24, %rd23;ld.param.u32 %r53, [%rd1+168];mul.lo.s32 %r54, %r53, %r240;cvt.s64.s32 %rd25, %r54;cvt.s64.s32 %rd26, %r52;add.s64 %rd27, %rd25, %rd26;shl.b64 %rd28, %rd27, 4;add.s64 %rd29, %rd24, %rd28;ld.global.v2.u32 {%r55, %r56}, [%rd29];ld.global.u64 %rd6, [%rd29+8];cvt.u32.u64 %r57, %rd6;setp.eq.s32 %p5, %r16, %r57;selp.b32 %r58, -1, 0, %p5;xor.b32 %r59, %r58, %r52;st.global.u32 [%rd22], %r59;setp.ne.s32 %p6, %r16, %r57;mov.u32 %r244, %r243;@%p6 bra BB17_10;mov.u32 %r243, 0;setp.ge.s32 %p7, %r47, %r13;@%p7 bra BB17_9;ld.param.u64 %rd30, [%rd1+344];cvta.to.global.u64 %rd31, %rd30;mul.wide.s32 %rd32, %r46, 4;add.s64 %rd33, %rd31, %rd32;ld.global.u32 %r61, [%rd33+4];ld.global.u32 %r62, [%rd33];sub.s32 %r243, %r61, %r62;ld.param.u64 %rd34, [%rd1+80];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r63, [%rd1+88];mul.lo.s32 %r64, %r63, %r15;cvt.s64.s32 %rd36, %r64;add.s64 %rd37, %rd36, %rd5;shl.b64 %rd38, %rd37, 2;add.s64 %rd39, %rd35, %rd38;st.global.u32 [%rd39], %r62;BB17_9:setp.gt.s32 %p8, %r56, 1;selp.b32 %r244, %r56, 0, %p8;bra.uni BB17_10;BB17_5:mov.u32 %r244, %r243;BB17_10:st.shared.v2.u32 [%r9+16], {%r243, %r244};bar.sync 0;setp.gt.u32 %p9, %r6, 31;@%p9 bra BB17_12;ld.shared.v2.u32 {%r126, %r127}, [%r10+24];ld.shared.v2.u32 {%r130, %r131}, [%r10+16];add.s32 %r134, %r126, %r130;add.s32 %r135, %r127, %r131;ld.shared.v2.u32 {%r136, %r137}, [%r10+32];add.s32 %r140, %r134, %r136;add.s32 %r141, %r135, %r137;ld.shared.v2.u32 {%r142, %r143}, [%r10+40];add.s32 %r146, %r140, %r142;add.s32 %r147, %r141, %r143;ld.shared.v2.u32 {%r148, %r149}, [%r10+48];add.s32 %r152, %r146, %r148;add.s32 %r153, %r147, %r149;ld.shared.v2.u32 {%r154, %r155}, [%r10+56];add.s32 %r158, %r152, %r154;add.s32 %r159, %r153, %r155;ld.shared.v2.u32 {%r160, %r161}, [%r10+64];add.s32 %r164, %r158, %r160;add.s32 %r165, %r159, %r161;ld.shared.v2.u32 {%r166, %r167}, [%r10+72];add.s32 %r67, %r164, %r166;add.s32 %r72, %r165, %r167;mov.u32 %r123, 1;mov.u32 %r124, 0;mov.u32 %r125, -1;shfl.sync.up.b32 %r66, %r67, %r123, %r124, %r125;shfl.sync.up.b32 %r71, %r72, %r123, %r124, %r125;setp.lt.s32 %p10, %r65, 1;selp.b32 %r170, 0, %r66, %p10;add.s32 %r77, %r170, %r67;selp.b32 %r171, 0, %r71, %p10;add.s32 %r82, %r171, %r72;mov.u32 %r83, 2;shfl.sync.up.b32 %r76, %r77, %r83, %r124, %r125;shfl.sync.up.b32 %r81, %r82, %r83, %r124, %r125;setp.lt.s32 %p11, %r65, 2;selp.b32 %r172, 0, %r76, %p11;add.s32 %r87, %r172, %r77;selp.b32 %r173, 0, %r81, %p11;add.s32 %r92, %r173, %r82;mov.u32 %r93, 4;shfl.sync.up.b32 %r86, %r87, %r93, %r124, %r125;shfl.sync.up.b32 %r91, %r92, %r93, %r124, %r125;setp.lt.s32 %p12, %r65, 4;selp.b32 %r174, 0, %r86, %p12;add.s32 %r97, %r174, %r87;selp.b32 %r175, 0, %r91, %p12;add.s32 %r102, %r175, %r92;mov.u32 %r103, 8;shfl.sync.up.b32 %r96, %r97, %r103, %r124, %r125;shfl.sync.up.b32 %r101, %r102, %r103, %r124, %r125;setp.lt.s32 %p13, %r65, 8;selp.b32 %r176, 0, %r96, %p13;add.s32 %r107, %r176, %r97;selp.b32 %r177, 0, %r101, %p13;add.s32 %r112, %r177, %r102;mov.u32 %r113, 16;shfl.sync.up.b32 %r106, %r107, %r113, %r124, %r125;shfl.sync.up.b32 %r111, %r112, %r113, %r124, %r125;setp.lt.s32 %p14, %r65, 16;selp.b32 %r178, 0, %r106, %p14;add.s32 %r117, %r178, %r107;selp.b32 %r179, 0, %r111, %p14;add.s32 %r122, %r179, %r112;shfl.sync.up.b32 %r116, %r117, %r123, %r124, %r125;shfl.sync.up.b32 %r121, %r122, %r123, %r124, %r125;setp.eq.s32 %p15, %r65, 0;ld.shared.v2.u32 {%r180, %r181}, [%r10+16];ld.shared.v2.u32 {%r184, %r185}, [%r10+24];ld.shared.v2.u32 {%r188, %r189}, [%r10+32];ld.shared.v2.u32 {%r192, %r193}, [%r10+40];ld.shared.v2.u32 {%r196, %r197}, [%r10+48];ld.shared.v2.u32 {%r200, %r201}, [%r10+56];ld.shared.v2.u32 {%r204, %r205}, [%r10+64];selp.b32 %r208, 0, %r116, %p15;selp.b32 %r209, 0, %r121, %p15;st.shared.v2.u32 [%r10+16], {%r208, %r209};add.s32 %r210, %r181, %r209;add.s32 %r211, %r180, %r208;st.shared.v2.u32 [%r10+24], {%r211, %r210};add.s32 %r212, %r185, %r210;add.s32 %r213, %r184, %r211;st.shared.v2.u32 [%r10+32], {%r213, %r212};add.s32 %r214, %r189, %r212;add.s32 %r215, %r188, %r213;st.shared.v2.u32 [%r10+40], {%r215, %r214};add.s32 %r216, %r193, %r214;add.s32 %r217, %r192, %r215;st.shared.v2.u32 [%r10+48], {%r217, %r216};add.s32 %r218, %r197, %r216;add.s32 %r219, %r196, %r217;st.shared.v2.u32 [%r10+56], {%r219, %r218};add.s32 %r220, %r201, %r218;add.s32 %r221, %r200, %r219;st.shared.v2.u32 [%r10+64], {%r221, %r220};add.s32 %r222, %r205, %r220;add.s32 %r223, %r204, %r221;st.shared.v2.u32 [%r10+72], {%r223, %r222};BB17_12:setp.lt.s32 %p1, %r16, %r12;bar.sync 0;ld.shared.v2.u32 {%r224, %r225}, [%r9+16];@!%p1 bra BB17_14;bra.uni BB17_13;BB17_13:ld.param.u64 %rd40, [%rd1+64];cvta.to.global.u64 %rd41, %rd40;ld.param.u32 %r226, [%rd1+72];mul.lo.s32 %r227, %r226, %r15;cvt.s64.s32 %rd42, %r227;cvt.s64.s32 %rd43, %r16;add.s64 %rd44, %rd42, %rd43;shl.b64 %rd45, %rd44, 2;add.s64 %rd46, %rd41, %rd45;st.global.u32 [%rd46], %r224;ld.param.u64 %rd47, [%rd1+256];cvta.to.global.u64 %rd48, %rd47;ld.param.u32 %r228, [%rd1+264];mul.lo.s32 %r229, %r228, %r240;cvt.s64.s32 %rd49, %r229;add.s64 %rd50, %rd49, %rd43;shl.b64 %rd51, %rd50, 2;add.s64 %rd52, %rd48, %rd51;st.global.u32 [%rd52], %r225;BB17_14:setp.ne.s32 %p16, %r6, %r7;@%p16 bra BB17_16;shr.s32 %r230, %r241, 31;shr.u32 %r231, %r230, 24;add.s32 %r232, %r241, %r231;shr.s32 %r233, %r232, 8;ld.param.u64 %rd53, [%rd1+224];cvta.to.global.u64 %rd54, %rd53;ld.param.u32 %r234, [%rd1+232];mul.lo.s32 %r235, %r234, %r240;cvt.s64.s32 %rd55, %r235;cvt.s64.s32 %rd56, %r233;add.s64 %rd57, %rd55, %rd56;shl.b64 %rd58, %rd57, 3;add.s64 %rd59, %rd54, %rd58;add.s32 %r236, %r225, %r244;add.s32 %r237, %r224, %r243;st.global.v2.u32 [%rd59], {%r237, %r236};BB17_16:bar.sync 0;add.s32 %r241, %r8, %r241;setp.lt.s32 %p17, %r241, %r12;@%p17 bra BB17_4;BB17_17:add.s32 %r240, %r5, %r240;setp.lt.s32 %p18, %r240, %r2;@%p18 bra BB17_2;BB17_18:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<19>;.reg .b32 %r<251>;.reg .b64 %rd<34>;.shared .align 16 .b8 _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage[2336];mov.b64 %rd4, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r245, %ctaid.y;setp.ge.s32 %p2, %r245, %r2;@%p2 bra BB18_16;mov.u64 %rd1, %rd4;mov.u32 %r30, %ntid.x;mov.u32 %r31, %ctaid.x;mul.lo.s32 %r3, %r30, %r31;mov.u32 %r5, %tid.x;shr.u32 %r32, %r5, 3;add.s32 %r33, %r32, %r5;mov.u32 %r34, %nctaid.x;mul.lo.s32 %r6, %r34, %r30;ld.param.u32 %r7, [%rd1+24];ld.param.u64 %rd5, [%rd1+16];cvta.to.global.u64 %rd2, %rd5;shl.b32 %r35, %r33, 3;mov.u32 %r36, _ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage;add.s32 %r8, %r36, %r35;mul.lo.s32 %r37, %r5, 9;shl.b32 %r38, %r37, 3;add.s32 %r9, %r36, %r38;mov.u32 %r52, %laneid;BB18_2:mul.lo.s32 %r39, %r7, %r245;mul.wide.s32 %rd6, %r39, 136;add.s64 %rd7, %rd2, %rd6;ld.global.u32 %r11, [%rd7+20];add.s32 %r40, %r11, 255;shr.s32 %r41, %r40, 31;shr.u32 %r42, %r41, 24;add.s32 %r43, %r40, %r42;shr.s32 %r12, %r43, 8;setp.ge.s32 %p3, %r3, %r12;@%p3 bra BB18_15;mov.u32 %r247, 0;mov.u32 %r246, %r3;mov.u32 %r248, %r247;BB18_4:mov.u32 %r249, 0;add.s32 %r17, %r246, %r5;setp.ge.s32 %p4, %r17, %r12;mov.u32 %r250, %r249;@%p4 bra BB18_6;ld.param.u64 %rd8, [%rd1+224];cvta.to.global.u64 %rd9, %rd8;ld.param.u32 %r48, [%rd1+232];mul.lo.s32 %r49, %r48, %r245;cvt.s64.s32 %rd10, %r49;cvt.s64.s32 %rd11, %r17;add.s64 %rd12, %rd10, %rd11;shl.b64 %rd13, %rd12, 3;add.s64 %rd14, %rd9, %rd13;ld.global.v2.u32 {%r250, %r249}, [%rd14];BB18_6:st.shared.v2.u32 [%r8+16], {%r250, %r249};bar.sync 0;setp.gt.u32 %p5, %r5, 31;@%p5 bra BB18_9;ld.shared.v2.u32 {%r123, %r124}, [%r9+24];ld.shared.v2.u32 {%r127, %r128}, [%r9+16];add.s32 %r131, %r123, %r127;add.s32 %r132, %r124, %r128;ld.shared.v2.u32 {%r133, %r134}, [%r9+32];add.s32 %r137, %r131, %r133;add.s32 %r138, %r132, %r134;ld.shared.v2.u32 {%r139, %r140}, [%r9+40];add.s32 %r143, %r137, %r139;add.s32 %r144, %r138, %r140;ld.shared.v2.u32 {%r145, %r146}, [%r9+48];add.s32 %r149, %r143, %r145;add.s32 %r150, %r144, %r146;ld.shared.v2.u32 {%r151, %r152}, [%r9+56];add.s32 %r155, %r149, %r151;add.s32 %r156, %r150, %r152;ld.shared.v2.u32 {%r157, %r158}, [%r9+64];add.s32 %r161, %r155, %r157;add.s32 %r162, %r156, %r158;ld.shared.v2.u32 {%r163, %r164}, [%r9+72];add.s32 %r54, %r161, %r163;add.s32 %r59, %r162, %r164;mov.u32 %r120, 1;mov.u32 %r121, 0;mov.u32 %r122, -1;shfl.sync.up.b32 %r53, %r54, %r120, %r121, %r122;shfl.sync.up.b32 %r58, %r59, %r120, %r121, %r122;setp.lt.s32 %p6, %r52, 1;selp.b32 %r167, 0, %r53, %p6;add.s32 %r64, %r167, %r54;selp.b32 %r168, 0, %r58, %p6;add.s32 %r69, %r168, %r59;mov.u32 %r70, 2;shfl.sync.up.b32 %r63, %r64, %r70, %r121, %r122;shfl.sync.up.b32 %r68, %r69, %r70, %r121, %r122;setp.lt.s32 %p7, %r52, 2;selp.b32 %r169, 0, %r63, %p7;add.s32 %r74, %r169, %r64;selp.b32 %r170, 0, %r68, %p7;add.s32 %r79, %r170, %r69;mov.u32 %r80, 4;shfl.sync.up.b32 %r73, %r74, %r80, %r121, %r122;shfl.sync.up.b32 %r78, %r79, %r80, %r121, %r122;setp.lt.s32 %p8, %r52, 4;selp.b32 %r171, 0, %r73, %p8;add.s32 %r84, %r171, %r74;selp.b32 %r172, 0, %r78, %p8;add.s32 %r89, %r172, %r79;mov.u32 %r90, 8;shfl.sync.up.b32 %r83, %r84, %r90, %r121, %r122;shfl.sync.up.b32 %r88, %r89, %r90, %r121, %r122;setp.lt.s32 %p9, %r52, 8;selp.b32 %r173, 0, %r83, %p9;add.s32 %r94, %r173, %r84;selp.b32 %r174, 0, %r88, %p9;add.s32 %r99, %r174, %r89;mov.u32 %r100, 16;shfl.sync.up.b32 %r93, %r94, %r100, %r121, %r122;shfl.sync.up.b32 %r98, %r99, %r100, %r121, %r122;setp.lt.s32 %p10, %r52, 16;selp.b32 %r175, 0, %r93, %p10;add.s32 %r114, %r175, %r94;selp.b32 %r176, 0, %r98, %p10;add.s32 %r119, %r176, %r99;mov.u32 %r111, 31;shfl.sync.idx.b32 %r103, %r114, %r111, %r111, %r122;shfl.sync.idx.b32 %r108, %r119, %r111, %r111, %r122;shfl.sync.up.b32 %r113, %r114, %r120, %r121, %r122;shfl.sync.up.b32 %r118, %r119, %r120, %r121, %r122;setp.eq.s32 %p11, %r52, 0;ld.shared.v2.u32 {%r177, %r178}, [%r9+16];ld.shared.v2.u32 {%r181, %r182}, [%r9+24];ld.shared.v2.u32 {%r185, %r186}, [%r9+32];ld.shared.v2.u32 {%r189, %r190}, [%r9+40];ld.shared.v2.u32 {%r193, %r194}, [%r9+48];ld.shared.v2.u32 {%r197, %r198}, [%r9+56];ld.shared.v2.u32 {%r201, %r202}, [%r9+64];selp.b32 %r205, 0, %r113, %p11;selp.b32 %r206, 0, %r118, %p11;st.shared.v2.u32 [%r9+16], {%r205, %r206};add.s32 %r207, %r178, %r206;add.s32 %r208, %r177, %r205;st.shared.v2.u32 [%r9+24], {%r208, %r207};add.s32 %r209, %r182, %r207;add.s32 %r210, %r181, %r208;st.shared.v2.u32 [%r9+32], {%r210, %r209};add.s32 %r211, %r186, %r209;add.s32 %r212, %r185, %r210;st.shared.v2.u32 [%r9+40], {%r212, %r211};add.s32 %r213, %r190, %r211;add.s32 %r214, %r189, %r212;st.shared.v2.u32 [%r9+48], {%r214, %r213};add.s32 %r215, %r194, %r213;add.s32 %r216, %r193, %r214;st.shared.v2.u32 [%r9+56], {%r216, %r215};add.s32 %r217, %r198, %r215;add.s32 %r218, %r197, %r216;st.shared.v2.u32 [%r9+64], {%r218, %r217};add.s32 %r219, %r202, %r217;add.s32 %r220, %r201, %r218;st.shared.v2.u32 [%r9+72], {%r220, %r219};setp.ne.s32 %p12, %r5, 0;@%p12 bra BB18_9;st.shared.v2.u32 [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320], {%r103, %r108};BB18_9:setp.lt.s32 %p1, %r17, %r12;bar.sync 0;ld.shared.v2.u32 {%r221, %r222}, [%r8+16];add.s32 %r24, %r221, %r247;add.s32 %r25, %r222, %r248;ld.shared.v2.u32 {%r225, %r226}, [_ZZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEE15sh_temp_storage+2320];add.s32 %r247, %r225, %r247;add.s32 %r248, %r226, %r248;@!%p1 bra BB18_11;bra.uni BB18_10;BB18_10:ld.param.u64 %rd15, [%rd1+224];cvta.to.global.u64 %rd16, %rd15;ld.param.u32 %r229, [%rd1+232];mul.lo.s32 %r230, %r229, %r245;cvt.s64.s32 %rd17, %r230;cvt.s64.s32 %rd18, %r17;add.s64 %rd19, %rd17, %rd18;shl.b64 %rd20, %rd19, 3;add.s64 %rd21, %rd16, %rd20;st.global.v2.u32 [%rd21], {%r24, %r25};BB18_11:add.s32 %r239, %r11, 255;shr.s32 %r238, %r239, 31;shr.u32 %r237, %r238, 24;add.s32 %r236, %r239, %r237;shr.s32 %r235, %r236, 8;add.s32 %r234, %r235, -1;setp.ne.s32 %p13, %r17, %r234;@%p13 bra BB18_14;ld.param.u64 %rd33, [%rd1+16];ld.param.u32 %r244, [%rd1+24];mul.lo.s32 %r243, %r244, %r245;mul.wide.s32 %rd32, %r243, 136;cvta.to.global.u64 %rd31, %rd33;add.s64 %rd30, %rd31, %rd32;add.s64 %rd29, %rd30, 20;add.s32 %r231, %r24, %r250;st.global.u32 [%rd29+-4], %r231;add.s32 %r232, %r25, %r249;st.global.u32 [%rd29+20], %r232;setp.gt.s32 %p14, %r232, -1;setp.le.s32 %p15, %r232, %r11;and.pred %p16, %p14, %p15;@%p16 bra BB18_14;mov.u64 %rd22, $str;cvta.global.u64 %rd23, %rd22;mov.u64 %rd24, $str1;cvta.global.u64 %rd25, %rd24;mov.u64 %rd26, __unnamed_2;cvta.global.u64 %rd27, %rd26;mov.u32 %r233, 1659;mov.u64 %rd28, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd23;.param .b64 param1;st.param.b64 [param1+0], %rd25;.param .b32 param2;st.param.b32 [param2+0], %r233;.param .b64 param3;st.param.b64 [param3+0], %rd27;.param .b64 param4;st.param.b64 [param4+0], %rd28;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 1BB18_14:add.s32 %r246, %r6, %r246;setp.lt.s32 %p17, %r246, %r12;@%p17 bra BB18_4;BB18_15:ld.param.u32 %r241, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r240, %nctaid.y;add.s32 %r245, %r240, %r245;setp.lt.s32 %p18, %r245, %r241;@%p18 bra BB18_2;BB18_16:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<45>;.reg .b64 %rd<41>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r43, %ctaid.y;setp.ge.s32 %p1, %r43, %r2;@%p1 bra BB19_8;mov.u64 %rd1, %rd12;ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;ld.param.u32 %r3, [%rd1+24];mov.u32 %r14, %ntid.x;mov.u32 %r15, %ctaid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r4, %r14, %r15, %r16;mov.u32 %r5, %nctaid.y;mov.u32 %r17, %nctaid.x;mul.lo.s32 %r6, %r17, %r14;BB19_2:mul.lo.s32 %r18, %r3, %r43;mul.wide.s32 %rd14, %r18, 136;add.s64 %rd15, %rd2, %rd14;add.s64 %rd3, %rd15, 20;ld.global.u32 %r8, [%rd15+20];setp.ge.s32 %p2, %r4, %r8;@%p2 bra BB19_7;ld.param.u64 %rd16, [%rd1+224];cvta.to.global.u64 %rd4, %rd16;ld.param.u32 %r19, [%rd1+232];mul.lo.s32 %r20, %r19, %r43;cvt.s64.s32 %rd5, %r20;ld.param.u64 %rd17, [%rd1+64];cvta.to.global.u64 %rd6, %rd17;ld.param.u32 %r21, [%rd1+72];ld.global.u32 %r22, [%rd3+-20];mul.lo.s32 %r23, %r21, %r22;cvt.s64.s32 %rd7, %r23;ld.param.u64 %rd18, [%rd1+256];cvta.to.global.u64 %rd8, %rd18;ld.param.u32 %r24, [%rd1+264];mul.lo.s32 %r25, %r24, %r43;cvt.s64.s32 %rd9, %r25;ld.param.u64 %rd19, [%rd1+240];cvta.to.global.u64 %rd10, %rd19;ld.param.u32 %r26, [%rd1+248];mul.lo.s32 %r27, %r26, %r43;cvt.s64.s32 %rd11, %r27;mov.u32 %r44, %r4;BB19_4:shr.s32 %r28, %r44, 31;shr.u32 %r29, %r28, 24;add.s32 %r30, %r44, %r29;shr.s32 %r31, %r30, 8;cvt.s64.s32 %rd20, %r31;add.s64 %rd21, %rd5, %rd20;shl.b64 %rd22, %rd21, 3;add.s64 %rd23, %rd4, %rd22;ld.global.v2.u32 {%r32, %r33}, [%rd23];cvt.s64.s32 %rd24, %r44;add.s64 %rd25, %rd7, %rd24;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.global.u32 %r36, [%rd27];add.s32 %r37, %r36, %r32;st.global.u32 [%rd27], %r37;add.s64 %rd28, %rd9, %rd24;shl.b64 %rd29, %rd28, 2;add.s64 %rd30, %rd8, %rd29;ld.global.u32 %r38, [%rd30];add.s32 %r10, %r38, %r33;add.s64 %rd31, %rd11, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd10, %rd32;ld.global.u32 %r11, [%rd33];setp.gt.s32 %p3, %r11, -1;@%p3 bra BB19_6;ld.param.u64 %rd34, [%rd1+160];cvta.to.global.u64 %rd35, %rd34;ld.param.u32 %r39, [%rd1+168];mul.lo.s32 %r40, %r39, %r43;cvt.s64.s32 %rd36, %r40;shr.s32 %r41, %r11, 31;xor.b32 %r42, %r41, %r11;cvt.s64.s32 %rd37, %r42;add.s64 %rd38, %rd36, %rd37;shl.b64 %rd39, %rd38, 4;add.s64 %rd40, %rd35, %rd39;st.global.u32 [%rd40+8], %r10;BB19_6:add.s32 %r44, %r6, %r44;setp.lt.s32 %p4, %r44, %r8;@%p4 bra BB19_4;BB19_7:add.s32 %r43, %r5, %r43;setp.lt.s32 %p5, %r43, %r2;@%p5 bra BB19_2;BB19_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<14>;.reg .f32 %f<5>;.reg .b32 %r<67>;.reg .b64 %rd<76>;mov.b64 %rd12, _ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r65, %ctaid.y;setp.ge.s32 %p1, %r65, %r2;@%p1 bra BB20_11;mov.u64 %rd1, %rd12;mov.u32 %r18, %ntid.x;mov.u32 %r19, %ctaid.x;mov.u32 %r20, %tid.x;mad.lo.s32 %r3, %r18, %r19, %r20;mov.u32 %r4, %nctaid.y;mov.u32 %r21, %nctaid.x;mul.lo.s32 %r5, %r21, %r18;ld.param.u32 %r6, [%rd1+24];ld.param.u64 %rd13, [%rd1+16];cvta.to.global.u64 %rd2, %rd13;add.s64 %rd3, %rd1, 304;BB20_2:mul.lo.s32 %r22, %r6, %r65;mul.wide.s32 %rd14, %r22, 136;add.s64 %rd4, %rd2, %rd14;ld.global.u32 %r8, [%rd4+20];setp.ge.s32 %p2, %r3, %r8;@%p2 bra BB20_10;ld.global.u32 %r9, [%rd4];ld.global.u32 %r10, [%rd4+60];ld.param.u64 %rd15, [%rd1+240];cvta.to.global.u64 %rd5, %rd15;ld.param.u32 %r23, [%rd1+248];mul.lo.s32 %r24, %r23, %r65;cvt.s64.s32 %rd6, %r24;ld.param.u64 %rd16, [%rd1+160];cvta.to.global.u64 %rd7, %rd16;ld.param.u32 %r25, [%rd1+168];mul.lo.s32 %r26, %r25, %r65;cvt.s64.s32 %rd8, %r26;mov.u32 %r66, %r3;BB20_4:cvt.s64.s32 %rd9, %r66;add.s64 %rd17, %rd6, %rd9;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd5, %rd18;ld.global.u32 %r12, [%rd19];shr.s32 %r27, %r12, 31;xor.b32 %r28, %r27, %r12;cvt.s64.s32 %rd20, %r28;add.s64 %rd21, %rd8, %rd20;shl.b64 %rd22, %rd21, 4;add.s64 %rd23, %rd7, %rd22;ld.global.u64 %rd10, [%rd23+8];ld.global.v2.u32 {%r29, %r30}, [%rd23];setp.lt.s32 %p3, %r30, 2;@%p3 bra BB20_9;ld.param.u64 %rd24, [%rd1+48];cvta.to.global.u64 %rd25, %rd24;ld.param.u32 %r31, [%rd1+56];mul.lo.s32 %r32, %r31, %r9;cvt.s64.s32 %rd26, %r32;add.s64 %rd27, %rd26, %rd9;shl.b64 %rd28, %rd27, 3;add.s64 %rd29, %rd25, %rd28;ld.global.u32 %r33, [%rd29+4];setp.gt.s32 %p4, %r33, -1;xor.b32 %r34, %r33, 2147483647;selp.b32 %r35, %r33, %r34, %p4;mov.b32 %f2, %r35;shr.u64 %rd30, %rd10, 32;cvt.u32.u64 %r36, %rd30;setp.gt.s32 %p5, %r36, -1;xor.b32 %r37, %r36, 2147483647;selp.b32 %r38, %r36, %r37, %p5;mov.b32 %f3, %r38;sub.f32 %f1, %f2, %f3;setp.eq.f32 %p6, %f1, 0f00000000;setp.gt.s32 %p7, %r12, -1;or.pred %p8, %p7, %p6;@%p8 bra BB20_7;mov.u64 %rd31, $str2;cvta.global.u64 %rd32, %rd31;mov.u64 %rd33, $str1;cvta.global.u64 %rd34, %rd33;mov.u64 %rd35, __unnamed_3;cvta.global.u64 %rd36, %rd35;mov.u32 %r39, 1771;mov.u64 %rd37, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd32;.param .b64 param1;st.param.b64 [param1+0], %rd34;.param .b32 param2;st.param.b32 [param2+0], %r39;.param .b64 param3;st.param.b64 [param3+0], %rd36;.param .b64 param4;st.param.b64 [param4+0], %rd37;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 2BB20_7:cvt.u32.u64 %r40, %rd10;ld.param.u64 %rd38, [%rd1+112];cvta.to.global.u64 %rd39, %rd38;ld.param.u32 %r41, [%rd1+120];mul.lo.s32 %r42, %r41, %r65;cvt.s64.s32 %rd40, %r42;add.s64 %rd41, %rd40, %rd9;shl.b64 %rd42, %rd41, 3;add.s64 %rd43, %rd39, %rd42;ld.global.v2.u32 {%r43, %r44}, [%rd43];ld.param.u64 %rd44, [%rd1+96];cvta.to.global.u64 %rd45, %rd44;ld.param.u32 %r45, [%rd1+104];mul.lo.s32 %r46, %r45, %r65;cvt.s64.s32 %rd46, %r46;add.s64 %rd47, %rd46, %rd9;shl.b64 %rd48, %rd47, 2;add.s64 %rd49, %rd45, %rd48;ld.param.u64 %rd50, [%rd1+272];cvta.to.global.u64 %rd51, %rd50;ld.param.u32 %r47, [%rd1+280];mul.lo.s32 %r48, %r47, %r65;cvt.s64.s32 %rd52, %r48;add.s64 %rd53, %rd52, %rd9;shl.b64 %rd54, %rd53, 2;add.s64 %rd55, %rd51, %rd54;ld.global.u32 %r49, [%rd55];add.s32 %r50, %r40, %r10;neg.s32 %r51, %r30;ld.global.f32 %f4, [%rd49];st.global.v2.u32 [%rd43], {%r50, %r51};add.s32 %r52, %r49, %r40;ld.param.u64 %rd56, [%rd1+288];cvta.to.global.u64 %rd57, %rd56;ld.param.u32 %r53, [%rd1+296];mul.lo.s32 %r54, %r53, %r65;cvt.s64.s32 %rd58, %r54;cvt.s64.s32 %rd59, %r52;add.s64 %rd60, %rd58, %rd59;shl.b64 %rd61, %rd60, 3;add.s64 %rd62, %rd57, %rd61;st.global.v2.u32 [%rd62], {%r43, %r44};ld.param.u64 %rd63, [%rd1+192];cvta.to.global.u64 %rd64, %rd63;ld.param.u32 %r57, [%rd1+200];mul.lo.s32 %r58, %r57, %r65;cvt.s64.s32 %rd65, %r58;add.s64 %rd66, %rd65, %rd59;shl.b64 %rd67, %rd66, 3;add.s64 %rd68, %rd64, %rd67;st.global.v2.f32 [%rd68], {%f1, %f4};ld.param.u32 %r59, [%rd3+4];ld.global.u32 %r60, [%rd4+56];sub.s32 %r61, %r60, %r59;setp.ge.s32 %p9, %r43, %r61;add.s32 %r62, %r60, %r8;setp.le.s32 %p10, %r43, %r62;and.pred %p11, %p9, %p10;@%p11 bra BB20_9;mov.u64 %rd69, $str3;cvta.global.u64 %rd70, %rd69;mov.u64 %rd71, $str1;cvta.global.u64 %rd72, %rd71;mov.u64 %rd73, __unnamed_3;cvta.global.u64 %rd74, %rd73;mov.u32 %r63, 1797;mov.u64 %rd75, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd70;.param .b64 param1;st.param.b64 [param1+0], %rd72;.param .b32 param2;st.param.b32 [param2+0], %r63;.param .b64 param3;st.param.b64 [param3+0], %rd74;.param .b64 param4;st.param.b64 [param4+0], %rd75;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 3BB20_9:cvt.u32.u64 %r64, %rd9;add.s32 %r66, %r5, %r64;setp.lt.s32 %p12, %r66, %r8;@%p12 bra BB20_4;BB20_10:add.s32 %r65, %r4, %r65;setp.lt.s32 %p13, %r65, %r2;@%p13 bra BB20_2;BB20_11:ret;}.visible .entry _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .b32 %r<33>;.reg .b64 %rd<22>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder20clear_hashmap_kernelENS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r31, %ctaid.y;setp.ge.s32 %p1, %r31, %r2;@%p1 bra BB21_8;mov.u64 %rd1, %rd4;ld.param.u64 %rd2, [%rd1+16];ld.param.u32 %r3, [%rd1+24];mov.u32 %r13, %ntid.x;mov.u32 %r14, %nctaid.x;mul.lo.s32 %r4, %r14, %r13;cvta.to.global.u64 %rd5, %rd2;BB21_2:mul.lo.s32 %r15, %r3, %r31;mul.wide.s32 %rd6, %r15, 136;add.s64 %rd7, %rd5, %rd6;mov.u32 %r16, %ctaid.x;mov.u32 %r18, %tid.x;mad.lo.s32 %r32, %r13, %r16, %r18;ld.global.u32 %r6, [%rd7+20];setp.ge.s32 %p2, %r32, %r6;@%p2 bra BB21_7;ld.param.u64 %rd3, [%rd1+240];ld.param.u32 %r7, [%rd1+248];BB21_4:mul.lo.s32 %r23, %r7, %r31;cvt.s64.s32 %rd8, %r23;cvt.s64.s32 %rd9, %r32;add.s64 %rd10, %rd8, %rd9;cvta.to.global.u64 %rd11, %rd3;shl.b64 %rd12, %rd10, 2;add.s64 %rd13, %rd11, %rd12;ld.global.u32 %r10, [%rd13];setp.gt.s32 %p3, %r10, -1;@%p3 bra BB21_6;ld.param.u64 %rd14, [%rd1+160];cvta.to.global.u64 %rd15, %rd14;ld.param.u32 %r24, [%rd1+168];mul.lo.s32 %r25, %r24, %r31;cvt.s64.s32 %rd16, %r25;shr.s32 %r26, %r10, 31;xor.b32 %r27, %r26, %r10;cvt.s64.s32 %rd17, %r27;add.s64 %rd18, %rd16, %rd17;shl.b64 %rd19, %rd18, 4;add.s64 %rd20, %rd15, %rd19;mov.u32 %r28, 0;mov.u32 %r29, -1;st.global.v2.u32 [%rd20], {%r29, %r28};mov.u64 %rd21, -1;st.global.u64 [%rd20+8], %rd21;BB21_6:add.s32 %r32, %r4, %r32;setp.lt.s32 %p4, %r32, %r6;@%p4 bra BB21_4;BB21_7:mov.u32 %r30, %nctaid.y;add.s32 %r31, %r30, %r31;setp.lt.s32 %p5, %r31, %r2;@%p5 bra BB21_2;BB21_8:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<15>;.reg .b32 %r<337>;.reg .b64 %rd<77>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r314, %ctaid.y;setp.ge.s32 %p2, %r314, %r2;@%p2 bra BB22_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r126, %laneid;BB22_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r314;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB22_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r321, %r3;BB22_4:ld.global.v2.u32 {%r97, %r332}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r321, %r5;mov.u32 %r328, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB22_10;add.s32 %r322, %r95, -1;setp.eq.s32 %p5, %r322, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r324, %r14;@%p5 bra BB22_9;BB22_6:add.s32 %r101, %r324, 1;setp.eq.s32 %p6, %r101, %r322;@%p6 bra BB22_8;sub.s32 %r102, %r322, %r324;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r324;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r324, %r324, %r106, %p7;selp.b32 %r322, %r108, %r322, %p7;setp.eq.s32 %p8, %r322, %r324;@%p8 bra BB22_9;bra.uni BB22_6;BB22_8:cvt.s64.s32 %rd20, %r322;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r324, %r324, %r322, %p9;BB22_9:cvt.s64.s32 %rd24, %r324;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r326, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r326, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r327, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;ld.param.u64 %rd47, [%rd1+336];cvta.to.global.u64 %rd48, %rd47;add.s64 %rd49, %rd48, %rd36;ld.global.u32 %r120, [%rd49];ld.global.u64 %rd50, [%rd4+-44];mul.wide.s32 %rd51, %r120, 4;add.s64 %rd52, %rd50, %rd51;ld.f32 %f7, [%rd52];sub.f32 %f8, %f6, %f7;mov.b32 %r121, %f8;setp.gt.s32 %p11, %r121, -1;xor.b32 %r122, %r121, 2147483647;selp.b32 %r123, %r121, %r122, %p11;ld.global.u32 %r124, [%rd4+28];setp.lt.s32 %p12, %r123, %r124;selp.b32 %r328, %r123, 2147483647, %p12;BB22_10:setp.ne.s32 %p13, %r328, 2147483647;selp.u32 %r125, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r328, %r125};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB22_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r187, %r188}, [%r9+24];ld.shared.v2.u32 {%r191, %r192}, [%r9+16];min.s32 %r195, %r191, %r187;add.s32 %r196, %r188, %r192;ld.shared.v2.u32 {%r197, %r198}, [%r9+32];min.s32 %r201, %r195, %r197;add.s32 %r202, %r196, %r198;ld.shared.v2.u32 {%r203, %r204}, [%r9+40];min.s32 %r207, %r201, %r203;add.s32 %r208, %r202, %r204;ld.shared.v2.u32 {%r209, %r210}, [%r9+48];min.s32 %r213, %r207, %r209;add.s32 %r214, %r208, %r210;ld.shared.v2.u32 {%r215, %r216}, [%r9+56];min.s32 %r219, %r213, %r215;add.s32 %r220, %r214, %r216;ld.shared.v2.u32 {%r221, %r222}, [%r9+64];min.s32 %r225, %r219, %r221;add.s32 %r226, %r220, %r222;ld.shared.v2.u32 {%r227, %r228}, [%r9+72];min.s32 %r128, %r225, %r227;add.s32 %r133, %r226, %r228;mov.u32 %r184, 1;mov.u32 %r185, 0;mov.u32 %r186, -1;shfl.sync.up.b32 %r127, %r128, %r184, %r185, %r186;shfl.sync.up.b32 %r132, %r133, %r184, %r185, %r186;min.s32 %r231, %r127, %r128;setp.lt.s32 %p16, %r126, 1;selp.b32 %r138, %r128, %r231, %p16;selp.b32 %r232, 0, %r132, %p16;add.s32 %r143, %r232, %r133;mov.u32 %r144, 2;shfl.sync.up.b32 %r137, %r138, %r144, %r185, %r186;shfl.sync.up.b32 %r142, %r143, %r144, %r185, %r186;min.s32 %r233, %r137, %r138;setp.lt.s32 %p17, %r126, 2;selp.b32 %r148, %r138, %r233, %p17;selp.b32 %r234, 0, %r142, %p17;add.s32 %r153, %r234, %r143;mov.u32 %r154, 4;shfl.sync.up.b32 %r147, %r148, %r154, %r185, %r186;shfl.sync.up.b32 %r152, %r153, %r154, %r185, %r186;min.s32 %r235, %r147, %r148;setp.lt.s32 %p18, %r126, 4;selp.b32 %r158, %r148, %r235, %p18;selp.b32 %r236, 0, %r152, %p18;add.s32 %r163, %r236, %r153;mov.u32 %r164, 8;shfl.sync.up.b32 %r157, %r158, %r164, %r185, %r186;shfl.sync.up.b32 %r162, %r163, %r164, %r185, %r186;min.s32 %r237, %r157, %r158;setp.lt.s32 %p19, %r126, 8;selp.b32 %r168, %r158, %r237, %p19;selp.b32 %r238, 0, %r162, %p19;add.s32 %r173, %r238, %r163;mov.u32 %r174, 16;shfl.sync.up.b32 %r167, %r168, %r174, %r185, %r186;shfl.sync.up.b32 %r172, %r173, %r174, %r185, %r186;min.s32 %r239, %r167, %r168;setp.lt.s32 %p20, %r126, 16;selp.b32 %r178, %r168, %r239, %p20;selp.b32 %r240, 0, %r172, %p20;add.s32 %r183, %r240, %r173;shfl.sync.up.b32 %r177, %r178, %r184, %r185, %r186;shfl.sync.up.b32 %r182, %r183, %r184, %r185, %r186;ld.shared.v2.u32 {%r329, %r330}, [%r9+16];ld.shared.v2.u32 {%r243, %r244}, [%r9+24];ld.shared.v2.u32 {%r245, %r246}, [%r9+32];ld.shared.v2.u32 {%r247, %r248}, [%r9+40];ld.shared.v2.u32 {%r249, %r250}, [%r9+48];ld.shared.v2.u32 {%r251, %r252}, [%r9+56];ld.shared.v2.u32 {%r253, %r254}, [%r9+64];ld.shared.v2.u32 {%r255, %r256}, [%r9+72];@%p15 bra BB22_13;min.s32 %r329, %r177, %r329;add.s32 %r330, %r330, %r182;BB22_13:st.shared.v2.u32 [%r9+16], {%r329, %r330};min.s32 %r257, %r329, %r243;add.s32 %r258, %r244, %r330;st.shared.v2.u32 [%r9+24], {%r257, %r258};min.s32 %r259, %r257, %r245;add.s32 %r260, %r246, %r258;st.shared.v2.u32 [%r9+32], {%r259, %r260};min.s32 %r261, %r259, %r247;add.s32 %r262, %r248, %r260;st.shared.v2.u32 [%r9+40], {%r261, %r262};min.s32 %r263, %r261, %r249;add.s32 %r264, %r250, %r262;st.shared.v2.u32 [%r9+48], {%r263, %r264};min.s32 %r265, %r263, %r251;add.s32 %r266, %r252, %r264;st.shared.v2.u32 [%r9+56], {%r265, %r266};min.s32 %r267, %r265, %r253;add.s32 %r268, %r254, %r266;st.shared.v2.u32 [%r9+64], {%r267, %r268};min.s32 %r269, %r267, %r255;add.s32 %r270, %r256, %r268;st.shared.v2.u32 [%r9+72], {%r269, %r270};BB22_14:mov.u32 %r310, %ntid.x;add.s32 %r309, %r310, -1;setp.eq.s32 %p1, %r5, %r309;bar.sync 0;ld.shared.v2.u32 {%r271, %r272}, [%r8+16];@!%p1 bra BB22_25;bra.uni BB22_15;BB22_15:add.s64 %rd53, %rd5, -52;atom.global.add.u32 %r64, [%rd53], %r272;add.s32 %r273, %r64, %r272;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r273, %r65;@%p21 bra BB22_17;bra.uni BB22_16;BB22_17:add.s64 %rd54, %rd5, -48;atom.global.add.u32 %r276, [%rd54], %r272;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r276;ld.global.u32 %r331, [%rd4+12];setp.ge.s32 %p22, %r271, %r331;@%p22 bra BB22_19;add.s64 %rd55, %rd5, -16;atom.global.min.s32 %r277, [%rd55], %r271;xor.b32 %r278, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r279, %r97, %r278, %p23;mov.b32 %f9, %r279;xor.b32 %r280, %r271, 2147483647;setp.gt.s32 %p24, %r271, -1;selp.b32 %r281, %r271, %r280, %p24;mov.b32 %f10, %r281;add.f32 %f11, %f9, %f10;mov.b32 %r282, %f11;setp.gt.s32 %p25, %r282, -1;xor.b32 %r283, %r282, 2147483647;selp.b32 %r284, %r282, %r283, %p25;atom.global.min.s32 %r285, [%rd5], %r284;mov.u32 %r331, %r271;BB22_19:setp.gt.s32 %p26, %r332, %r64;@%p26 bra BB22_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r286, %r97, 2147483647;selp.b32 %r287, %r97, %r286, %p27;mov.b32 %f14, %r287;ld.param.u32 %r70, [%rd1+404];BB22_21:mul.f32 %f14, %f14, 0f3F000000;add.s32 %r332, %r332, %r70;setp.le.s32 %p28, %r332, %r64;@%p28 bra BB22_21;setp.eq.s32 %p29, %r331, 2147483647;mov.u32 %r333, 2147483647;@%p29 bra BB22_24;setp.gt.s32 %p30, %r331, -1;xor.b32 %r289, %r331, 2147483647;selp.b32 %r290, %r331, %r289, %p30;mov.b32 %f12, %r290;add.f32 %f13, %f12, %f14;mov.b32 %r291, %f13;setp.gt.s32 %p31, %r291, -1;xor.b32 %r292, %r291, 2147483647;selp.b32 %r333, %r291, %r292, %p31;BB22_24:mov.b32 %r293, %f14;setp.gt.s32 %p32, %r293, -1;xor.b32 %r294, %r293, 2147483647;selp.b32 %r295, %r293, %r294, %p32;add.s64 %rd56, %rd5, -8;atom.global.min.s32 %r296, [%rd56], %r295;add.s64 %rd57, %rd5, -4;atom.global.max.s32 %r297, [%rd57], %r332;atom.global.min.s32 %r298, [%rd5], %r333;bra.uni BB22_25;BB22_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r274, [%rd4+-4];or.b32 %r275, %r274, 2;st.global.u32 [%rd4+-4], %r275;BB22_25:bar.sync 0;ld.param.u32 %r299, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r299;@%p33 bra BB22_32;setp.ne.s32 %p40, %r328, 2147483647;selp.b32 %r300, -1, 0, %p40;add.s32 %r301, %r272, %r300;add.s32 %r76, %r301, %r75;setp.eq.s32 %p35, %r328, 2147483647;@%p35 bra BB22_31;ld.param.u64 %rd58, [%rd1+128];cvta.to.global.u64 %rd59, %rd58;ld.param.u32 %r302, [%rd1+136];mul.lo.s32 %r303, %r302, %r314;cvt.s64.s32 %rd60, %r303;cvt.s64.s32 %rd8, %r76;add.s64 %rd61, %rd60, %rd8;shl.b64 %rd62, %rd61, 3;add.s64 %rd63, %rd59, %rd62;st.global.v2.u32 [%rd63], {%r327, %r328};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r324, 0;@%p36 bra BB22_29;ld.param.u32 %r304, [%rd1+308];setp.lt.s32 %p37, %r324, %r304;@%p37 bra BB22_30;BB22_29:mov.u64 %rd64, $str4;cvta.global.u64 %rd65, %rd64;mov.u64 %rd66, $str1;cvta.global.u64 %rd67, %rd66;mov.u64 %rd68, __unnamed_4;cvta.global.u64 %rd69, %rd68;mov.u32 %r305, 844;mov.u64 %rd70, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd65;.param .b64 param1;st.param.b64 [param1+0], %rd67;.param .b32 param2;st.param.b32 [param2+0], %r305;.param .b64 param3;st.param.b64 [param3+0], %rd69;.param .b64 param4;st.param.b64 [param4+0], %rd70;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 4BB22_30:ld.param.u64 %rd71, [%rd1+144];cvta.to.global.u64 %rd72, %rd71;ld.param.u32 %r306, [%rd1+152];mul.lo.s32 %r307, %r306, %r314;cvt.s64.s32 %rd73, %r307;add.s64 %rd74, %rd73, %rd8;shl.b64 %rd75, %rd74, 3;add.s64 %rd76, %rd72, %rd75;add.s32 %r308, %r77, %r324;st.global.v2.u32 [%rd76], {%r308, %r326};BB22_31:add.s32 %r321, %r7, %r321;setp.lt.s32 %p38, %r321, %r15;@%p38 bra BB22_4;BB22_32:ld.param.u32 %r313, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r312, %nctaid.y;add.s32 %r314, %r312, %r314;setp.lt.s32 %p39, %r314, %r313;@%p39 bra BB22_2;BB22_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<41>;.reg .f32 %f<13>;.reg .b32 %r<336>;.reg .b64 %rd<71>;mov.b64 %rd9, _ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r313, %ctaid.y;setp.ge.s32 %p2, %r313, %r2;@%p2 bra BB23_33;mov.u64 %rd1, %rd9;mov.u32 %r84, %ntid.x;mov.u32 %r85, %ctaid.x;mul.lo.s32 %r3, %r84, %r85;mov.u32 %r5, %tid.x;shr.u32 %r86, %r5, 3;add.s32 %r87, %r86, %r5;mov.u32 %r88, %nctaid.x;mul.lo.s32 %r7, %r88, %r84;shl.b32 %r89, %r87, 3;mov.u32 %r90, _ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE20sh_temp_storage_scan;add.s32 %r8, %r90, %r89;mul.lo.s32 %r91, %r5, 9;shl.b32 %r92, %r91, 3;add.s32 %r9, %r90, %r92;mov.u32 %r125, %laneid;BB23_2:ld.param.u64 %rd10, [%rd1+16];cvta.to.global.u64 %rd2, %rd10;ld.param.u32 %r93, [%rd1+24];mul.lo.s32 %r94, %r93, %r313;cvt.s64.s32 %rd3, %r94;mul.wide.s32 %rd11, %r94, 136;add.s64 %rd12, %rd2, %rd11;add.s64 %rd4, %rd12, 52;ld.global.u32 %r14, [%rd12+52];ld.global.u32 %r15, [%rd12+16];setp.ge.s32 %p3, %r3, %r15;@%p3 bra BB23_32;ld.global.u32 %r95, [%rd4+-32];mul.lo.s64 %rd13, %rd3, 136;add.s64 %rd14, %rd2, %rd13;add.s64 %rd5, %rd14, 80;mov.u32 %r320, %r3;BB23_4:ld.global.v2.u32 {%r97, %r331}, [%rd4+20];ld.global.u32 %r24, [%rd4+-52];add.s32 %r25, %r320, %r5;mov.u32 %r327, 2147483647;setp.ge.s32 %p4, %r25, %r15;@%p4 bra BB23_10;add.s32 %r321, %r95, -1;setp.eq.s32 %p5, %r321, %r14;ld.param.u64 %rd15, [%rd1+64];cvta.to.global.u64 %rd6, %rd15;ld.param.u32 %r99, [%rd1+72];mul.lo.s32 %r100, %r99, %r24;cvt.s64.s32 %rd7, %r100;mov.u32 %r323, %r14;@%p5 bra BB23_9;BB23_6:add.s32 %r101, %r323, 1;setp.eq.s32 %p6, %r101, %r321;@%p6 bra BB23_8;sub.s32 %r102, %r321, %r323;shr.u32 %r103, %r102, 31;add.s32 %r104, %r102, %r103;shr.s32 %r105, %r104, 1;add.s32 %r106, %r105, %r323;cvt.s64.s32 %rd16, %r106;add.s64 %rd17, %rd16, %rd7;shl.b64 %rd18, %rd17, 2;add.s64 %rd19, %rd6, %rd18;ld.global.u32 %r107, [%rd19];setp.gt.s32 %p7, %r107, %r25;add.s32 %r108, %r106, -1;selp.b32 %r323, %r323, %r106, %p7;selp.b32 %r321, %r108, %r321, %p7;setp.eq.s32 %p8, %r321, %r323;@%p8 bra BB23_9;bra.uni BB23_6;BB23_8:cvt.s64.s32 %rd20, %r321;add.s64 %rd21, %rd20, %rd7;shl.b64 %rd22, %rd21, 2;add.s64 %rd23, %rd6, %rd22;ld.global.u32 %r109, [%rd23];setp.gt.s32 %p9, %r109, %r25;selp.b32 %r323, %r323, %r321, %p9;BB23_9:cvt.s64.s32 %rd24, %r323;add.s64 %rd25, %rd24, %rd7;shl.b64 %rd26, %rd25, 2;add.s64 %rd27, %rd6, %rd26;ld.param.u64 %rd28, [%rd1+80];cvta.to.global.u64 %rd29, %rd28;ld.param.u32 %r110, [%rd1+88];mul.lo.s32 %r111, %r110, %r24;cvt.s64.s32 %rd30, %r111;add.s64 %rd31, %rd30, %rd24;shl.b64 %rd32, %rd31, 2;add.s64 %rd33, %rd29, %rd32;ld.global.u32 %r112, [%rd27];sub.s32 %r113, %r25, %r112;ld.global.u32 %r114, [%rd33];add.s32 %r325, %r114, %r113;ld.param.u64 %rd34, [%rd1+328];cvta.to.global.u64 %rd35, %rd34;mul.wide.s32 %rd36, %r325, 4;add.s64 %rd37, %rd35, %rd36;ld.global.u32 %r326, [%rd37];ld.param.u64 %rd38, [%rd1+320];cvta.to.global.u64 %rd39, %rd38;add.s64 %rd40, %rd39, %rd36;ld.param.u64 %rd41, [%rd1+48];cvta.to.global.u64 %rd42, %rd41;ld.param.u32 %r115, [%rd1+56];mul.lo.s32 %r116, %r115, %r24;cvt.s64.s32 %rd43, %r116;add.s64 %rd44, %rd43, %rd24;shl.b64 %rd45, %rd44, 3;add.s64 %rd46, %rd42, %rd45;ld.global.u32 %r117, [%rd46+4];setp.gt.s32 %p10, %r117, -1;xor.b32 %r118, %r117, 2147483647;selp.b32 %r119, %r117, %r118, %p10;mov.b32 %f4, %r119;ld.global.f32 %f5, [%rd40];add.f32 %f6, %f5, %f4;mov.b32 %r120, %f6;setp.gt.s32 %p11, %r120, -1;xor.b32 %r121, %r120, 2147483647;selp.b32 %r122, %r120, %r121, %p11;ld.global.u32 %r123, [%rd4+28];setp.lt.s32 %p12, %r122, %r123;selp.b32 %r327, %r122, 2147483647, %p12;BB23_10:setp.ne.s32 %p13, %r327, 2147483647;selp.u32 %r124, 1, 0, %p13;st.shared.v2.u32 [%r8+16], {%r327, %r124};bar.sync 0;setp.gt.u32 %p14, %r5, 31;@%p14 bra BB23_14;setp.eq.s32 %p15, %r5, 0;ld.shared.v2.u32 {%r186, %r187}, [%r9+24];ld.shared.v2.u32 {%r190, %r191}, [%r9+16];min.s32 %r194, %r190, %r186;add.s32 %r195, %r187, %r191;ld.shared.v2.u32 {%r196, %r197}, [%r9+32];min.s32 %r200, %r194, %r196;add.s32 %r201, %r195, %r197;ld.shared.v2.u32 {%r202, %r203}, [%r9+40];min.s32 %r206, %r200, %r202;add.s32 %r207, %r201, %r203;ld.shared.v2.u32 {%r208, %r209}, [%r9+48];min.s32 %r212, %r206, %r208;add.s32 %r213, %r207, %r209;ld.shared.v2.u32 {%r214, %r215}, [%r9+56];min.s32 %r218, %r212, %r214;add.s32 %r219, %r213, %r215;ld.shared.v2.u32 {%r220, %r221}, [%r9+64];min.s32 %r224, %r218, %r220;add.s32 %r225, %r219, %r221;ld.shared.v2.u32 {%r226, %r227}, [%r9+72];min.s32 %r127, %r224, %r226;add.s32 %r132, %r225, %r227;mov.u32 %r183, 1;mov.u32 %r184, 0;mov.u32 %r185, -1;shfl.sync.up.b32 %r126, %r127, %r183, %r184, %r185;shfl.sync.up.b32 %r131, %r132, %r183, %r184, %r185;min.s32 %r230, %r126, %r127;setp.lt.s32 %p16, %r125, 1;selp.b32 %r137, %r127, %r230, %p16;selp.b32 %r231, 0, %r131, %p16;add.s32 %r142, %r231, %r132;mov.u32 %r143, 2;shfl.sync.up.b32 %r136, %r137, %r143, %r184, %r185;shfl.sync.up.b32 %r141, %r142, %r143, %r184, %r185;min.s32 %r232, %r136, %r137;setp.lt.s32 %p17, %r125, 2;selp.b32 %r147, %r137, %r232, %p17;selp.b32 %r233, 0, %r141, %p17;add.s32 %r152, %r233, %r142;mov.u32 %r153, 4;shfl.sync.up.b32 %r146, %r147, %r153, %r184, %r185;shfl.sync.up.b32 %r151, %r152, %r153, %r184, %r185;min.s32 %r234, %r146, %r147;setp.lt.s32 %p18, %r125, 4;selp.b32 %r157, %r147, %r234, %p18;selp.b32 %r235, 0, %r151, %p18;add.s32 %r162, %r235, %r152;mov.u32 %r163, 8;shfl.sync.up.b32 %r156, %r157, %r163, %r184, %r185;shfl.sync.up.b32 %r161, %r162, %r163, %r184, %r185;min.s32 %r236, %r156, %r157;setp.lt.s32 %p19, %r125, 8;selp.b32 %r167, %r157, %r236, %p19;selp.b32 %r237, 0, %r161, %p19;add.s32 %r172, %r237, %r162;mov.u32 %r173, 16;shfl.sync.up.b32 %r166, %r167, %r173, %r184, %r185;shfl.sync.up.b32 %r171, %r172, %r173, %r184, %r185;min.s32 %r238, %r166, %r167;setp.lt.s32 %p20, %r125, 16;selp.b32 %r177, %r167, %r238, %p20;selp.b32 %r239, 0, %r171, %p20;add.s32 %r182, %r239, %r172;shfl.sync.up.b32 %r176, %r177, %r183, %r184, %r185;shfl.sync.up.b32 %r181, %r182, %r183, %r184, %r185;ld.shared.v2.u32 {%r328, %r329}, [%r9+16];ld.shared.v2.u32 {%r242, %r243}, [%r9+24];ld.shared.v2.u32 {%r244, %r245}, [%r9+32];ld.shared.v2.u32 {%r246, %r247}, [%r9+40];ld.shared.v2.u32 {%r248, %r249}, [%r9+48];ld.shared.v2.u32 {%r250, %r251}, [%r9+56];ld.shared.v2.u32 {%r252, %r253}, [%r9+64];ld.shared.v2.u32 {%r254, %r255}, [%r9+72];@%p15 bra BB23_13;min.s32 %r328, %r176, %r328;add.s32 %r329, %r329, %r181;BB23_13:st.shared.v2.u32 [%r9+16], {%r328, %r329};min.s32 %r256, %r328, %r242;add.s32 %r257, %r243, %r329;st.shared.v2.u32 [%r9+24], {%r256, %r257};min.s32 %r258, %r256, %r244;add.s32 %r259, %r245, %r257;st.shared.v2.u32 [%r9+32], {%r258, %r259};min.s32 %r260, %r258, %r246;add.s32 %r261, %r247, %r259;st.shared.v2.u32 [%r9+40], {%r260, %r261};min.s32 %r262, %r260, %r248;add.s32 %r263, %r249, %r261;st.shared.v2.u32 [%r9+48], {%r262, %r263};min.s32 %r264, %r262, %r250;add.s32 %r265, %r251, %r263;st.shared.v2.u32 [%r9+56], {%r264, %r265};min.s32 %r266, %r264, %r252;add.s32 %r267, %r253, %r265;st.shared.v2.u32 [%r9+64], {%r266, %r267};min.s32 %r268, %r266, %r254;add.s32 %r269, %r255, %r267;st.shared.v2.u32 [%r9+72], {%r268, %r269};BB23_14:mov.u32 %r309, %ntid.x;add.s32 %r308, %r309, -1;setp.eq.s32 %p1, %r5, %r308;bar.sync 0;ld.shared.v2.u32 {%r270, %r271}, [%r8+16];@!%p1 bra BB23_25;bra.uni BB23_15;BB23_15:add.s64 %rd47, %rd5, -52;atom.global.add.u32 %r64, [%rd47], %r271;add.s32 %r272, %r64, %r271;ld.param.u32 %r65, [%rd1+312];setp.lt.s32 %p21, %r272, %r65;@%p21 bra BB23_17;bra.uni BB23_16;BB23_17:add.s64 %rd48, %rd5, -48;atom.global.add.u32 %r275, [%rd48], %r271;st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r275;ld.global.u32 %r330, [%rd4+12];setp.ge.s32 %p22, %r270, %r330;@%p22 bra BB23_19;add.s64 %rd49, %rd5, -16;atom.global.min.s32 %r276, [%rd49], %r270;xor.b32 %r277, %r97, 2147483647;setp.gt.s32 %p23, %r97, -1;selp.b32 %r278, %r97, %r277, %p23;mov.b32 %f7, %r278;xor.b32 %r279, %r270, 2147483647;setp.gt.s32 %p24, %r270, -1;selp.b32 %r280, %r270, %r279, %p24;mov.b32 %f8, %r280;add.f32 %f9, %f7, %f8;mov.b32 %r281, %f9;setp.gt.s32 %p25, %r281, -1;xor.b32 %r282, %r281, 2147483647;selp.b32 %r283, %r281, %r282, %p25;atom.global.min.s32 %r284, [%rd5], %r283;mov.u32 %r330, %r270;BB23_19:setp.gt.s32 %p26, %r331, %r64;@%p26 bra BB23_25;setp.gt.s32 %p27, %r97, -1;xor.b32 %r285, %r97, 2147483647;selp.b32 %r286, %r97, %r285, %p27;mov.b32 %f12, %r286;ld.param.u32 %r70, [%rd1+404];BB23_21:mul.f32 %f12, %f12, 0f3F000000;add.s32 %r331, %r331, %r70;setp.le.s32 %p28, %r331, %r64;@%p28 bra BB23_21;setp.eq.s32 %p29, %r330, 2147483647;mov.u32 %r332, 2147483647;@%p29 bra BB23_24;setp.gt.s32 %p30, %r330, -1;xor.b32 %r288, %r330, 2147483647;selp.b32 %r289, %r330, %r288, %p30;mov.b32 %f10, %r289;add.f32 %f11, %f10, %f12;mov.b32 %r290, %f11;setp.gt.s32 %p31, %r290, -1;xor.b32 %r291, %r290, 2147483647;selp.b32 %r332, %r290, %r291, %p31;BB23_24:mov.b32 %r292, %f12;setp.gt.s32 %p32, %r292, -1;xor.b32 %r293, %r292, 2147483647;selp.b32 %r294, %r292, %r293, %p32;add.s64 %rd50, %rd5, -8;atom.global.min.s32 %r295, [%rd50], %r294;add.s64 %rd51, %rd5, -4;atom.global.max.s32 %r296, [%rd51], %r331;atom.global.min.s32 %r297, [%rd5], %r332;bra.uni BB23_25;BB23_16:st.shared.u32 [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset], %r65;ld.global.u32 %r273, [%rd4+-4];or.b32 %r274, %r273, 2;st.global.u32 [%rd4+-4], %r274;BB23_25:bar.sync 0;ld.param.u32 %r298, [%rd1+312];ld.shared.u32 %r75, [_ZZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEE27sh_aux_q_index_block_offset];setp.eq.s32 %p33, %r75, %r298;@%p33 bra BB23_32;setp.ne.s32 %p40, %r327, 2147483647;selp.b32 %r299, -1, 0, %p40;add.s32 %r300, %r271, %r299;add.s32 %r76, %r300, %r75;setp.eq.s32 %p35, %r327, 2147483647;@%p35 bra BB23_31;ld.param.u64 %rd52, [%rd1+128];cvta.to.global.u64 %rd53, %rd52;ld.param.u32 %r301, [%rd1+136];mul.lo.s32 %r302, %r301, %r313;cvt.s64.s32 %rd54, %r302;cvt.s64.s32 %rd8, %r76;add.s64 %rd55, %rd54, %rd8;shl.b64 %rd56, %rd55, 3;add.s64 %rd57, %rd53, %rd56;st.global.v2.u32 [%rd57], {%r326, %r327};ld.global.u32 %r77, [%rd4+4];setp.lt.s32 %p36, %r323, 0;@%p36 bra BB23_29;ld.param.u32 %r303, [%rd1+308];setp.lt.s32 %p37, %r323, %r303;@%p37 bra BB23_30;BB23_29:mov.u64 %rd58, $str4;cvta.global.u64 %rd59, %rd58;mov.u64 %rd60, $str1;cvta.global.u64 %rd61, %rd60;mov.u64 %rd62, __unnamed_5;cvta.global.u64 %rd63, %rd62;mov.u32 %r304, 844;mov.u64 %rd64, 1;{.reg .b32 temp_param_reg;.param .b64 param0;st.param.b64 [param0+0], %rd59;.param .b64 param1;st.param.b64 [param1+0], %rd61;.param .b32 param2;st.param.b32 [param2+0], %r304;.param .b64 param3;st.param.b64 [param3+0], %rd63;.param .b64 param4;st.param.b64 [param4+0], %rd64;call.uni __assertfail, (param0, param1, param2, param3, param4);}// Callseq End 5BB23_30:ld.param.u64 %rd65, [%rd1+144];cvta.to.global.u64 %rd66, %rd65;ld.param.u32 %r305, [%rd1+152];mul.lo.s32 %r306, %r305, %r313;cvt.s64.s32 %rd67, %r306;add.s64 %rd68, %rd67, %rd8;shl.b64 %rd69, %rd68, 3;add.s64 %rd70, %rd66, %rd69;add.s32 %r307, %r77, %r323;st.global.v2.u32 [%rd70], {%r307, %r325};BB23_31:add.s32 %r320, %r7, %r320;setp.lt.s32 %p38, %r320, %r15;@%p38 bra BB23_4;BB23_32:ld.param.u32 %r312, [_ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r311, %nctaid.y;add.s32 %r313, %r311, %r313;setp.lt.s32 %p39, %r313, %r312;@%p39 bra BB23_2;BB23_33:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<8>;.reg .f32 %f<7>;.reg .b32 %r<39>;.reg .b64 %rd<12>;mov.b64 %rd4, _ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb1EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r38, %ctaid.y;setp.ge.s32 %p1, %r38, %r2;@%p1 bra BB24_5;mov.u64 %rd5, %rd4;ld.param.u64 %rd6, [%rd5+16];cvta.to.global.u64 %rd1, %rd6;ld.param.u32 %r3, [%rd5+24];ld.param.u64 %rd7, [%rd5+32];cvta.to.global.u64 %rd2, %rd7;ld.param.u32 %r4, [%rd5+40];ld.param.u32 %r5, [%rd5+400];mov.u32 %r11, %ctaid.x;mov.u32 %r12, %tid.x;or.b32 %r6, %r11, %r12;mov.u32 %r7, %nctaid.y;BB24_2:mul.lo.s32 %r13, %r3, %r38;mul.lo.s32 %r14, %r4, %r38;mul.wide.s32 %rd8, %r13, 136;add.s64 %rd9, %rd1, %rd8;add.s64 %rd3, %rd9, 20;ld.global.u32 %r15, [%rd9+20];ld.global.u32 %r9, [%rd9+40];ld.global.v2.u32 {%r16, %r17}, [%rd9+64];setp.gt.s32 %p2, %r16, -1;xor.b32 %r19, %r16, 2147483647;selp.b32 %r20, %r16, %r19, %p2;mov.b32 %f2, %r20;ld.global.u32 %r21, [%rd9+48];ld.global.u32 %r22, [%rd9+32];mov.u32 %r23, 0;ld.global.u32 %r24, [%rd9+56];st.global.v2.u32 [%rd9+32], {%r23, %r22};mul.wide.s32 %rd10, %r14, 136;add.s64 %rd11, %rd2, %rd10;st.global.v2.u32 [%rd9+24], {%r23, %r23};st.global.v2.u32 [%rd9+72], {%r17, %r5};setp.gt.s32 %p3, %r17, -1;xor.b32 %r26, %r17, 2147483647;selp.b32 %r27, %r17, %r26, %p3;mov.b32 %f1, %r27;add.f32 %f3, %f2, %f1;mov.b32 %r28, %f3;setp.gt.s32 %p4, %r28, -1;xor.b32 %r29, %r28, 2147483647;selp.b32 %r30, %r28, %r29, %p4;st.global.u32 [%rd9+80], %r30;st.global.v2.u32 [%rd9+16], {%r23, %r23};add.s32 %r31, %r24, %r15;st.global.u32 [%rd9+56], %r31;st.global.u32 [%rd11+36], %r22;st.global.u32 [%rd11+48], %r21;st.global.u32 [%rd9+16], %r23;setp.ne.s32 %p5, %r6, 0;@%p5 bra BB24_4;ld.global.u32 %r32, [%rd3+40];add.s32 %r33, %r32, %r9;st.global.u32 [%rd3+40], %r33;BB24_4:st.global.u32 [%rd3+4], %r23;div.rn.f32 %f4, %f1, 0f437E0000;st.global.f32 [%rd3+72], %f4;ld.global.u32 %r35, [%rd3+44];setp.gt.s32 %p6, %r35, -1;xor.b32 %r36, %r35, 2147483647;selp.b32 %r37, %r35, %r36, %p6;mov.b32 %f5, %r37;st.global.u32 [%rd3+64], %r37;add.f32 %f6, %f1, %f5;st.global.f32 [%rd3+68], %f6;add.s32 %r38, %r7, %r38;setp.lt.s32 %p7, %r38, %r2;@%p7 bra BB24_2;BB24_5:ret;}.visible .entry _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE(.param .align 8 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1[4]){.reg .pred %p<6>;.reg .f32 %f<4>;.reg .b32 %r<27>;.reg .b64 %rd<11>;mov.b64 %rd3, _ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_0;ld.param.u32 %r2, [_ZN5kaldi12cuda_decoder18post_expand_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsE_param_1];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r2;@%p1 bra BB25_3;mov.u64 %rd4, %rd3;ld.param.u64 %rd5, [%rd4+16];cvta.to.global.u64 %rd1, %rd5;ld.param.u32 %r3, [%rd4+24];ld.param.u64 %rd6, [%rd4+32];cvta.to.global.u64 %rd2, %rd6;ld.param.u32 %r4, [%rd4+40];ld.param.u32 %r5, [%rd4+400];mov.u32 %r6, %nctaid.y;BB25_2:mul.lo.s32 %r9, %r3, %r26;mul.lo.s32 %r10, %r4, %r26;mul.wide.s32 %rd7, %r9, 136;add.s64 %rd8, %rd1, %rd7;ld.global.v2.u32 {%r11, %r12}, [%rd8+64];setp.gt.s32 %p2, %r11, -1;xor.b32 %r14, %r11, 2147483647;selp.b32 %r15, %r11, %r14, %p2;mov.b32 %f1, %r15;ld.global.u32 %r16, [%rd8+48];ld.global.u32 %r17, [%rd8+32];mov.u32 %r18, 0;ld.global.u32 %r19, [%rd8+20];st.global.v2.u32 [%rd8+32], {%r18, %r17};mul.wide.s32 %rd9, %r10, 136;add.s64 %rd10, %rd2, %rd9;st.global.v2.u32 [%rd8+24], {%r19, %r18};st.global.u32 [%rd8+16], %r18;st.global.v2.u32 [%rd8+72], {%r12, %r5};setp.gt.s32 %p3, %r12, -1;xor.b32 %r21, %r12, 2147483647;selp.b32 %r22, %r12, %r21, %p3;mov.b32 %f2, %r22;add.f32 %f3, %f1, %f2;mov.b32 %r23, %f3;setp.gt.s32 %p4, %r23, -1;xor.b32 %r24, %r23, 2147483647;selp.b32 %r25, %r23, %r24, %p4;st.global.u32 [%rd8+80], %r25;st.global.u32 [%rd8+52], %r19;st.global.u32 [%rd10+36], %r17;st.global.u32 [%rd10+48], %r16;add.s32 %r26, %r6, %r26;setp.lt.s32 %p5, %r26, %r2;@%p5 bra BB25_2;BB25_3:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB26_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB26_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB26_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB26_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB26_4;BB26_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB26_2;BB26_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .f32 %f<2>;.reg .b32 %r<28>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB27_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB27_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB27_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB27_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.f32 %f1, [%rd12];add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 4;add.s64 %rd15, %rd13, %rd14;st.global.f32 [%rd15], %f1;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB27_4;BB27_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB27_2;BB27_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<28>;.reg .b64 %rd<17>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_param_4];mov.u32 %r26, %ctaid.y;setp.ge.s32 %p1, %r26, %r1;@%p1 bra BB28_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB28_2:mul.lo.s32 %r12, %r26, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r27, %r15, %r14, %r16;setp.ge.s32 %p2, %r27, %r6;@%p2 bra BB28_5;mul.lo.s32 %r18, %r26, %r11;cvt.s64.s32 %rd2, %r18;BB28_4:cvt.s64.s32 %rd9, %r27;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 3;add.s64 %rd12, %rd1, %rd11;add.s32 %r22, %r27, %r5;mul.wide.s32 %rd14, %r22, 8;add.s64 %rd15, %rd13, %rd14;ld.global.u64 %rd16, [%rd12];st.global.u64 [%rd15], %rd16;mov.u32 %r24, %nctaid.x;mad.lo.s32 %r27, %r24, %r15, %r27;setp.lt.s32 %p3, %r27, %r6;@%p3 bra BB28_4;BB28_5:mov.u32 %r25, %nctaid.y;add.s32 %r26, %r25, %r26;setp.lt.s32 %p4, %r26, %r1;@%p4 bra BB28_2;BB28_6:ret;}.visible .entry _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi(.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_0[408],.param .align 4 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1[4],.param .align 8 .b8 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2[16],.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3,.param .u64 _ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4){.reg .pred %p<5>;.reg .b16 %rs<9>;.reg .b32 %r<29>;.reg .b64 %rd<16>;ld.param.u32 %r1, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_1];ld.param.u32 %r11, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2+8];ld.param.u64 %rd3, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_2];ld.param.u64 %rd4, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_3];ld.param.u64 %rd5, [_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_param_4];mov.u32 %r27, %ctaid.y;setp.ge.s32 %p1, %r27, %r1;@%p1 bra BB29_6;cvta.to.global.u64 %rd1, %rd3;cvta.to.global.u64 %rd6, %rd5;cvta.to.global.u64 %rd13, %rd4;BB29_2:mul.lo.s32 %r12, %r27, 34;mul.wide.s32 %rd7, %r12, 4;add.s64 %rd8, %rd6, %rd7;ld.global.u32 %r13, [%rd8+136];ld.global.u32 %r5, [%rd8];sub.s32 %r6, %r13, %r5;mov.u32 %r14, %ctaid.x;mov.u32 %r15, %ntid.x;mov.u32 %r16, %tid.x;mad.lo.s32 %r28, %r15, %r14, %r16;setp.ge.s32 %p2, %r28, %r6;@%p2 bra BB29_5;mul.lo.s32 %r18, %r27, %r11;cvt.s64.s32 %rd2, %r18;BB29_4:cvt.s64.s32 %rd9, %r28;add.s64 %rd10, %rd9, %rd2;shl.b64 %rd11, %rd10, 2;add.s64 %rd12, %rd1, %rd11;ld.global.u32 %r22, [%rd12];add.s32 %r23, %r28, %r5;mul.wide.s32 %rd14, %r23, 4;add.s64 %rd15, %rd13, %rd14;st.global.u32 [%rd15], %r22;mov.u32 %r25, %nctaid.x;mad.lo.s32 %r28, %r25, %r15, %r28;setp.lt.s32 %p3, %r28, %r6;@%p3 bra BB29_4;BB29_5:mov.u32 %r26, %nctaid.y;add.s32 %r27, %r26, %r27;setp.lt.s32 %p4, %r27, %r1;@%p4 bra BB29_2;BB29_6:ret;}(| (((0p ((| (((0 ((| (((0p ((| (((0 ((| (((0p ((| (((0 (8|( (((((  p 8|( (((((  H(| (((0@# (8|( (((((  pP#(| (((0# (8|( (((((  p#`(| (((0p ((| (((0p ((| (((0 (4(| (((0 (8|( (((((  p08|( (((((  H(| (((0 (,8|( (((((  p(| (((0  ((| (((0  (h8|( (((((  p (| (((0 (8|( (((((  p(| (((0p (@(| (((0p  (D(| (((0 (l(| (((05 (h 8|( (((((  p508|( (((((  H508|( (((((  06(| (((0 (`(| (((0  (h(| (((0 (|8|( (((((  pp(| (((0P (8|( (((((  p`08|( (((((  HP(| (((0 (d(| (((0 (p(| (((0p (D(| (((0 ((| (((0p ((| (((0p (#######WWW#VVV##RRR###~~~#III#HHH#GGG#}}}#|||#{{{#zzz#===#yyy#999#xxx#www#333#vvv#///#...#uuu#ttt#sss#rrr#$$$#qqq#   #ooo###nnn#mmm#lll#kkk#jjj#iii ` ! ! A  a@P ` ! ! A  a@` ` ! ! A  a@P ` ! ! A  a@` `  a@@ `  a@ !`  ap(` 0 ` Pp pP`@@# %`  ap(` @ p 0 `  P`@P 0@# '`  a@@ )`  ap@P +`  a@ 0`  ap(p@`0 0 0  p P ` p @ 4`  a(``0 P p 0 pP`@ 6`  ap@`  :`   a((``` @  >`   a(( 0 P ` @ @`  a@ B`    a@  D`    a@ J`  a@(` ` ` @` @!!`"## $$$@%`%p%%%@&P&&& '0'''''@5  L`  a@ O`  a(`P@  S`  a(`0Pp 0 P ` 0 @  @ X`  a(0pP ` @ 0 ` P0P`p 0@P `ppP Z`  a@ \`  a@ ^`  a  `` a b` a@  "8o@" "9o@"!8!9!8 !9 !8"90":pP"8q"`"9q"!8!9"8 "9 0"8@"9p":p8 9 8 9 89@:p8 9 @8 `9 p89:p 8sP09sP8s9sP8 p9 8 9 89:p8u9u8w9w8 9@8`9p89:pi1jkl m nZ oqrnsntMu>vw|xyG z {&"|5#}i,~,.13!445#66imjklemn{oqu r sk tO u vSwx0yz({j|Y}!~!9#%(N((W))<*Hij(klmxnn`no8oqqhrsHtu8uuvxvw@ x x y y z` { |@ } }( } } ~XH P0$v y&$ zpbM $t$x"%vss y%"y!"Ey@$z$x  O r pbG $z rx  r r zzs$x %vz$z r psAG @Ayz zpG MyGyy$v y&$ zpbM $t$x"%vss y%"y!"EyP$zr O rpbG $z $rx  r r zzsr $t%vz$z rpsAG 0Ayz zpG MyGy$v y&$ zpbM $t$x"%vss y%"y!"Ey@$z$x  O r pbG $z rx  r r zzs$x %vz$z r psAG @Ayz zpG MyGyy$v y&$ zpbM $t$x"%vss y%"y!"EyP$zr O rpbG $z $rx  r r zzsr $t%vz$z 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QP0P0PQv~v~pv~p#Uv~v~pv~p#Uv~v~pv~p#Uvvpvp#Uvvpvp#Uv@v@pv@p#Uv~v~pv~p#Uv~v~pv~p#Uv~v~pv~p#Uvvpvp#Uvvpvp#Uv@v@pv@p#UlTlUlTlUlTlUlTlURRXXWlTlURRXXWlTlURRXXWlTlURRXXWlTlU-0.((((6`5555  ../cudadecoder/usr/include/c++/7/bits/usr/include/c++/7/ext/tmp/usr/local/cuda/include/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/../iterator/../usr/local/cuda/include/crt/usr/include/c++/7/usr/lib/gcc/x86_64-linux-gnu/7/include/usr/include/x86_64-linux-gnu/bits/usr/include/x86_64-linux-gnu/bits/types/usr/include/usr/include/x86_64-linux-gnu/c++/7/bits/usr/include/c++/7/debug/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/block/specializations/../../block/../local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/cub-1.8.0/cub/device/dispatch/../../agent/../iterator/usr/local/cuda/include/thrust/usr/local/cuda/include/thrust/detail/usr/local/cuda/include/thrust/iterator/detail/usr/local/cuda/include/thrust/system/detail/sequential/usr/local/cuda/include/thrust/system/cpp/detail/usr/local/cuda/include/thrust/system/cuda/detail/local_disk/orion/ontrac/yannick/kaldi_20190717/kaldi/tools/openfst-1.6.7/include/fst../base../cudamatrix../itf/usr/include/x86_64-linux-gnu/syscuda-decoder-common.hbasic_string.hnew_allocator.htmpxft_00000270_00000000-5_cuda-decoder-kernels.compute_70.cudafe1.stub.cvector_types.hcuda_runtime_api.hcuda-decoder-kernels.cuutil_device.cuhhost_runtime.hcuda-decoder-kernels-utils.hstring_conversions.hbasic_string.tccchar_traits.hstl_iterator_base_funcs.hiostreamstddef.h driver_types.htypes.h clock_t.h time_t.h struct_tm.h time.h stringfwd.hcpp_type_traits.hcmathcstdlibc++config.h cwchariosfwdnewexception_ptr.htype_traitsstl_pair.hstl_iterator_base_types.hdebug.hcstdintclocalelocalefwd.hallocator.hcstdioalloc_traits.hinitializer_listsystem_errorios_base.hcwctypelocale_facets.hstl_tree.huses_allocator.htuplecstddefcstringsstreamctimechronoratiostd_mutex.hmutexstl_list.hhashtable_policy.hshared_ptr_base.hthreadunique_ptr.halgorithmfwd.hstl_algo.hstl_function.hstl_set.hstl_vector.hvector.tccfunctional_hash.hutilityhashtable.hunordered_map.hptr_traits.hexception.hmove.hfunctexcept.hpredefined_ops.hnumeric_traits.halloc_traits.hstl_iterator.hconcurrence.haligned_buffer.htype_traits.hmath.h stdlib.h stdint-intn.h thread-shared-types.h pthreadtypes.h math.hmathcalls.h stdlib-float.h stdlib-bsearch.h stdlib.h stdlib.hmath_functions.hdevice_launch_parameters.hwint_t.h __mbstate_t.h mbstate_t.h __FILE.h libio.h FILE.h wchar.h wchar2.h stdint-uintn.h stdint.h locale.h gthr-default.h atomic_word.h _G_config.h stdio.h sys_errlist.h stdio2.h stdio.h errno.h wctype-wchar.h wctype.h util_macro.cuhtex_ref_input_iterator.cuhversion.htype_traits.hexecution_policy.hiterator_category_to_traversal.hexecution_policy.hexecution_policy.hexecution_policy.hstring.h unistd.h getopt_core.h types.hkaldi-utils.hkaldi-types.hkaldi-error.hkaldi-math.hcu-allocator.hoptions-itf.hcuda-decoder-kernels.htime.hcommon_functions.hfatBinaryCtl.htmpxft_00000270_00000000-2_cuda-decoder-kernels.fatbin.cdevice_functions.h  J}JJXX  J|0:VE\J|0:VE\J|0:VE\J|0:VE\1|0:[E\1|0:[E\1|0:[E\1|0:[E XL XJ J|JJ}09VFiXJ ]XJJ|0:VE1XJ"XJ|0:VEX!XJ|0:VEX~XJ|0:VEX~XJ|0:VEX/~XJ|0:VEX|XJ|0:VEX Xr$q.J|0:VEX xXJ|0:VEXwX.|0:[EX%.vX.|0:[E X=.vXJ|0:VE X vX$|0:XE X.uX$|0:XE X0.uXJ|0:VE X=tXJ|0:VE XsXJ|0:VE X(sXJ|0:VE X(rXJ|0:VE XqXJ|0:VEXqX W  q&1q&1q&1r#1"q&1q&1q&1p&1p&1p&1p&1q&1r#1r&1U,1U,1q&15151q&1p&JZ& { { y y ~  ~  ~  ~  J}0?9;F J}JJXX T&@-< tvWf<  f XDt J ~t M< <  ~  fLWfJ  f XDJ J LkM J   <} ~.}X0.Q%}J ~}X.xf~<<J}t}JtzJp@ J'RJt&tYX&.ZX-r.<J}Xt}JtzJp@ Jfx2~<<J}t}JtzJp@ J'RJt&tYX&.ZX-r.z<J}J}JJzJF@ J,t3X,t3X,t3X,J3X,J3X,JXP}4,t 3X ,t 3X ,t3X,J3X,J3X,JX$  2q81  2q81  2q81  2q81 +4pP1 +4pP1 +4pP1 +4pP1_EqualcudaErrorTextureFetchFailed_ZN9__gnu_cxx13new_allocatorIPN5kaldi17CuMemoryAllocator9SubRegionEEC4ERKS5_lineto_stringnative_handle_typeuint16_ZNSt16allocator_traitsISaIcEE8allocateERS0_mcuda_ZNSt11char_traitsIcE4copyEPcPKcm_ZN5kaldi17CuMemoryAllocator11MallocPitchEmmPm_Type~CuMemoryAllocatorstrtodstrtof_IO_buf_endstrtokstrtol__ref_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE13get_allocatorEv__datgetwc_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EED4Ev_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EED4Evoptopt_ZNSt11_Tuple_implILm1EJSt14default_deleteINSt6thread6_StateEEEE7_M_swapERS4_prev_beam_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmRKS4_mm_Rb_tree_node_base_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEED4Evuint32_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE6resizeEmRKS3_emitting_preprocess_and_list_extra_prev_tokens_step2_kernel_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEixEm_ZNSt10_Head_baseILm1ESt14default_deleteINSt6thread6_StateEELb1EEC4ERKS3__ZN6thrust6system6detail10sequential3tagC2Ev_ZNSt6vectorImSaImEE8_M_eraseEN9__gnu_cxx17__normal_iteratorIPmS1_EES5_swprintfEmittingPreprocessAndListExtraPrevTokensStep1Kernel_ZN9__gnu_cxx13new_allocatorIN5kaldi17CuMemoryAllocator12MemoryRegionEEC4ERKS4__ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EE4swapERS4_rebindmbsinit__numeric_traits_integerfrac_digitschannel_to_computeGetMaxAllocatedMemory_ZNSt10_Head_baseILm1ESt14default_deleteINSt6thread6_StateEELb1EEC4ERKS4__ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE19_M_get_Tp_allocatorEv_ZNKSt6vectorImSaImEE5frontEv__pos1_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS3_S5_EEmRS8__M_move_datadata__ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5beginEv__rhs_ZNKSt8__detail20_Prime_rehash_policy8_M_stateEvloglikelihoods_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEixEmd_arc_nextstatesd_arc_ne_offsets_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5c_strEv~mutex11max_align_t_M_constructpair_ZNSt6vectorImSaImEE15_M_erase_at_endEPmpost_expand_kerneluint64local_iterator_ZSt10__distanceIPcENSt15iterator_traitsIT_E15difference_typeES2_S2_St26random_access_iterator_tagRemoveFromFreeBlocks_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_lengthEm_NodeAlloccbegin_ZNSt6vectorImSaImEE13shrink_to_fitEv_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEaSEOS4___node_alloc_typefirst_argument_type_ZNSt15__exception_ptr13exception_ptr4swapERS0__ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcmm_ZNKSt6vectorImSaImEE4cendEv_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE13get_allocatorEv_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE16max_bucket_countEv_ZNSt15__uniq_ptr_implINSt6thread6_StateESt14default_deleteIS1_EEC4EPS1__ZNSt11char_traitsIwE11eq_int_typeERKjS2__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendESt16initializer_listIcEoperator delete_ZNSt17integral_constantIbLb0EE5valueE_Z120__device_stub__ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_Hashtable_allocInfoToken_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5beginEm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcmprev_main_q_narcs_and_end_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5beginEvfile__ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE6rbeginEvd_main_q_state_and_costd_aux_q_state_and_cost_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EOS4_main_q_global_offsetlround_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE14_M_insert_rvalEN9__gnu_cxx17__normal_iteratorIPKS3_S5_EEOS3__ZNSt6threadC4ERS_operator bool_ZN9__gnu_cxx24__numeric_traits_integerIlE5__minEunordered_map_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EmRKS4__ZNK5kaldi17CuMemoryAllocator16PrintMemoryUsageEv_ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEb_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE4swapERSB_moved_main_q_arc_offsets_CharTunsigned int_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc_ZNSt10_Head_baseILm1ESt14default_deleteINSt6thread6_StateEELb1EEC4EOS4__ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE5crendEv_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EED4EvComputeLaneOffsetsKernel_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE6insertEOS5_size_t_M_destroy_node_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4ERKS4_mRKS3_lower_bound__stream_ZN5kaldi12cuda_decoder11atomicSubI2EP4int2S1__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEOS4___normal_iterator, std::allocator > >_ZNSt6vectorImSaImEEC4ERKS1_memory_region_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE15_M_erase_at_endEPS3_bool__distance_ZNK9__gnu_cxx13new_allocatorIN5kaldi17CuMemoryAllocator12MemoryRegionEE7addressERKS3__M_head_ZN5kaldi10OptionsItf8RegisterERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPbS8_MallocPitchLocking_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEaSESt16initializer_listIS3_E_M_copy__cudaPopCallConfiguration__cxa_throwcudaErrorNotYetImplemented_M_is_localscalbn_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE15max_load_factorEv_S_black_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEaSESt16initializer_listIS7_Euint_least64_taddressofcudaErrorProfilerAlreadyStarted_M_get_previous_node_ZNK9__gnu_cxx13new_allocatorIPN5kaldi17CuMemoryAllocator9SubRegionEE7addressERKS4__ZNKSt17integral_constantIlLl1EEcvlEv_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE3endEmint_n_cs_precedes_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcRKS3__ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE3endEv_M_key_compareinit_channel_id_ZN9__gnu_cxx13new_allocatorImED4Evatexit_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EED4Evatof_ZNKSt6vectorImSaImEE7crbeginEvatoluse_aux_qcudaErrorInvalidMemcpyDirection_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE6resizeEm__wrapper__device_stub_post_expand_kernel_Val_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE12_M_check_lenEmPKc_S_propagate_on_swap__module_id_strnum_subregionsd_main_q_degrees_prefix_sum__cudaFatCubinHandle_Key_M_deallocate_nodecudaErrorMissingConfigurationrend_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ERKSC_positive_sign__uint8_t_M_bucket_count_ZNSt6threadC4Evconst_void_pointer_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE4findERS2__ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE14_M_fill_insertEN9__gnu_cxx17__normal_iteratorIPS2_S4_EEmRKS2__ZNSt20_Rb_tree_key_compareISt4lessISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEEC4ERKS7__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEmc_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ERKSD_uintmax_t__alloc_traits >find_first_ofint16_tn_cs_precedesasctimewcstombs__cudaAddressOf >_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE8_M_beginEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE14_M_move_assignERSB_St17integral_constantIbLb1EE_ZNKSt6vectorImSaImEEixEmcudaErrorApiFailureBase_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE8_M_eraseEPSt13_Rb_tree_nodeIS5_Etry_to_lock_ZNSt20_Rb_tree_key_compareISt4lessISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEEC4ERKS8_cudaErrorInvalidFilterSettingh_lanes_counters_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4rendEvcudaErrorNoKernelImageForDevice__is_null_pointer_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16_M_get_allocatorEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4ERKS3___cuda_0GetAllocatedMemory__cuda_2__cuda_3__cuda_4ComputeCostsHistogramKernel__uint64_t_M_arrayiterator_traits__device_stub__ZN5kaldi12cuda_decoder26get_best_cost_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEbfvalue_compare_ZNSt11char_traitsIwE2eqERKwS2__ZNSaIcED4Ev_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4ERKS4__ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE7crbeginEv__node_basetm_hour_ZNK9__gnu_cxx16__aligned_bufferISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE6_M_ptrEv_ZN9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmIElstrrchrKernelParams_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE26_M_insert_equal_lower_nodeEPSt13_Rb_tree_nodeIS5_E_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4backEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6rbeginEv_ZNKSt17integral_constantImLm0EEcvmEv_M_insert_unique_nodeoperator*operator+operator-bucket_sizeoperator=_ZN5kaldi12cuda_decoder16PostExpandKernelILb0EEEvRK4dim3S4_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEbucket_ZNSt8__detail9_Map_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEELb1EEixERS3__ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE4sizeEvsystemwcsrtombs__val_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE11_M_allocateEmquot_ZNSaIcEC4ERKS_atollinitializer_list_Hashtable_traits_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmPKc_ZN9__gnu_cxx14__alloc_traitsISaIcEE27_S_propagate_on_move_assignEvatoistrstr_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE14_M_fill_assignEmRKS2__ZNSt13__uses_alloc05_SinkaSEPKvrethrow_exception_ZNKSt6vectorImSaImEE6rbeginEvallocator >conditional&&, std::__nonesuch_no_braces&&>asinh_M_bkt_for_elementsd_lanes_counters_ZNSt6vectorImSaImEEC4EOS1_RKS0___k2_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5eraseB5cxx11ESt23_Rb_tree_const_iteratorIS5_ESD_conditional&, const std::__nonesuch_no_braces&>_M_erase_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11_M_leftmostEv_M_set_length_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EOS4_RKS3__ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE8max_sizeEv_ZNSaISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEEC4Evdefault_deleteint_p_sep_by_space_ZN9__gnu_cxx14__alloc_traitsISaIN5kaldi17CuMemoryAllocator12MemoryRegionEEE15_S_nothrow_moveEv_ZNKSt6vectorImSaImEE2atEm_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5countERSA_sys_errlistfputwc_Iteratorless >_Tuple_impl~basic_string_Z106__device_stub__ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbfRN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEbf_ZNSt6vectorImSaImEE5beginEvkLogZeroDouble_ZNSt6thread2idC4Em_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEc_ZNSt6thread2idC4Ev__cxa_atexit_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5beginEm_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5beginEv_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE8capacityEvhasher_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm_ZNKSt8__detail9_Map_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEELb1EE2atERS3__ZN9__gnu_cxx13new_allocatorIcE10deallocateEPcmreverse_iterator<__gnu_cxx::__normal_iterator > > >strtoldUpdateBeamUsingHistogramKernelstrtollstrxfrm_ZNKSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EEcvbEvfloat2operator std::integral_constant::value_type_M_destroyremove_reference >_IO_FILE_plus_ZN9__gnu_cxx14__alloc_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE27_S_propagate_on_move_assignEv_M_fill_assign_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5clearEv_Stringgetenvtm_yday__nonesuch__normal_iterator > >putwcharftell__once_call_ZN5kaldi12cuda_decoder17ChannelMatrixViewINS0_15ChannelCountersEE7channelEi_ZNKSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE13get_allocatorEvcompareFinalizeProcessNonEmittingKerneldim3emitting_preprocess_and_list_extra_prev_tokens_step4_kernel_ZN6thrust6system6detail10sequential3tagC4Ev_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE4swapERS5_int_curr_symbolNonEmittingPreprocessAndContractKernel_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_rightmostEv_ZNSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE5_M_h1Ev_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE8_M_eraseEN9__gnu_cxx17__normal_iteratorIPS3_S5_EE_ZNK9__gnu_cxx13new_allocatorIcE7addressERKc_ZSt8distanceIPcENSt15iterator_traitsIT_E15difference_typeES2_S2__ZNSaINSt8__detail10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEC4ERKSA_cudaErrorSharedObjectInitFailed_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE14_M_fill_assignEmRKS3__Hash_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2EvcudaErrorInvalidAddressSpacecudaErrorNoDevice_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5beginEv_ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEEaSEOS5_concat__pair_base_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EEC4ERKSB_RKSA_const_reverse_iteratorwchar_trecoverable__M_before_begin_markerspost_expand_kernel_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE7_M_rootEvcudaErrorInvalidDevicePointer_ZNSt15__exception_ptr13exception_ptr10_M_releaseEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11_M_leftmostEv__pad2__pad3__pad4_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE7reserveEm_ZNSt8__detail15_Hashtable_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_17_Hashtable_traitsILb0ELb0ELb1EEEEC4ERKS9_RKSD_RKSE_RKSF_RKSB_main_q_end_lane_offset_ZNK9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE7addressERKS8__ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS2_S4_EEmRS7__M_default_initializeprev_main_q_extra_prev_tokens_global_offsetmemchr_M_get_Tp_allocatorgetwchar_ZN5kaldi12cuda_decoder22GetBestCostStep1KernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEbfstrpbrkfwscanf_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE8_M_eraseEN9__gnu_cxx17__normal_iteratorIPS2_S4_EE_ZN9__gnu_cxx3divExxfunc_ZN5kaldi17CuMemoryAllocator13MallocLockingEm_ZNSt8__detail16_Hashtable_allocISaINS_10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEE19_M_allocate_bucketsEmgetc_ZNSt8__detail21_Hashtable_ebo_helperILi0ENS_10_Select1stELb1EE6_S_getERS2__ZNK9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEdeEv_ZNSt8__detail20_Prime_rehash_policyC4Efgets__add_lvalue_reference_helper_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4swapERS4_cudaErrorPeerAccessNotEnabledfree_blocksmin_histo_cost_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE15_M_check_lengthEmmPKc_ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelI6float2EEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Piatan2_ZNSt8__detail16_Hashtable_allocISaINS_10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEE19_M_deallocate_nodesEPSA__ZN9__gnu_cxx13new_allocatorIPN5kaldi17CuMemoryAllocator9SubRegionEE8allocateEmPKvmain_q_n_extra_prev_tokensq_overflow_ZNSt8__detail12_Insert_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEEE6insertERKS8___hashtable_alloc_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignERKS4_mm_ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEEC4EOS5__IO_write_base__distance_fileno_ZNSt8__detail12_Insert_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEEE6insertENS_20_Node_const_iteratorIS8_Lb0ELb0EEERKS8__ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5eraseEPKS5_SD__ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_drop_nodeEPSt13_Rb_tree_nodeIS5_E_ZNK9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112ba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>_M_current_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4ERKS4__ZNSt12_Vector_baseImSaImEE17_M_create_storageEm_ZN9__gnu_cxx13new_allocatorIcED4Ev_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11upper_boundERKS5__ZNSt5mutex6unlockEv_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4dataEv_ZNSt6thread20hardware_concurrencyEv_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5eraseENSt8__detail14_Node_iteratorISB_Lb0ELb0EEE_Arg1_Arg2_ZN9__gnu_cxx16__aligned_bufferISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEEC4Ev__capacity_ZNKSt6vectorImSaImEE4sizeEv_ZN5kaldi12cuda_decoder32FinalizeProcessNonEmittingKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE__pair_base_ZN5kaldi12cuda_decoder26FillHashmapWithMainQKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE4findERKS5_main_q_n_emitting_tokenscudaErrorSyncDepthExceededthreaddefer_lock_tAllocateNewRegionmbsrtowcsexpand_arcs_kernel_ZN9__gnu_cxx14__alloc_traitsISaIcEE15_S_nothrow_moveEv_ZN9__gnu_cxx25__numeric_traits_floatingIeE16__max_exponent10EcudaErrorNvlinkUncorrectable_ZNKSt8__detail18_Mod_range_hashingclEmmLaneMatrixView_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4ERKS4_ungetwccudaErrorLaunchOutOfResourcesIS_EMITTING_Z104__device_stub__ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEwcstoldcurrency_symbol__digits10_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEC4ERKS1__GLOBAL__sub_I_tmpxft_00000270_00000000_5_cuda_decoder_kernels.compute_70.cudafe1.cpp_ZNSt6vectorImSaImEE21_M_default_initializeEm__wchbpair_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE3endEvgetdate_erraligned_storage<16, 8>aux_q_endpair_S_value_ZNSt6threadC4EOS___swappable_details_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE4rendEv_ZN5kaldi12cuda_decoder27ComputeCostsHistogramKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEb__wrapper__device_stub_concatenate_lanes_data_kerneloperator thrust::system::detail::sequential::tag_M_check_ZN5kaldi12cuda_decoder14LaneMatrixViewINS0_13HashmapValueTEE4laneEiuint8_tcudaErrorProfilerNotInitializedcudaErrorLaunchPendingCountExceeded_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE12_Vector_implC4EOS4__ZNSt11__pair_baseIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEC4Ev_ZN5kaldi17CuMemoryAllocatorC4Ev_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE11upper_boundERKS5__ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE14_M_emplace_auxEN9__gnu_cxx17__normal_iteratorIPKS3_S5_EEOS3___numeric_traits_floating_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE9push_backERKS3__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm_M_check_length_sys_errlist_ZN5kaldi12cuda_decoder30initialize_initial_lane_kernelENS0_12DeviceParamsE_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7__ZNSt5ratioILl1000000000ELl1EE3denEp_sep_by_space__device_stub__ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIfEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_PicudaErrorLaunchFileScopedTexvectormktimeappend_ZN5kaldi18CuAllocatorOptionsC4Evbase_ZN9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmmEi_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE21_M_insert_unique_nodeEmmPNS9_10_Hash_nodeIS7_Lb0EEE_ZNSt6vectorImSaImEE14_M_move_assignEOS1_St17integral_constantIbLb0EE_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ESt16initializer_listISB_EmRKS6_RKSC__ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEC4ERKSD__ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE7crbeginEvexpand_arcs_kernel_ZNSt10_Head_baseILm0EPNSt6thread6_StateELb0EE7_M_headERKS3_ldivfilename_or_fatbins_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE3endEm_mode_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEC4ESt16initializer_listIS7_EmRKSE_RKSC_RKS8__ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE3endEv__fatBinC_Wrapper_t_ZN5kaldi12cuda_decoder18UpdateAdaptiveBeamERKNS0_12DeviceParamsEiiP4int2PNS0_12LaneCountersEadaptive_beam_bin_width_M_replace_Rb_tree_iterator >cudaError_tcudaErrorStartupFailure__normal_iterator > >_ZNK6thrust6system6detail10sequential16execution_policyINS0_3cpp6detail3tagEEcvNS2_3tagEEv_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE21_M_uses_single_bucketEv__opspair_ZNK9__gnu_cxx13new_allocatorImE7addressERKm_ZNSt11__pair_baseIbmEaSERKS0__Tp_alloc_type_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE19_M_find_before_nodeEmRS2_mcudaErrorPeerAccessUnsupported_ZN9__gnu_cxx14__alloc_traitsISaIN5kaldi17CuMemoryAllocator12MemoryRegionEEE27_S_propagate_on_copy_assignEv_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEcm_ZNKSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE12_M_hash_codeERS3__ZN9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEEC4Ev_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS2_S4_EESt16initializer_listIS2_E_M_fill_initializeprev_tokenallocator_traits > >_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5clearEvtimezone_M_start_thread_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE12bucket_countEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE28_M_get_insert_hint_equal_posESt23_Rb_tree_const_iteratorIS5_ERKS5__ZNSt6vectorImSaImEEC4EmRKmRKS0__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmRKS4_mm_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE5beginEv_ZNSt6thread15_M_start_threadESt10unique_ptrINS_6_StateESt14default_deleteIS1_EEPFvvE_posfrexpwostream_ZSt5wcoutncols___normal_iterator > >_ZN5kaldi12cuda_decoder14LaneMatrixViewI4int2E4laneEikLogZeroBaseFloattuple_element<1, std::pair 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std::__nonesuch_no_braces&&>_M_erase_at_end_ZNSt16initializer_listIcEC4EPKcmconcatenate_lanes_data_kernel__wrapper__device_stub_post_expand_kernel__max_exponent10_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4cendEv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE13_M_base_allocEvcompute_costs_histogram_kernel__device_stub__ZN3cub11EmptyKernelIvEEvvbtowc_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EEC4EOSB_OSaISt13_Rb_tree_nodeIS5_EEbuffer_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_move_dataERSB_St17integral_constantIbLb0EE_ZNSt5ratioILl1ELl1000000000EE3denE_ZNSt16allocator_traitsISaImEE8allocateERS0_m_ZN9__gnu_cxx16__aligned_bufferISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE7_M_addrEv_old_offset_ZN9__gnu_cxx13new_allocatorIcEC2Evallocator_arg_tint64main_q_requested_M_allocated_capacity_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEppEi__device_stub__ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmmc_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEppEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_set_lengthEmintegral_constant_ZNSt12_Vector_baseImSaImEE19_M_get_Tp_allocatorEv_ZNSt6vectorImSaImEEixEmfopenLaneMatrixViewdifference_type_Head_base_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE16max_bucket_countEv_ZN5kaldi17CuMemoryAllocator4FreeEPvwcinwcslen_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4__ZNSt12adopt_lock_tC4Ev_ZNSaIPN5kaldi17CuMemoryAllocator9SubRegionEEC4ERKS3__ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEaSERKS4_5div_t_ZSt10__distanceIPKcENSt15iterator_traitsIT_E15difference_typeES3_S3_St26random_access_iterator_tagget_deleter_ZN5kaldi12cuda_decoder36ResetForFrameAndEstimateCutoffKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE11load_factorEvcudaErrorInvalidHostPointerparam_Z114__device_stub__ZN5kaldi12cuda_decoder36finalize_process_non_emitting_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_Link_type_ZN5kaldi12cuda_decoder9InfoToken25GetSameFSTStateTokensListEv_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5frontEv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5beginEm_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5beginEvswap_Tuple_impl<0, std::thread::_State*, std::default_delete >ldexp_M_get_insert_equal_posdouble_t__nv_save_fatbinhandle_for_managed_rt_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4Evlldiv_t~_Alloc_hider_M_next_ZNSt6vectorImSaImEE14_M_fill_insertEN9__gnu_cxx17__normal_iteratorIPmS1_EEmRKm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignERKS4__ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4Em_ZN9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEEC4ERKS9__IO_buf_baseistream_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4Ev__FILEcudaErrorCudartUnloading__normal_iterator > >_M_tail_ZNKSt15__exception_ptr13exception_ptr6_M_getEvget_allocator_ZNSt10_Head_baseILm1ESt14default_deleteINSt6thread6_StateEELb1EEC4ESt15allocator_arg_tSt13__uses_alloc0_ZNKSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EEdeEv_ZNSt8__detail12_Rehash_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEESt17integral_constantIbLb1EEE7reserveEmint2_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE14_M_upper_boundEPSt13_Rb_tree_nodeIS5_EPSt18_Rb_tree_node_baseRKS5__ZN5kaldi12cuda_decoder51EmittingPreprocessAndListExtraPrevTokensStep1KernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_M_eq_ZN5kaldi10OptionsItf8RegisterERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPiS8_long unsigned int_ZN5kaldi12cuda_decoder26get_best_cost_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE__cudaUnregisterFatBinary_ZN5kaldi12cuda_decoder42nonemitting_preprocess_and_contract_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EED4Ev__cond__nv_fatbinhandle_for_managed_rt_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4EmRKS6_RKS8_RKSC__ZNKSt8equal_toIPvEclERKS0_S3___device_stub__ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelINS0_9InfoTokenEEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS6_Pi_ZN5kaldi12cuda_decoder26ConcatenateLanesDataKernelIfEEvRK4dim3S4_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsERKNS0_14LaneMatrixViewIT_EEPSG_Pi__device_stub__ZN5kaldi12cuda_decoder29concatenate_lanes_data_kernelIiEEvNS0_12DeviceParamsENS0_12KernelParamsENS0_14LaneMatrixViewIT_EEPS5_Pi_ZN5kaldi17CuMemoryAllocator15AddToFreeBlocksEPNS0_11MemoryBlockEint64_tvfwprintfdefer_lock_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE14_M_lower_boundEPKSt13_Rb_tree_nodeIS5_EPKSt18_Rb_tree_node_baseRKS5_block_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE9push_backEOS2__ZNSt6vectorImSaImEED4Evstrchr11__mbstate_t_Node_const_iterator, false, false>_M_h1_M_h2_ZNKSt8__detail15_Hashtable_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_17_Hashtable_traitsILb0ELb0ELb1EEEE9_M_equalsERS3_mPNS_10_Hash_nodeIS8_Lb0EEErewind_vptr.OptionsItf_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc_ZNSt16allocator_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE8allocateERS6_m_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EE5resetEPS1__ZNSt11char_traitsIcE2ltERKcS2___use_ebo_ZNSaISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEEC4ERKS7__Hashtable_ebo_helper__debug_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE15_M_destroy_nodeEPSt13_Rb_tree_nodeIS5_Epointer_towcstodwcstof_ZN5kaldi12cuda_decoder26ConcatenateLanesDataKernelIiEEvRK4dim3S4_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsERKNS0_14LaneMatrixViewIT_EEPSG_Pireset_Align_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EmRKS3__Unique_keysvalue_type__dso_handle_Const_Link_type_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE5eraseB5cxx11ESt23_Rb_tree_const_iteratorIS5_ESB__M_id_ZN5kaldi12cuda_decoder51EmittingPreprocessAndListExtraPrevTokensStep2KernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_G_fpos_t_ZNKSt6vectorImSaImEE5emptyEv_M_rehash_auxintmax_tfpos_t_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11upper_boundERKS5__ZNSt15_Rb_tree_header8_M_resetEv__device_stub__ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi17CuMemoryAllocator18GetAllocatedMemoryEv_Len_ZNK9__gnu_cxx13new_allocatorImE8max_sizeEv__cxa_allocate_exception_ZNSt5mutexD4Ev_ZNSt8__detail21_Hashtable_ebo_helperILi1ESt4hashIPvELb1EE6_S_getERS4_wcout_ZNSt11__pair_baseIiiEC4ERKS0__Rb_tree_color_ZNSt16allocator_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE37select_on_container_copy_constructionERKS4___cudaAddressOf >_ZN5kaldi12cuda_decoder51EmittingPreprocessAndListExtraPrevTokensStep3KernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEEmptyKernel_unused2_ZNSt15__exception_ptr13exception_ptrC4EDn_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE17_M_default_appendEm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_local_dataEv_M_node_counttm_minPostContractAndPreprocessKernel_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5eraseEN9__gnu_cxx17__normal_iteratorIPKS3_S5_EEbasic_string__default_lock_policy_ZNSt15__exception_ptr13exception_ptrC4ERKS0__ZNSt15__exception_ptr13exception_ptrD4Ev__ireturn_typefread_ZNSt6vectorImSaImEEC4ERKS0_cudaLaunchKernelResetForFrameAndEstimateCutoffKernel_M_lower_bound__str_M_rehash_policynext__numeric_traits_integer_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE6key_eqEv_ZNK9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEptEvMallocPitch9_G_fpos_td_arc_e_offsets_ZN9__gnu_cxx16__aligned_bufferISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE6_M_ptrEv_ZN9__gnu_cxx14__alloc_traitsISaIN5kaldi17CuMemoryAllocator12MemoryRegionEEE17_S_select_on_copyERKS4__ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE16_M_shrink_to_fitEv_ZSt11__addressofIcEPT_RS0__ZNSt12_Vector_baseImSaImEEC4EOS0_params_ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEEaSERKS5__ZNSt8ios_base4InitD4Ev_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_moveEPcPKcmAddToFreeBlocks_ZNSt16allocator_traitsISaIN5kaldi17CuMemoryAllocator12MemoryRegionEEE8allocateERS3_m_M_uses_single_bucketint_fast16_t_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEC4ERKSK__ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEE7_M_tailERKS5__ZNSt12_Vector_baseImSaImEEC4EOS1__ZNSt6vectorImSaImEE6assignEmRKm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE6insertERKS5_shrink_to_fitwmemcpy_ZN5kaldi12cuda_decoder51EmittingPreprocessAndListExtraPrevTokensStep4KernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_ZNSt11char_traitsIcE4moveEPcPKcmcudaErrorProfilerAlreadyStopped__numeric_traits_integeradaptive_beam_static_segment_ZNKSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE19_M_get_Tp_allocatorEv_ZNK9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE7addressERS8_atomicSubI2_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EPKcRKS3_optindcst_dev_paramspair >, std::_Rb_tree_const_iterator > >_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmRKS4___gridDim_ZNSt11char_traitsIwE3eofEv_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofERKS4_mallocator, false> >_ZN9__gnu_cxx14__alloc_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE17_S_select_on_copyERKS7_operator()_M_get_insert_unique_pos__valueat_quick_exit_ZNSt5ratioILl1ELl1EE3numEinit_decoding_on_device_kernel_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE17_M_create_storageEm_ZNSt5tupleIJPNSt6thread6_StateESt14default_deleteIS1_EEEC4ERKS5__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcS5_S5_int_beam_ZNSt11char_traitsIwE4copyEPwPKwm__lentm_mon_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEOS8_PKS5___off_t_M_get_Node_allocator__native_type_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EEC4EOS4_move&>cudaErrorCooperativeLaunchTooLarge_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE3endEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4EmcRKS3___dnew_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE12_Vector_implC4ERKS4_d_main_q_block_sums_prefix_sum_M_rightmost_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EmRKS4__ZN5kaldi12cuda_decoder26ConcatenateLanesDataKernelINS0_9InfoTokenEEEvRK4dim3S5_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsERKNS0_14LaneMatrixViewIT_EEPSH_Pi__rehash_policyoperator uint3_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9push_backEc__wch_Arg_ZSt20__throw_length_errorPKccudaErrorDuplicateVariableNamedeleter_type_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_PcSA__ZN5kaldi12cuda_decoder20CudaDecoderExceptionD0Evoperator++_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE3endEvcudaErrorTextureNotBoundblock_beginignoreFillHashmapWithMainQKerneloperator+=concatenate_lanes_data_kernel_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4EPKcmRKS3__ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5countERKS5_pair, false, false>, std::__detail::_Node_const_iterator, false, false> >d_arc_pdf_ilabels_ZNSt16allocator_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE8allocateERS6_mPKv_ZNSt5ratioILl1ELl1EE3denEwcsncat__lhsInitializeInitialLaneKernelnew_allocator_RandomAccessIteratorlargest_free_block__ZNSt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEC4EOS6__ZNSt11char_traitsIwE7compareEPKwS2_m_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE14_M_upper_boundEPKSt13_Rb_tree_nodeIS5_EPKSt18_Rb_tree_node_baseRKS5__ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5eraseERS2__ZNSt4pairIbmEC4ERKS0_operator--_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EOS5_RKS4__ZN9__gnu_cxx13new_allocatorImEC4ERKS1__ZNSt16allocator_traitsISaIN5kaldi17CuMemoryAllocator12MemoryRegionEEE10deallocateERS3_PS2_m_Containeroperator-=operator->tm_yearllround_ZN9__gnu_cxx14__alloc_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE27_S_propagate_on_move_assignEvmax_allocated_memory_to_int_type_ZNSt8__detail16_Hashtable_allocISaINS_10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEEC4ERKSC__ZNSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE7_M_swapERSE__ZSt7nothrow__pthread_list_tfill_hashmap_with_main_q_kernel_ZNKSt8__detail21_Hash_node_value_baseISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE9_M_valptrEv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5eraseENS9_20_Node_const_iteratorIS7_Lb0ELb0EEEcuda_decoderallocatecudaErrorHardwareStackError_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11_M_put_nodeEPSt13_Rb_tree_nodeIS5_E_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmmEi_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE6insertERKSB_cudaErrorIllegalAddress_IO_write_endreverse_iterator<__gnu_cxx::__normal_iterator > > >_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmmEvbsearch_IO_save_basetm_wday_M_construct_aux_ZNSt15__exception_ptr13exception_ptrC4EPv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5eraseERKS5__ZNSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE5_M_h2Ev_ZNSt11char_traitsIwE7not_eofERKjinitializer_list >_ZNSt4pairIbmEC4EOS0__ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE11load_factorEv__args_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE5beginEv_ZNSt11char_traitsIwE12to_char_typeERKjpiecewise_construct_ZSt5wclogint_type_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE5eraseEN9__gnu_cxx17__normal_iteratorIPKS2_S4_EES9_pair, false, false>, bool>removen_sign_posn_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE8_S_rightEPKSt18_Rb_tree_node_basesecond_argument_type_ZNSt15__exception_ptr13exception_ptraSERKS0__M_endacos_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4ERKS4_mm_S_copy_chars_ZNSt17integral_constantImLm0EE5valueE__device_stub__ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder14LaneMatrixViewIiEE_ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEE7_M_headERS5__ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE_Rb_tree_implilogbisfinal_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EEC4ESt16initializer_listIS5_ERKS8__ZNSt17integral_constantImLm8EE5valueE__pair_base_ZN5kaldi12cuda_decoder14LaneMatrixViewINS0_9InfoTokenEE4laneEi_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderD2Ev_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4rendEv_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE14_M_range_checkEm_ZNSt4pairIiiEaSEOS0__ZNKSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE15_M_bucket_indexEPKNS_10_Hash_nodeIS8_Lb0EEEm_ZNSt11char_traitsIcE3eofEv__cudaRegisterVarlrint_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEPKcm_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ERKSD_RKSC_nextafterungetc_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEcmthousands_sepdetach_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE4swapERSK_execution_policy_base_Hash_node, false>_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_rightmostEv_ZNSt11_Tuple_implILm1EJSt14default_deleteINSt6thread6_StateEEEE7_M_headERS4__ZNSt5mutex8try_lockEvcopyintegral_constant_ZN3cub11EmptyKernelIvEEvv__umap_hashtable_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEN9__gnu_cxx17__normal_iteratorIPKcS4_EEpair >, std::_Rb_tree_iterator > >strerrorsubregion_begin_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4ERKS4__ZNSt4pairIiiEC4EOS0_expm1_ZSt8distanceIPKcENSt15iterator_traitsIT_E15difference_typeES3_S3_fputwscudaErrorDuplicateTextureName_Mod_range_hashinggmtime_ZNSt10__nonesuchaSERKS__S_right_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ESt16initializer_listISB_EmRKS6_RKS8_RKSC__ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4ERKS5_program_invocation_name_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE6assignESt16initializer_listIS3_E_ZNSt14pointer_traitsIPKcE10pointer_toERS0__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendERKS4_mm_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5frontEv_ZN9__gnu_cxx13new_allocatorImE10deallocateEPmm_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_erase_auxESt23_Rb_tree_const_iteratorIS5_ESD__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC4EPcRKS3_cudaErrorAddressOfConstant_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_mutateEmmPKcm_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEPKcmm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmPKcmlane_counters_ZNSt6threadD4Ev_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5crendEv_Map_base, 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>_IO_write_ptr_M_rightrebind__builtin_unwind_resume_M_get_insert_hint_unique_pos_ZNSt11_Tuple_implILm0EJPNSt6thread6_StateESt14default_deleteIS1_EEE7_M_tailERS5_cudaErrorInvalidValue_ZNKSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE19_M_get_Tp_allocatorEv_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE14_M_move_assignEOS5_St17integral_constantIbLb1EE_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm_ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv_ZNSt8__detail16_Hashtable_allocISaINS_10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEE17_M_node_allocatorEv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE8_M_eraseESt17integral_constantIbLb0EERS2_charLaneMatrixViewcout_S_refcount_Z137__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEtry_lock_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE4cendEv_ZNSt10__nonesuchC4ERKS_vswprintf_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE13get_allocatorEv_Valuedetail_ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZN5kaldi12cuda_decoder9InfoTokenE_ZNSt14pointer_traitsIPcE10pointer_toERc_Identity >__cudaPushCallConfigurationCuMemoryAllocatoradopt_lock_ZN5kaldi12cuda_decoder26ConcatenateLanesDataKernelI6float2EEvRK4dim3S5_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsERKNS0_14LaneMatrixViewIT_EEPSH_Pi_ZNKSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE13hash_functionEv_ZNSt11__pair_baseIiiEaSERKS0__M_ptrsetlocalereverse_iterator<__gnu_cxx::__normal_iterator > > >_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE18_M_construct_aux_2Emc_ZNSt11char_traitsIwE4findEPKwmRS1_wcsncpy_ZNSt6thread4joinEv_Elements_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsEmin_int_cost_and_arg_ZNK9__gnu_cxx13new_allocatorImE7addressERm_ZNKSt12_Vector_baseImSaImEE13get_allocatorEv_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE6insertENSt8__detail20_Node_const_iteratorISB_Lb0ELb0EEERKSB_to_char_typebasic_istream >length_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE4backEvget_id_Hash_code_base_ZN9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE10deallocateEPS8_m__uint32_t_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11equal_rangeERKS5__ZNK9__gnu_cxx16__aligned_bufferISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEE7_M_addrEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmPKcm_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5eraseENSt8__detail20_Node_const_iteratorISB_Lb0ELb0EEESG_capacity_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEaSERKSK__ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE6cbeginEv_ZNK9__gnu_cxx13new_allocatorINSt8__detail10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEE7addressERKSB_div_t_IO_read_base_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE8pop_backEv_ZNKSt8__detail20_Prime_rehash_policy19_M_bkt_for_elementsEm_ZNSt11char_traitsIcE4findEPKcmRS1__M_bucket_begin_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsEvalue_comp_Insert, std::allocator >, std::__detail::_Select1st, std::equal_to, std::hash, std::__detail::_Mod_range_hashing, std::__detail::_Default_ranged_hash, std::__detail::_Prime_rehash_policy, std::__detail::_Hashtable_traits, false>__firstfdimnexttoward_ZNSt8__detail15_Hash_node_baseC4Evkey_type_M_root_ZNSaIN5kaldi17CuMemoryAllocator12MemoryRegionEEC4Evbinary_function_ZN9__gnu_cxx13new_allocatorINSt8__detail10_Hash_nodeISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEELb0EEEEC4Ev_ZN5kaldi12cuda_decoder16PostExpandKernelILb1EEEvRK4dim3S4_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEoperator std::integral_constant::value_type_ZN5kaldi12cuda_decoder14LaneMatrixViewINS0_12LaneCountersEE4laneEiint8_t_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_checkEmPKc_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE8key_compEvtzname__sti____cudaRegisterAll_ZNSt6thread13native_handleEv_ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNSt12_Vector_baseImSaImEE12_Vector_implC4Ev_ZNSt5tupleIJPNSt6thread6_StateESt14default_deleteIS1_EEEaSERKS5__ZNSt5mutex13native_handleEvmain_q_n_emitting_tokens_lane_offset_ZSt4wcinfgetc_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5beginEv_ZNSaISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEED4Evsqrt_Hashtable_ebo_helper<1, std::hash, true>fgets_ZNKSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EE11get_deleterEvint_frac_digitsbasic_ostream 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>_M_next_bktint_n_sep_by_spacevsnprintf_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE7reserveEmaddressof_IO_marker_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE8max_sizeEv_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE19_M_get_Tp_allocatorEvLaneCounters_ZN5kaldi12cuda_decoder30LoadChannelsStateInLanesKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcmmallocator_traits >_ZNSt8__detail21_Hashtable_ebo_helperILi1ESt4hashIPvELb1EEC4Ev_ZNSaIN5kaldi17CuMemoryAllocator12MemoryRegionEEC4ERKS2_prev_main_q_n_extra_prev_tokens_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4copyEPcmm_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofERKS4_m_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE8_S_valueEPKSt13_Rb_tree_nodeIS5_Ellrintfreopenremainder_ZNSt4pairIbmEaSERKS0_max_load_factorclockiterator_traitsconditional&, const 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>tz_minuteswest_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE8capacityEv_M_valptr_ZNSt20_Rb_tree_key_compareISt4lessISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEEC4EOS8_g_cuda_allocator_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE14_M_move_assignEOSK_St17integral_constantIbLb0EE__pthread_internal_listGetBestCostStep2Kernelnum_synchronizations_const_reference_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructEmc_Z113__device_stub__ZN5kaldi12cuda_decoder34update_beam_using_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbRN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEb_ZSt5wcerrwclog_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmRKS4__ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE9push_backEOS3__ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE6_M_endEvreserve_ZNSt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEE4swapERS6_concatenate_lanes_data_kernel__size_M_disjunctfp_offset_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE8max_sizeEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE10_S_minimumEPKSt18_Rb_tree_node_base_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EOS3__Ptrnew_allocator_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE13_M_deallocateEPS2_mfclosetm_isdst_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE11bucket_sizeEm_ZNSt8__detail15_Hash_node_baseC4EPS0_allocator_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE13_Rb_tree_implIS9_Lb1EEC4EOSD__ZNSt16allocator_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE8max_sizeERKS4_line__M_upper_bound_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EOS4__ZNSt6threadaSEOS_CostType_ZN9__gnu_cxx14__alloc_traitsISaIcEE15_S_always_equalEvd_arc_weights_M_parentPostExpandKernelSplitBlock_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4EOSD_RKSC__ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmPKcm_ZN5kaldi10OptionsItfD4Ev__cudaAddressOf >_M_lengthchar_traits_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5eraseB5cxx11ESt23_Rb_tree_const_iteratorIS5_E_ZN5kaldi12cuda_decoder17ChannelMatrixViewI4int2E7channelEiRegister_ZN9__gnu_cxx14__alloc_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE17_S_select_on_copyERKS5__Rb_tree_node >__gthread_tint_least8_tinsert_Z113__device_stub__ZN5kaldi12cuda_decoder35load_channels_state_in_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_ZNSt6vectorImSaImEE14_M_move_assignEOS1_St17integral_constantIbLb1EE_Hashtable, std::allocator >, std::__detail::_Select1st, std::equal_to, std::hash, std::__detail::_Mod_range_hashing, std::__detail::_Default_ranged_hash, std::__detail::_Prime_rehash_policy, std::__detail::_Hashtable_traits >new_allocator__poscudaErrorInvalidDeviceFunctionmbstate_tkMinLogDiffFloatGNU C++11 7.4.0 -msse -msse2 -m64 -mtune=generic -march=x86-64 -g -O1 -std=c++11 -std=c++11 -fPIC -fstack-protector-strong_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE6rbeginEvoperator std::integral_constant::value_typefsetposuint_fast64_tuint64_t_ZNKSt16initializer_listIcE4sizeEvchar_traits_ZN9__gnu_cxx13new_allocatorIPN5kaldi17CuMemoryAllocator9SubRegionEED4Evsubregionint_fast64_t_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EEC4EPS1_OS3__Rep_type_Idx_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4Emuint_least8_t_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4Ev_Z109__device_stub__ZN5kaldi12cuda_decoder30compute_costs_histogram_kernelENS0_12DeviceParamsENS0_12KernelParamsEbRN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEb_ZNSt12_Vector_baseImSaImEED4Ev_M_dataplusequal_rangewctomb_M_leftnothrow_tldiv_t_ZN5kaldi3LogEd_ZN5kaldi3LogEf_Z137__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEC4EmRKSE_RKSF_RKSG_RKSC_RKSA_RKS8__ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EOS5_RKS4__ZN5kaldi12cuda_decoder18expand_arcs_kernelILb0EEEvNS0_12DeviceParamsENS0_12KernelParamsEnstates_S_synced_with_stdioroundgridDim__alloc_traits >__lockdifftime_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE21_M_get_Node_allocatorEvInitHashmapKernelsinh__in_chrg_ZN9__gnu_cxx14__alloc_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE27_S_propagate_on_copy_assignEv_ZNSt11char_traitsIwE11to_int_typeERKw_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEaSERKS5__ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEixEOS0__ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsE_Tuple_impl<1, std::default_delete >_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindERKS4_m_ZNSaISt13_Rb_tree_nodeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEED4Ev_ZNK9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE4baseEv_ZN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmIEl_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPKcS4_EEmc_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEPKcm__ptrlog10_ZN5kaldi12cuda_decoder32SaveChannelsStateFromLanesKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsE__ap_ZNSt15_Rb_tree_header12_M_move_dataERS__ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE11equal_rangeERKS5__ZNSt6vectorImSaImEE8pop_backEvStateId_ZNKSt15__exception_ptr13exception_ptrcvbEv_ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EE11get_deleterEv_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE14_M_move_assignEOS4_St17integral_constantIbLb0EE_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE6bucketERSA_19__fatBinC_Wrapper_t_ZNSaIcED2Ev_ZN9__gnu_cxx13new_allocatorIcEC4ERKS1__ZN9__gnu_cxx14__alloc_traitsISaImEE15_S_always_equalEvlog1p__device_stub__ZN5kaldi12cuda_decoder26get_best_cost_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsEbf~__pair_base__c1__c2grouping_M_finish_ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE5beginEv_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_local_dataEv__blockDimwcstokwcstol__once_callable_ZNSt6vectorImSaImEE6insertEN9__gnu_cxx17__normal_iteratorIPKmS1_EESt16initializer_listImE_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4rendEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4IPcvEET_S7_RKS3__ZNSt12_Vector_baseImSaImEE12_Vector_implC4EOS0___normal_iterator_ZNSt17integral_constantIlLl1EE5valueErebind_alloc__int32_t_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_assignERKS4_towctrans_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EEaSESt16initializer_listIS5_E_ZN9__gnu_cxx13new_allocatorImE8allocateEmPKv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE13_M_rehash_auxEmSt17integral_constantIbLb1EEtm_zone__gthread_mutex_t_M_get_allocator_ZNSt12__mutex_baseC4Evpthread_mutex_t_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE4rendEvbinary_function, std::pair, bool>setbuf_Z137__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsEcudaErrorLaunchTimeoutmbtowc_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE23_M_get_insert_equal_posERKS5_d_hashmap_values__numeric_traits_floating_M_mutex__pthread_mutex_sintegral_constant_ZNKSt14default_deleteINSt6thread6_StateEEclEPS1_environLaneMatrixView_Prime_rehash_policy_GLOBAL__N__67_tmpxft_00000270_00000000_12_cuda_decoder_kernels_compute_70_cpp1_ii_9cedaf15_ZN5kaldi12cuda_decoder9InfoToken29IsUniqueTokenForStateAndFrameEvwcstoull_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE4rendEvtime_t_ZNSt8__detail15_Hashtable_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_17_Hashtable_traitsILb0ELb0ELb1EEEEC4Ev_Alloc_hider_ZN9__gnu_cxx14__alloc_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE20_S_propagate_on_swapEvclear_hashmap_kernel_M_insert_nodestr_d_main_q_extra_prev_tokens_Z113__device_stub__ZN5kaldi12cuda_decoder35post_contract_and_preprocess_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE14_M_insert_rvalEN9__gnu_cxx17__normal_iteratorIPKS2_S4_EEOS2_int_least16_t_ZNSt8__detail21_Hashtable_ebo_helperILi0ENS_10_Select1stELb1EE7_S_cgetERKS2___const_iterator7lldiv_trandom_access_iterator_tagmapped_type__builtin_va_list_ZN9__gnu_cxx13new_allocatorIN5kaldi17CuMemoryAllocator12MemoryRegionEED4Ev_ZN5kaldi12cuda_decoder19init_hashmap_kernelENS0_12DeviceParamsE_ZNSt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEaSERKSt20__nonesuch_no_bracesint_p_cs_precedes_ZN5kaldi19g_allocator_optionsE_ZNKSt8__detail20_Prime_rehash_policy15max_load_factorEv_ZNKSt8__detail15_Hash_code_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEENS_10_Select1stESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashELb0EE5_M_h1Evmon_grouping_M_deallocate_Node_allocator__cudaRegisterFunction_ZN9__gnu_cxx17__is_null_pointerIKcEEbPT_ExpandArcsKernel_offset__numeric_traits_integer__convf_M_beginbasic_istream >__kind_S_growth_factor_ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEm_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S8_m_ZNSt6vectorImSaImEE8_M_eraseEN9__gnu_cxx17__normal_iteratorIPmS1_EEblockDimChannelMatrixViewdistance_ZNSt6vectorImSaImEEaSESt16initializer_listImE__k1min_int_cost_and_arg_without_final_ZNSt11_Tuple_implILm1EJSt14default_deleteINSt6thread6_StateEEEEC4ERKS3__ZN5kaldi12cuda_decoder14LaneMatrixViewIfE4laneEicudaErrorMixedDeviceExecution_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE12_M_move_dataERSB_St17integral_constantIbLb1EE_cur_columnPrintMemoryUsage_M_remove_bucket_begin__hashtable_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EOS4__ZNSt10unique_ptrINSt6thread6_StateESt14default_deleteIS1_EEaSEDnemitting_preprocess_and_list_extra_prev_tokens_step3_kernel_ZNSt11char_traitsIcE6lengthEPKc_ZNSt11_Tuple_implILm1EJSt14default_deleteINSt6thread6_StateEEEEC4ERKS4__ZNK9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEptEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EEaSEOSB_size_ZNSt12_Vector_baseIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EOS5__ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE2atEmConcatenateLanesDataKernel_ZNSt11__pair_baseIbmEC4Ev_ZNSt12_Vector_baseIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EEC4EOS4_RKS3__ZNSt12_Vector_baseImSaImEE12_Vector_impl12_M_swap_dataERS2__ZNSt14default_deleteINSt6thread6_StateEEC4Evexitkey_comp_M_deallocate_buckets_ZNSaImEC4Evoperator[]_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE6bucketERS2___n1__n2_M_find_before_nodep_cs_precedes_M_deallocate_nodeswint_t__builtin_memcpy__wrapper__device_stub_EmptyKernel_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE5beginEvmblen_ZN9__gnu_cxx14__alloc_traitsISaIcEE27_S_propagate_on_copy_assignEv_ZNSt4pairIiiEC4ERKS0___device_builtin_variable_warpSizedecimal_pointkey_compare_S_select_on_copy__stack_chk_faild_main_q_acoustic_cost_ZNSt15__exception_ptr13exception_ptr9_M_addrefEv_ZN5kaldi12cuda_decoder14LaneMatrixViewIfEEexception_ptr_M_shrink_to_fit__min_ZNSt11__pair_baseIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEED4Ev_ZN5kaldi17CuMemoryAllocatorD4Evconcatenate_lanes_data_kernel_M_a_Z120__device_stub__ZN5kaldi12cuda_decoder42reset_for_frame_and_estimate_cutoff_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_M_h_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE6insertESt16initializer_listIS5_E_ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE5emptyEv_M_p_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5beginEmwcerr_M_v_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EEC4EOSB__ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5beginEv_ZN9__gnu_cxx14__alloc_traitsISaIPN5kaldi17CuMemoryAllocator9SubRegionEEE27_S_propagate_on_copy_assignEv__next_ZSt4cout~_Vector_base_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE10_S_maximumEPKSt18_Rb_tree_node_base_ZNSt11char_traitsIwE6lengthEPKwclog_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE2atEm_M_hash_code_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_S_assignEPcmc_ZNSt6vectorImSaImEE4rendEv_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE5beginEvratio<1000000000, 1>_Z108__device_stub__ZN5kaldi12cuda_decoder30init_decoding_on_device_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE_M_data_ZN4dim3cv5uint3Ev_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE11equal_rangeERKS5__ZNSt6vectorImSaImEE2atEmshort unsigned intvector >cudaErrorInvalidConfigurationoverflow_arg_area_M_create_storage_S_nothrow_move__par3_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE17_M_default_appendEm_ZNSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE9push_backERKS2_fflush__is_integer__s1__s2_ZNSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE5eraseERKS5__M_disposeios_baseexp2n_sep_by_spacenew_allocator >_ZN9__gnu_cxx13new_allocatorISt4pairIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEED4Ev_ZNSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EEC4ERKSA__sys_nerr_M_insert_equal_lower_nodeinit_cost__normal_iterator > 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>uint3wctrans_terfc_ZNSt12_Vector_baseImSaImEEC4ERKS0__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S9_S9___device_stub__ZN5kaldi12cuda_decoder31fill_hashmap_with_main_q_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNSt4pairIPSt18_Rb_tree_node_baseS1_EaSERKS2__ZNSt11__pair_baseIiiEC4Ev_ZNSt8__detail12_Insert_baseIPvSt4pairIKS1_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS8_ENS_10_Select1stESt8equal_toIS1_ESt4hashIS1_ENS_18_Mod_range_hashingENS_20_Default_ranged_hashENS_20_Prime_rehash_policyENS_17_Hashtable_traitsILb0ELb0ELb1EEEE20_M_conjure_hashtableEv_ZNSt11__pair_baseIKPvPN5kaldi17CuMemoryAllocator11MemoryBlockEEaSERKS6__ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE12_M_find_nodeEmRS2_mCUstream_stnew_allocatorprev_main_q_global_offset_Atomic_word~_Hashtablefmin_ZNSt11char_traitsIcE6assignEPcmcnearbyint_ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsE_M_bucket_index_ZNK9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEixEliterator_S_keyallocator_KeyOfValue_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmRKS4__ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE4backEv_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcmwprintf__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step4_kernelENS0_12DeviceParamsENS0_12KernelParamsE_ZNSt20_Rb_tree_key_compareISt4lessISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEEC4Ev_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE2atERSA__ZN5kaldi17CuMemoryAllocator20RemoveFromFreeBlocksEPNS0_11MemoryBlockESaveChannelsStateFromLanesKernelfloat_ZN9__gnu_cxx14__alloc_traitsISaISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEEEE15_S_nothrow_moveEv_ZNSaImEC4ERKS__ZNSt11_Tuple_implILm1EJSt14default_deleteINSt6thread6_StateEEEEC4Evscalbln_S_cgetadaptive_int_beam_with_validity_index_ZNSt12_Vector_baseImSaImEEC4Em_ZNSt12_Vector_baseImSaImEEC4Ev__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step3_kernelENS0_12DeviceParamsENS0_12KernelParamsE__cxa_free_exceptioncudaErrorSynchronizationError_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmPKcmbrlen_ZSt11__addressofIKcEPT_RS1__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC4EPKcRKS3__ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEC4EOSK__ZN5kaldi12cuda_decoder38NonEmittingPreprocessAndContractKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEfatbinData_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE19_M_allocate_bucketsEm_M_replace_aux_ZNSt11__pair_baseIbmED4Ev__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step2_kernelENS0_12DeviceParamsENS0_12KernelParamsE__cudaAddressOfnlanes_used_ZNSt6thread4swapERS_resizeargs_ZNSt11char_traitsIcE11to_int_typeERKcClearHashmapKernel_M_store_code_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE3endEv_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEEC4ERKSK_RKS8__ZNKSt6vectorIN5kaldi17CuMemoryAllocator12MemoryRegionESaIS2_EE6rbeginEvallocator_ZN5kaldi10OptionsItf8RegisterERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPjS8__next_ZNSaImED4Ev_ZNSt8__detail21_Hashtable_ebo_helperILi2ENS_18_Mod_range_hashingELb1EE7_S_cgetERKS2__ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IPcvEET_S7_RKS3__ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEaSEOS5__ZNKSt3setISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEESt4lessIS5_ESaIS5_EE8max_sizeEv_ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE8max_sizeEv__device_stub__ZN5kaldi12cuda_decoder59emitting_preprocess_and_list_extra_prev_tokens_step1_kernelENS0_12DeviceParamsENS0_12KernelParamsE__elision_ZNSt11__pair_baseIPSt18_Rb_tree_node_baseS1_EaSERKS2__ZNK9__gnu_cxx13new_allocatorIcE7addressERc~thread_ZNKSt8_Rb_treeISt4pairImPN5kaldi17CuMemoryAllocator11MemoryBlockEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE4sizeEv_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm_ZNSt6vectorImSaImEE5frontEv_ZNSt6vectorImSaImEEC4EmRKS0__ZNKSt6vectorImSaImEE12_M_check_lenEmPKcMallocInternal_ZNSt4pairIPSt18_Rb_tree_node_baseS1_E4swapERS2__ZNKSt4hashIPvEclES0___listremquofmod_State_ptrkLogZeroFloatcrend_Hashtable_ebo_helper<0, std::equal_to, true>input_iterator_tag_ZN5kaldi12cuda_decoder31PostContractAndPreprocessKernelERK4dim3S3_RKP11CUstream_stRKNS0_12DeviceParamsERKNS0_12KernelParamsEd_channels_counters_ZNSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EEC4EOS5__M_start_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmPKc_ZNKSt6vectorIPN5kaldi17CuMemoryAllocator9SubRegionESaIS3_EE4sizeEv_ZNSt15__uniq_ptr_implINSt6thread6_StateESt14default_deleteIS1_EEC4Evratio<1, 1>cudaErrorInvalidChannelDescriptor_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5clearEvhardware_concurrencyuint_fast8_t_ZNKSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE11bucket_sizeEm_ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEEC4ESt16initializer_listISB_EmRKSC__ZNKSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE12bucket_countEv_ZN9__gnu_cxx17__normal_iteratorIPKcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEmmEvsecond_M_swap_Num_Z115__device_stub__ZN5kaldi12cuda_decoder37save_channels_state_from_lanes_kernelENS0_12DeviceParamsENS0_12KernelParamsERN5kaldi12cuda_decoder12DeviceParamsERNS0_12KernelParamsE__cache_hash_code_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE9_M_rehashEmRKmcuda_cub_ZNSt10_HashtableIPvSt4pairIKS0_PN5kaldi17CuMemoryAllocator11MemoryBlockEESaIS7_ENSt8__detail10_Select1stESt8equal_toIS0_ESt4hashIS0_ENS9_18_Mod_range_hashingENS9_20_Default_ranged_hashENS9_20_Prime_rehash_policyENS9_17_Hashtable_traitsILb0ELb0ELb1EEEE5eraseENS9_20_Node_const_iteratorIS7_Lb0ELb0EEESM__ZNSt13unordered_mapIPvPN5kaldi17CuMemoryAllocator11MemoryBlockESt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_S4_EEE5eraseENSt8__detail20_Node_const_iteratorISB_Lb0ELb0EEEtm_gmtoff_M_stateoperator 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__va_list_tag __va_list_tagMemoryRegionGCC: (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0zRx 0.Al$LDpy A jxDUptD W$Dpy A jxDUpD W$Dpy A jxDUpD W$ Dpy A jxDUp4D W$LG A jDUt(D0c$G A jDU(D0c$G A jDU(D0c$ G A jDU4(D0c LD`o A jhDpU`pDP6AtD D D`t A jhDpU`DN D`t A jhDpU`,DN$DDpy A jxDUplD W$Dpy A jxDUpD W$Dpy A jxDUpD W$Dpy A jxDUp,D W$DDpy A jxDUplD W$Dpy A jxDUpD W0]AAD n AAA G] $Dpy A jxDUp D W$8Dpy A jxDUp`D W$xG A jDU D [$G A jDU D [$Dpy A jxDUp D W$8D A jDU` D [$xD A jDU D [$Dpy A jxDUpD W$Dpy A jxDUp D W$8Dpy A jxDUp`D W$xDpy A jxDUpD W$Dpy A jxDUpD W$Dpy A jxDUp D W8AXB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB B(B0iBB uA( `AC L A 0H BAA D0c  AABA zPLRx 4$AC Jd.i.|.i.@ A 4\AAD y AAA G] 4AAD y AAA G] 4AAD y AAA G] 4AAD v AAA GZ 4<AAD y AAA G] 4tAAD y AAA G] 4AAD y AAA G] 4AAD y AAA G] 4AAD y AAA G] 4TAAD y AAA G] 4AAD y AAA G] 4AAD y AAA G] 4AAD v AAA GZ 44AAD y AAA G] 4lBAA y ABA J` 4BAA y ABA J` 4AAD y AAA G] <BAA D0B  AABA Ji0<TBAA D0B  AABA Ji04AAD y AAA G] ,AAGf AAA ,AAGf AAA ,,AAGf AAA ,\AAGf AAA D5BBB A(A0Gy 0A(A BBBA D5BBB A(A0Gy 0A(A BBBA D5BBB A(A0Gy 0A(A BBBA Dd5BBB A(A0Gy 0A(A BBBA $/DjH !S#%'HX) +-/13578"Z79;<>@ACDEGIKMOQSb// UVXZ\^_aceghkl77777(777H77777 77`77(#7)7/7H57;7 A7 G7 M7X S7 Y7( _7 e7 k8q7 w8};@@@@j      " < "!.n  !X(   "!.  "#w   "% "'R ") "+(; "-( "/(C "1( "3  "56+7Z 0q@ J w ^ [ vw ? z[ 1# ? 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